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Update NES.ino
- regrouped more MMC3-like mappers - fixed mapper 91 - simplified mappers 1/155, 9, 10, 157
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nsx0r
GitHub
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1a16fcf875
@ -17,10 +17,10 @@
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//803 Low Level Functions
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//1012 File Functions
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//1083 Config Functions
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//1701 ROM Functions
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//3558 RAM Functions
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//3958 Eeprom Functions
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//4145 NESmaker Flash Cart Functions
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//1704 ROM Functions
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//3534 RAM Functions
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//3934 Eeprom Functions
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//4122 NESmaker Flash Cart Functions
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struct mapper_NES {
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uint16_t mapper;
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@ -38,15 +38,15 @@ struct mapper_NES {
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// Supported Mapper Array (iNES Mapper #s)
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// Format = {mapper,prglo,prghi,chrlo,chrhi,ramlo,ramhi}
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static const struct mapper_NES PROGMEM mapsize[] = {
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{ 0, 0, 1, 0, 1, 0, 2 }, // nrom [sram r/w]
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{ 1, 1, 5, 0, 5, 0, 3 }, // mmc1 [sram r/w]
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{ 2, 2, 4, 0, 0, 0, 0 }, // uxrom
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{ 3, 0, 1, 0, 9, 0, 0 }, // cnrom
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{ 4, 1, 5, 0, 6, 0, 1 }, // mmc3/mmc6 [sram/prgram r/w]
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{ 5, 3, 5, 5, 7, 0, 3 }, // mmc5 [sram r/w]
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{ 7, 2, 4, 0, 0, 0, 0 }, // axrom
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{ 9, 3, 3, 5, 5, 0, 0 }, // mmc2 (punch out)
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{ 10, 3, 4, 4, 5, 1, 1 }, // mmc4 [sram r/w]
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{ 0, 0, 1, 0, 1, 0, 2 }, // NROM [sram r/w]
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{ 1, 1, 5, 0, 5, 0, 3 }, // MMC1 [sram r/w]
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{ 2, 2, 4, 0, 0, 0, 0 }, // UxROM
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{ 3, 0, 1, 0, 9, 0, 0 }, // CNROM
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{ 4, 1, 5, 0, 6, 0, 1 }, // MMC3/MMC6 [sram/prgram r/w]
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{ 5, 3, 5, 5, 7, 0, 3 }, // MMC5 [sram r/w]
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{ 7, 2, 4, 0, 0, 0, 0 }, // AxROM
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{ 9, 0, 3, 0, 5, 0, 0 }, // MMC2/PxROM
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{ 10, 0, 4, 4, 5, 1, 1 }, // MMC4/FxROM [sram r/w]
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{ 11, 1, 3, 1, 5, 0, 0 }, // Color Dreams [UNLICENSED]
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{ 13, 1, 1, 0, 0, 0, 0 }, // cprom (videomation)
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{ 15, 6, 6, 0, 0, 0, 0 }, // K-1029/K-1030P [UNLICENSED]
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@ -637,7 +637,7 @@ void getMapping() {
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}
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// Read first 512 bytes of first and last block of PRG ROM and compute CRC32
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// MMC3 maps the last 8KB block of PRG ROM to 0xE000 while 0x8000 can contain random data after bootup
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// Some mappers (like MMC3) map the last 8KB block of PRG ROM to 0xE000 while 0x8000 can contain random data after bootup
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for (size_t c = 0; c < 512; c++) {
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UPDATE_CRC(oldcrc32, read_prg_byte(0x8000 + c));
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UPDATE_CRC(oldcrc32MMC3, read_prg_byte(0xE000 + c));
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@ -1792,7 +1792,7 @@ void readPRG(bool readrom) {
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case 1:
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case 155: // 32K/64K/128K/256K/512K
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banks = int_pow(2, prgsize) - 1;
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banks = int_pow(2, prgsize);
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for (size_t i = 0; i < banks; i++) { // 16K Banks ($8000-$BFFF)
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write_prg_byte(0x8000, 0x80); // Clear Register
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write_mmc1_byte(0x8000, 0x0C); // Switch 16K Bank ($8000-$BFFF) + Fixed Last Bank ($C000-$FFFF)
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@ -1803,7 +1803,6 @@ void readPRG(bool readrom) {
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write_mmc1_byte(0xE000, i);
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dumpBankPRG(0x0, 0x4000, base);
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}
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dumpBankPRG(0x4000, 0x8000, base); // Final Bank ($C000-$FFFF)
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break;
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case 2: // bus conflicts - fixed last bank
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@ -1926,20 +1925,20 @@ void readPRG(bool readrom) {
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}
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break;
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case 9: // 128K
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for (size_t i = 0; i < 13; i++) { // 16-3 = 13 = 128K
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write_prg_byte(0xA000, i); // $8000-$9FFF
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dumpBankPRG(0x0, 0x2000, base); // Switch Bank ($8000-$9FFF)
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case 9:
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banks = int_pow(2, prgsize) * 2; // 8K banks
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for (size_t i = 0; i < banks; i++) {
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write_prg_byte(0xA000, i); // Switch bank at $8000
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dumpBankPRG(0x0, 0x2000, base); //
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}
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dumpBankPRG(0x2000, 0x8000, base); // Final 3 Banks ($A000-$FFFF)
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break;
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case 10: // 128K/256K
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for (size_t i = 0; i < (unsigned)(((prgsize - 3) * 8) + 7); i++) {
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write_prg_byte(0xA000, i); // $8000-$BFFF
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dumpBankPRG(0x0, 0x4000, base); // Switch Bank ($8000-$BFFF)
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case 10:
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banks = int_pow(2, prgsize);
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for (size_t i = 0; i < banks; i++) {
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write_prg_byte(0xA000, i);
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dumpBankPRG(0x0, 0x4000, base);
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}
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dumpBankPRG(0x4000, 0x8000, base); // Final Bank ($C000-$FFFF)
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break;
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case 11:
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@ -2090,7 +2089,6 @@ void readPRG(bool readrom) {
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case 211:
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banks = int_pow(2, prgsize) * 2;
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write_prg_byte(0xD000, 0x02);
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for (uint8_t i = 0; i < banks; i++) {
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write_prg_byte(0xD003, (((i >> 5) & 0x06) | 0x20));
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write_prg_byte(0x8000, (i & 0x3f));
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@ -2333,13 +2331,12 @@ void readPRG(bool readrom) {
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break;
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case 91:
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banks = int_pow(2, prgsize);
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for (size_t i = 0; i < (banks - 2); i += 2) {
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write_prg_byte(0x7000, (i | 0));
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write_prg_byte(0x7001, (i | 1));
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dumpBankPRG(0x0, 0x4000, base);
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banks = int_pow(2, prgsize) * 2;
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for (size_t i = 0; i < banks; i += 1) {
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write_prg_byte(0x8000 + ((i & 0x30) >> 3), i); // PRG A18-A17 (submapper 0 only)
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write_prg_byte(0x7000, i); // PRG -A13
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dumpBankPRG(0x0, 0x2000, base);
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}
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dumpBankPRG(0x4000, 0x8000, base);
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break;
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case 92: // 256K
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@ -2467,11 +2464,11 @@ void readPRG(bool readrom) {
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break;
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case 157:
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for (size_t i = 0; i < 15; i++) {
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write_prg_byte(0x8008, i); // select 16k bank at $8000-$BFFF
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banks = int_pow(2, prgsize);
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for (size_t i = 0; i < banks; i++) {
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write_prg_byte(0x8008, i);
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dumpBankPRG(0x0, 0x4000, base);
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}
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dumpBankPRG(0x4000, 0x8000, base); // last 16k bank fixed at $C000-$FFFF
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break;
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case 162:
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@ -2792,12 +2789,16 @@ void readCHR(bool readrom) {
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case 52:
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case 64:
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case 76:
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case 88: // 128K
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case 95: // 32K
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case 118:
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case 119:
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case 126:
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case 134:
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case 154: // 128K
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case 158:
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case 176:
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case 206: // 16K/32K/64K
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case 315:
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case 366:
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banks = int_pow(2, chrsize) * 4;
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@ -2871,12 +2872,9 @@ void readCHR(bool readrom) {
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break;
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case 9:
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case 10: // Mapper 9: 128K, Mapper 10: 64K/128K
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if (mapper == 9)
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banks = 32;
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else // Mapper 10
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case 10:
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banks = int_pow(2, chrsize);
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for (size_t i = 0; i < banks; i++) { // 64K/128K
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for (size_t i = 0; i < banks; i++) {
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write_prg_byte(0xB000, i);
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write_prg_byte(0xC000, i);
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dumpBankCHR(0x0, 0x1000);
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@ -3311,26 +3309,6 @@ void readCHR(bool readrom) {
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}
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break;
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case 88: // 128K
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case 95: // 32K
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case 154: // 128K
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case 206: // 16K/32K/64K
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banks = int_pow(2, chrsize) * 4;
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for (size_t i = 0; i < banks; i += 2) { // 1K Banks
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if (i < 64) {
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write_prg_byte(0x8000, 0); // CHR Command ($0000-$07FF) 2K Bank
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write_prg_byte(0x8001, i & 0x3F); // CHR Bank
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dumpBankCHR(0x0, 0x800);
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} else {
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write_prg_byte(0x8000, 2); // CHR Command ($1000-$13FF) 1K Bank
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write_prg_byte(0x8001, i); // CHR Bank
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write_prg_byte(0x8000, 3); // CHR Command ($1400-$17FF) 1K Bank
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write_prg_byte(0x8001, i + 1); // CHR Bank
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dumpBankCHR(0x1000, 0x1800);
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}
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}
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break;
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case 89: // 128K
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banks = int_pow(2, chrsize) / 2;
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for (size_t i = 0; i < banks; i++) { // 8K Banks
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@ -3343,13 +3321,11 @@ void readCHR(bool readrom) {
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break;
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case 91:
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banks = int_pow(2, chrsize) / 2;
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for (size_t i = 0; i < banks; i += 8) {
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write_prg_byte(0x6000, (i / 2) | 0);
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write_prg_byte(0x6001, (i / 2) | 1);
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write_prg_byte(0x6002, (i / 2) | 2);
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write_prg_byte(0x6003, (i / 2) | 3);
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dumpBankCHR(0x0, 0x2000);
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banks = int_pow(2, chrsize) * 2;
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for (size_t i = 0; i < banks; i += 1) {
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write_prg_byte(0x8000 + ((i & 0x100) >> 8), i); // CHR A19 (submapper 0 only)
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write_prg_byte(0x6000, i); // CHR A18-A11
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dumpBankCHR(0x0, 0x0800);
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}
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break;
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