Mirrors/cartreader
2
0
Fork 0
mirror of https://github.com/sanni/cartreader.git synced 2024-11-27 15:04:15 +01:00
Code Issues Projects Releases Wiki Activity

V8.2: Fix GB CAM bug

Browse Source
This commit is contained in:
sanni 2022-04-10 22:44:59 +02:00
parent 04a4ea3de9
commit 1cc7712b9e
2 changed files with 60 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Cart_Reader/Cart_Reader.ino
View File

@ -4,8 +4,8 @@
This project represents a community-driven effort to provide This project represents a community-driven effort to provide
an easy to build and easy to modify cartridge dumper. an easy to build and easy to modify cartridge dumper.
Date: 21.03.2022 Date: 10.04.2022
Version: 8.1 Version: 8.2
SD lib: https://github.com/greiman/SdFat SD lib: https://github.com/greiman/SdFat
OLED lib: https://github.com/adafruit/Adafruit_SSD1306 OLED lib: https://github.com/adafruit/Adafruit_SSD1306
@ -45,7 +45,7 @@
**********************************************************************************/ **********************************************************************************/
char ver[5] = "8.1"; char ver[5] = "8.2";
/****************************************** /******************************************
Libraries Libraries

66
Cart_Reader/GB.ino
View File

@ -365,7 +365,9 @@ void setup_GB() {
// Set Control Pins to Output RST(PH0) CLK(PH1) CS(PH3) WR(PH5) RD(PH6) // Set Control Pins to Output RST(PH0) CLK(PH1) CS(PH3) WR(PH5) RD(PH6)
DDRH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 5) | (1 << 6); DDRH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 5) | (1 << 6);
// Output a high signal on all pins, pins are active low therefore everything is disabled now // Output a high signal on all pins, pins are active low therefore everything is disabled now
PORTH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 5) | (1 << 6); PORTH |= (1 << 0) | (1 << 3) | (1 << 5) | (1 << 6);
// Output a low signal on CLK(PH1) to disable writing GB Camera RAM
PORTH &= ~(1 << 1);
// Set Data Pins (D0-D7) to Input // Set Data Pins (D0-D7) to Input
DDRC = 0x00; DDRC = 0x00;
@ -540,7 +542,8 @@ void writeByte_GB(int myAddress, byte myData) {
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t"); __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t");
} }
byte readByteCLK_GB(word myAddress) { // Triggers CLK pin
byte readByteSRAM_GB(word myAddress) {
PORTF = myAddress & 0xFF; PORTF = myAddress & 0xFF;
PORTK = (myAddress >> 8) & 0xFF; PORTK = (myAddress >> 8) & 0xFF;
@ -558,33 +561,59 @@ byte readByteCLK_GB(word myAddress) {
// Pull RD(PH6) HIGH // Pull RD(PH6) HIGH
PORTH |= (1 << 6); PORTH |= (1 << 6);
if (romType == 252) {
// Pull CS(PH3) HIGH
PORTH |= (1 << 3);
}
else {
// Pull CS(PH3) CLK(PH1)(for FRAM MOD) HIGH // Pull CS(PH3) CLK(PH1)(for FRAM MOD) HIGH
PORTH |= (1 << 3) | (1 << 1); PORTH |= (1 << 3) | (1 << 1);
}
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t"); __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t");
return tempByte; return tempByte;
} }
void writeByteCLK_GB(int myAddress, byte myData) { // Triggers CLK pin
void writeByteSRAM_GB(int myAddress, byte myData) {
PORTF = myAddress & 0xFF; PORTF = myAddress & 0xFF;
PORTK = (myAddress >> 8) & 0xFF; PORTK = (myAddress >> 8) & 0xFF;
PORTC = myData; PORTC = myData;
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t"); __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t");
if (romType == 252) {
// Pull CS(PH3) LOW
PORTH &= ~(1 << 3);
// Pull CLK(PH1)(for GB CAM) HIGH
PORTH |= (1 << 1);
// Pull WR(PH5) low
PORTH &= ~(1 << 5);
}
else {
// Pull CS(PH3) CLK(PH1)(for FRAM MOD) LOW // Pull CS(PH3) CLK(PH1)(for FRAM MOD) LOW
PORTH &= ~((1 << 3) | (1 << 1)); PORTH &= ~((1 << 3) | (1 << 1));
// Pull WR(PH5) low // Pull WR(PH5) low
PORTH &= ~(1 << 5); PORTH &= ~(1 << 5);
}
// Leave WE low for at least 60ns // Leave WE low for at least 60ns
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t"); __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t");
if (romType == 252) {
// Pull WR(PH5) HIGH
PORTH |= (1 << 5);
// Pull CS(PH3) HIGH
PORTH |= (1 << 3);
// Pull CLK(PH1) LOW (for GB CAM)
PORTH &= ~(1 << 1);
}
else {
// Pull WR(PH5) HIGH // Pull WR(PH5) HIGH
PORTH |= (1 << 5); PORTH |= (1 << 5);
// Pull CS(PH3) CLK(PH1)(for FRAM MOD) HIGH // Pull CS(PH3) CLK(PH1)(for FRAM MOD) HIGH
PORTH |= (1 << 3) | (1 << 1); PORTH |= (1 << 3) | (1 << 1);
}
// Leave WE high for at least 50ns // Leave WE high for at least 50ns
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t"); __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t");
@ -595,9 +624,9 @@ void writeByteCLK_GB(int myAddress, byte myData) {
*****************************************/ *****************************************/
// Read Cartridge Header // Read Cartridge Header
void getCartInfo_GB() { void getCartInfo_GB() {
romType = readByteCLK_GB(0x0147); romType = readByte_GB(0x0147);
romSize = readByteCLK_GB(0x0148); romSize = readByte_GB(0x0148);
sramSize = readByteCLK_GB(0x0149); sramSize = readByte_GB(0x0149);
// ROM banks // ROM banks
switch (romSize) { switch (romSize) {
@ -663,14 +692,14 @@ void getCartInfo_GB() {
} }
// Get Checksum as string // Get Checksum as string
sprintf(checksumStr, "%02X%02X", readByteCLK_GB(0x014E), readByteCLK_GB(0x014F)); sprintf(checksumStr, "%02X%02X", readByte_GB(0x014E), readByte_GB(0x014F));
// Get name // Get name
byte myByte = 0; byte myByte = 0;
byte myLength = 0; byte myLength = 0;
for (int addr = 0x0134; addr <= 0x13C; addr++) { for (int addr = 0x0134; addr <= 0x13C; addr++) {
myByte = readByteCLK_GB(addr); myByte = readByte_GB(addr);
if (((char(myByte) >= 48 && char(myByte) <= 57) || (char(myByte) >= 65 && char(myByte) <= 122)) && myLength < 15) { if (((char(myByte) >= 48 && char(myByte) <= 57) || (char(myByte) >= 65 && char(myByte) <= 122)) && myLength < 15) {
romName[myLength] = char(myByte); romName[myLength] = char(myByte);
myLength++; myLength++;
@ -741,7 +770,7 @@ void readROM_GB() {
// Read banks and save to SD // Read banks and save to SD
while (romAddress <= 0x7FFF) { while (romAddress <= 0x7FFF) {
for (int i = 0; i < 512; i++) { for (int i = 0; i < 512; i++) {
sdBuffer[i] = readByteCLK_GB(romAddress + i); sdBuffer[i] = readByte_GB(romAddress + i);
} }
myFile.write(sdBuffer, 512); myFile.write(sdBuffer, 512);
romAddress += 512; romAddress += 512;
@ -777,8 +806,8 @@ unsigned int calc_checksum_GB (char* fileName, char* folder) {
myFile.close(); myFile.close();
sd.chdir(); sd.chdir();
// Subtract checksum bytes // Subtract checksum bytes
calcChecksum -= readByteCLK_GB(0x014E); calcChecksum -= readByte_GB(0x014E);
calcChecksum -= readByteCLK_GB(0x014F); calcChecksum -= readByte_GB(0x014F);
// Return result // Return result
return (calcChecksum); return (calcChecksum);
@ -792,7 +821,6 @@ unsigned int calc_checksum_GB (char* fileName, char* folder) {
// Compare checksum // Compare checksum
boolean compare_checksum_GB() { boolean compare_checksum_GB() {
println_Msg(F("Calculating Checksum")); println_Msg(F("Calculating Checksum"));
display_Update(); display_Update();
@ -851,7 +879,7 @@ void readSRAM_GB() {
dataIn_GB(); dataIn_GB();
// MBC2 Fix // MBC2 Fix
readByteCLK_GB(0x0134); readByte_GB(0x0134);
dataOut(); dataOut();
if (romType <= 4) { if (romType <= 4) {
@ -870,7 +898,7 @@ void readSRAM_GB() {
dataIn_GB(); dataIn_GB();
for (word sramAddress = 0xA000; sramAddress <= lastByte; sramAddress += 64) { for (word sramAddress = 0xA000; sramAddress <= lastByte; sramAddress += 64) {
for (byte i = 0; i < 64; i++) { for (byte i = 0; i < 64; i++) {
sdBuffer[i] = readByteCLK_GB(sramAddress + i); sdBuffer[i] = readByteSRAM_GB(sramAddress + i);
} }
myFile.write(sdBuffer, 64); myFile.write(sdBuffer, 64);
} }
@ -908,7 +936,7 @@ void writeSRAM_GB() {
dataIn_GB(); dataIn_GB();
// MBC2 Fix // MBC2 Fix
readByteCLK_GB(0x0134); readByte_GB(0x0134);
dataOut(); dataOut();
@ -926,7 +954,7 @@ void writeSRAM_GB() {
// Write RAM // Write RAM
for (word sramAddress = 0xA000; sramAddress <= lastByte; sramAddress++) { for (word sramAddress = 0xA000; sramAddress <= lastByte; sramAddress++) {
writeByteCLK_GB(sramAddress, myFile.read()); writeByteSRAM_GB(sramAddress, myFile.read());
} }
} }
// Disable SRAM // Disable SRAM
@ -963,7 +991,7 @@ unsigned long verifySRAM_GB() {
dataIn_GB(); dataIn_GB();
// MBC2 Fix // MBC2 Fix
readByteCLK_GB(0x0134); readByte_GB(0x0134);
// Check SRAM size // Check SRAM size
if (lastByte > 0) { if (lastByte > 0) {
@ -986,7 +1014,7 @@ unsigned long verifySRAM_GB() {
//fill sdBuffer //fill sdBuffer
myFile.read(sdBuffer, 64); myFile.read(sdBuffer, 64);
for (int c = 0; c < 64; c++) { for (int c = 0; c < 64; c++) {
if (readByteCLK_GB(sramAddress + c) != sdBuffer[c]) { if (readByteSRAM_GB(sramAddress + c) != sdBuffer[c]) {
writeErrors++; writeErrors++;
} }
} }