Update MD.ino

Add support for Virtua Racing (E/U/J)
All credits go to Sanni for initial ideas, and Prominos for researches and code.
This commit is contained in:
PsyK0p4T 2023-06-16 09:17:21 +02:00 committed by GitHub
parent 4702fd6638
commit 52962a28a7
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GPG Key ID: 4AEE18F83AFDEB23

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@ -13,6 +13,7 @@ word addrhi;
word addrlo; word addrlo;
word chksum; word chksum;
boolean is32x = 0; boolean is32x = 0;
boolean isSVP = 0;
//*********************************************** //***********************************************
// EEPROM SAVE TYPES // EEPROM SAVE TYPES
@ -183,6 +184,11 @@ void mdLoadConf() {
} }
#endif #endif
void pulse_clock(int n) {
for (int i=0; i<n; i++)
PORTH ^= (1 << 1);
}
/****************************************** /******************************************
Menu Menu
*****************************************/ *****************************************/
@ -473,18 +479,24 @@ void setup_MD() {
// Set Control Pins to Output RST(PH0) CLK(PH1) CS(PH3) WRH(PH4) WRL(PH5) OE(PH6) // Set Control Pins to Output RST(PH0) CLK(PH1) CS(PH3) WRH(PH4) WRL(PH5) OE(PH6)
DDRH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6); DDRH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6);
// Set TIME(PJ0) to Output // Set TIME(PJ0), AS(PJ1) to Output
DDRJ |= (1 << 0); DDRJ |= (1 << 0) | (1 << 1);
//set ASEL(PG5) to Output
DDRG |= (1 << 5);
// Set Data Pins (D0-D15) to Input // Set Data Pins (D0-D15) to Input
DDRC = 0x00; DDRC = 0x00;
DDRA = 0x00; DDRA = 0x00;
// Setting RST(PH0) CLK(PH1) CS(PH3) WRH(PH4) WRL(PH5) OE(PH6) HIGH // Setting RST(PH0) CS(PH3) WRH(PH4) WRL(PH5) OE(PH6) HIGH
PORTH |= (1 << 0) | (1 << 1) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6); PORTH |= (1 << 0) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6);
// Setting TIME(PJ0) HIGH // Setting TIME(PJ0) AS(PJ1) HIGH
PORTJ |= (1 << 0); PORTJ |= (1 << 0) | (1 << 1);
// setting ASEL(PG5) HIGH
PORTG |= (1 << 5);
delay(200); delay(200);
@ -556,6 +568,12 @@ word readWord_MD(unsigned long myAddress) {
PORTH &= ~(1 << 3); PORTH &= ~(1 << 3);
// Setting OE(PH6) LOW // Setting OE(PH6) LOW
PORTH &= ~(1 << 6); PORTH &= ~(1 << 6);
// Setting AS(PJ1) LOW
PORTJ &= ~(1 << 1);
// Setting ASEL(PG5) LOW
PORTG &= ~(1 << 5);
// Pulse CLK(PH1), needed for SVP enhanced carts
pulse_clock(10);
// most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns // most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns
NOP; NOP;
@ -572,6 +590,12 @@ word readWord_MD(unsigned long myAddress) {
PORTH |= (1 << 3); PORTH |= (1 << 3);
// Setting OE(PH6) HIGH // Setting OE(PH6) HIGH
PORTH |= (1 << 6); PORTH |= (1 << 6);
// Setting AS(PJ1) HIGH
PORTJ |= (1 << 1);
// Setting ASEL(PG5) HIGH
PORTG |= (1 << 5);
// Pulse CLK(PH1), needed for SVP enhanced carts
pulse_clock(10);
// these 6x nop delays have been here before, unknown what they mean // these 6x nop delays have been here before, unknown what they mean
NOP; NOP;
@ -718,6 +742,12 @@ void getCartInfo_MD() {
id[c + 1] = loByte; id[c + 1] = loByte;
} }
//Identify games using SVP chip
if (!strncmp("GM MK-1229 ", id, 11) || !strncmp("GM G-7001 ", id, 11)) // Virtua Racing (E/U/J)
isSVP = 1;
else
isSVP = 0;
// Fix cartridge sizes according to no-intro database // Fix cartridge sizes according to no-intro database
if (cartSize == 0x400000) { if (cartSize == 0x400000) {
switch (chksum) { switch (chksum) {
@ -1414,6 +1444,14 @@ void readROM_MD() {
PORTH &= ~(1 << 3); PORTH &= ~(1 << 3);
// Setting OE(PH6) LOW // Setting OE(PH6) LOW
PORTH &= ~(1 << 6); PORTH &= ~(1 << 6);
// Setting AS(PJ1) LOW
PORTJ &= ~(1 << 1);
// Setting ASEL(PG5) LOW
PORTG &= ~(1 << 5);
// Pulse CLK(PH1)
if(isSVP)
pulse_clock(10);
// most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns // most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns
NOP; NOP;
NOP; NOP;
@ -1430,6 +1468,13 @@ void readROM_MD() {
PORTH |= (1 << 3); PORTH |= (1 << 3);
// Setting OE(PH6) HIGH // Setting OE(PH6) HIGH
PORTH |= (1 << 6); PORTH |= (1 << 6);
// Setting AS(PJ1) HIGH
PORTJ |= (1 << 1);
// Setting ASEL(PG5) HIGH
PORTG |= (1 << 5);
// Pulse CLK(PH1)
if(isSVP)
pulse_clock(10);
// Skip first 256 words // Skip first 256 words
if (((currBuffer == 0) && (currWord >= 256)) || (currBuffer > 0)) { if (((currBuffer == 0) && (currWord >= 256)) || (currBuffer > 0)) {
@ -1463,6 +1508,14 @@ void readROM_MD() {
PORTH &= ~(1 << 3); PORTH &= ~(1 << 3);
// Setting OE(PH6) LOW // Setting OE(PH6) LOW
PORTH &= ~(1 << 6); PORTH &= ~(1 << 6);
// Setting AS(PJ1) LOW
PORTJ &= ~(1 << 1);
// Setting ASEL(PG5) LOW
PORTG &= ~(1 << 5);
// Pulse CLK(PH1)
if(isSVP)
pulse_clock(10);
// most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns // most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns
NOP; NOP;
NOP; NOP;
@ -1479,6 +1532,13 @@ void readROM_MD() {
PORTH |= (1 << 3); PORTH |= (1 << 3);
// Setting OE(PH6) HIGH // Setting OE(PH6) HIGH
PORTH |= (1 << 6); PORTH |= (1 << 6);
// Setting AS(PJ1) HIGH
PORTJ |= (1 << 1);
// Setting ASEL(PG5) HIGH
PORTG |= (1 << 5);
// Pulse CLK(PH1)
if(isSVP)
pulse_clock(10);
// Skip first 256 words // Skip first 256 words
if (((currBuffer == 0) && (currWord >= 256)) || (currBuffer > 0)) { if (((currBuffer == 0) && (currWord >= 256)) || (currBuffer > 0)) {
@ -1513,6 +1573,14 @@ void readROM_MD() {
PORTH &= ~(1 << 3); PORTH &= ~(1 << 3);
// Setting OE(PH6) LOW // Setting OE(PH6) LOW
PORTH &= ~(1 << 6); PORTH &= ~(1 << 6);
// Setting AS(PJ1) LOW
PORTJ &= ~(1 << 1);
// Setting ASEL(PG5) LOW
PORTG &= ~(1 << 5);
// Pulse CLK(PH1)
if(isSVP)
PORTH ^= (1 << 1);
// most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns // most MD ROMs are 200ns, comparable to SNES > use similar access delay of 6 x 62.5 = 375ns
NOP; NOP;
NOP; NOP;
@ -1529,6 +1597,13 @@ void readROM_MD() {
PORTH |= (1 << 3); PORTH |= (1 << 3);
// Setting OE(PH6) HIGH // Setting OE(PH6) HIGH
PORTH |= (1 << 6); PORTH |= (1 << 6);
// Setting AS(PJ1) HIGH
PORTJ |= (1 << 1);
// Setting ASEL(PG5) HIGH
PORTG |= (1 << 5);
// Pulse CLK(PH1)
if(isSVP)
PORTH ^= (1 << 1);
calcCKSSonic2 += ((buffer[d] << 8) | buffer[d + 1]); calcCKSSonic2 += ((buffer[d] << 8) | buffer[d + 1]);
d += 2; d += 2;
@ -2012,7 +2087,6 @@ void EepromInit(byte eepmode) { // Acclaim Type 2
PORTL = 0x10; // ADDR A16-A23 PORTL = 0x10; // ADDR A16-A23
PORTA = 0x00; // DATA D8-D15 PORTA = 0x00; // DATA D8-D15
PORTH |= (1 << 0); // /RES HIGH PORTH |= (1 << 0); // /RES HIGH
PORTC = eepmode; // EEPROM Switch: 0 = Enable (Read EEPROM), 1 = Disable (Read ROM) PORTC = eepmode; // EEPROM Switch: 0 = Enable (Read EEPROM), 1 = Disable (Read ROM)
PORTH &= ~(1 << 3); // CE LOW PORTH &= ~(1 << 3); // CE LOW
PORTH &= ~(1 << 4) & ~(1 << 5); // /UDSW + /LDSW LOW PORTH &= ~(1 << 4) & ~(1 << 5); // /UDSW + /LDSW LOW
@ -2250,7 +2324,6 @@ void EepromSet1() {
} }
} }
void EepromDevice() { // 24C02+ void EepromDevice() { // 24C02+
EepromSet1(); EepromSet1();
EepromSet0(); EepromSet0();