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Merge pull request #998 from andy-miles/custom
Fix for VRC2B Famicom Carts
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commit
7c9a1b6c01
@ -2855,24 +2855,43 @@ void readCHR(bool readrom) {
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break;
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break;
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case 23: { // 128K
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case 23: { // 128K
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banks = int_pow(2, chrsize) * 4;
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// Detect VRC4e Carts - read PRG 0x1FFF6 (DATE)
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// Detect VRC4e Carts - read PRG 0x1FFF6 (DATE)
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// Boku Dracula-kun = 890810, Tiny Toon = 910809
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// Boku Dracula-kun = 890810, Tiny Toon = 910809
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// Crisis Force = 910701, Parodius Da! = 900916
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// Crisis Force = 910701, Parodius Da! = 900916
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write_prg_byte(0x8000, 15);
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write_prg_byte(0x8000, 15);
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bool vrc4e;
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uint8_t prgchk0 = read_prg_byte(0x9FF6);
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uint8_t prgchk0 = read_prg_byte(0x9FF6);
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if (prgchk0 == 0x30) { // Check for "0" in middle of date
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if (prgchk0 == 0x30) { // Check for "0" in middle of date. If true, assume VRC4e Cart
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vrc4e = true; // VRC4e Cart
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}
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banks = int_pow(2, chrsize) * 4;
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for (size_t i = 0; i < banks; i++) {
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for (size_t i = 0; i < banks; i++) {
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write_prg_byte(0xB000, i & 0xF); // CHR Bank Lower 4 bits
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write_prg_byte(0xB000, i & 0xF); // CHR Bank Lower 4 bits
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if (vrc4e == true)
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write_prg_byte(0xB004, (i >> 4) & 0xF); // CHR Bank Upper 4 bits VRC4e
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write_prg_byte(0xB004, (i >> 4) & 0xF); // CHR Bank Upper 4 bits VRC4e
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else
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write_prg_byte(0xB001, (i >> 4) & 0xF); // CHR Bank Upper 4 bits VRC2b/VRC4f
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dumpBankCHR(0x0, 0x400);
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dumpBankCHR(0x0, 0x400);
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}
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}
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break;
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}
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// VRC2b/VRC4f - See https://www.nesdev.org/wiki/VRC2_and_VRC4
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for (size_t i = 0; i < banks; i += 8) {
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write_prg_byte(0xB000, i & 0xF); // CHR Bank 0: Lower 4 bits
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write_prg_byte(0xB001, (i >> 4) & 0xF); // CHR Bank 0: Upper 4 bits
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write_prg_byte(0xB002, (i + 1) & 0xF); // CHR Bank 1: Lower 4 bits
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write_prg_byte(0xB003, ((i + 1) >> 4) & 0xF); // CHR Bank 1: Upper 4 bits
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write_prg_byte(0xC000, (i + 2) & 0xF); // CHR Bank 2: Lower 4 bits
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write_prg_byte(0xC001, ((i + 2) >> 4) & 0xF); // CHR Bank 2: Upper 4 bits
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write_prg_byte(0xC002, (i + 3) & 0xF); // CHR Bank 3: Lower 4 bits
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write_prg_byte(0xC003, ((i + 3) >> 4) & 0xF); // CHR Bank 3: Upper 4 bits
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write_prg_byte(0xD000, (i + 4) & 0xF); // CHR Bank 4: Lower 4 bits
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write_prg_byte(0xD001, ((i + 4) >> 4) & 0xF); // CHR Bank 4: Upper 4 bits
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write_prg_byte(0xD002, (i + 5) & 0xF); // CHR Bank 5: Lower 4 bits
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write_prg_byte(0xD003, ((i + 5) >> 4) & 0xF); // CHR Bank 5: Upper 4 bits
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write_prg_byte(0xE000, (i + 6) & 0xF); // CHR Bank 6: Lower 4 bits
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write_prg_byte(0xE001, ((i + 6) >> 4) & 0xF); // CHR Bank 6: Upper 4 bits
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write_prg_byte(0xE002, (i + 7) & 0xF); // CHR Bank 7: Lower 4 bits
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write_prg_byte(0xE003, ((i + 7) >> 4) & 0xF); // CHR Bank 7: Upper 4 bits
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dumpBankCHR(0x0, 0x2000); // 8 Banks for a total of 8 KiB
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}
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break;
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break;
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}
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}
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case 24: // 128K
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case 24: // 128K
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