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Update NES.ino
Updated Mapper 45 to handle Dynavision 101 Games and 106 Games carts (4096K PRG). Added Mappers 237, 289, 319, and 332. Mappers 289 and 332 need pulsing M2 code to dump properly.
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sakman55
GitHub
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14163dba6b
commit
9d02ed296d
@ -83,7 +83,7 @@ static const struct mapper_NES PROGMEM mapsize[] = {
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{ 42, 0, 3, 0, 5, 0, 0 }, // AC08/LH09 (FDS games hacked to cartridges)
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{ 43, 2, 2, 0, 0, 0, 0 }, // TONY-I / YS-612 [88KiB]
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// { 44, 5, 6, 7, 8, 0, 0 }, Super HiK 7-in-1 (MMC3) [TODO]
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{ 45, 3, 6, 0, 8, 0, 0 }, // TC3294/GA23C
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{ 45, 3, 8, 0, 8, 0, 0 }, // TC3294/GA23C
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{ 46, 1, 6, 0, 8, 0, 0 }, // GameStation/RumbleStation
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{ 47, 4, 5, 6, 7, 0, 0 }, // Nintendo NES-QJ (2-in-1)
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{ 48, 3, 4, 6, 6, 0, 0 }, // Taito TC0690/TC0190+PAL16R4
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@ -214,6 +214,7 @@ static const struct mapper_NES PROGMEM mapsize[] = {
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{ 233, 6, 6, 0, 0, 0, 0 }, // BMC 22-IN-1/20-IN-1 (42-IN-1) [UNLICENSED]
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{ 235, 6, 8, 0, 0, 0, 0 }, // "Golden Game" multicarts [UNLICENSED]
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{ 236, 0, 6, 0, 5, 0, 0 }, // Realtec 8031, 8099, 8106, 8155 [UNLICENSED]
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{ 237, 6, 6, 0, 0, 0, 0 }, // teletubbies 420-in-1/42-in-1 Y2K [UNLICENSED]
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{ 240, 1, 5, 1, 5, 0, 3 }, // C&E Bootleg Board (Sheng Huo Lie Zhuan, Jing Ke Xin Zhuan) [UNLICENSED]
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{ 241, 3, 5, 0, 0, 0, 0 }, // BxROM with WRAM [UNLICENSED]
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{ 242, 5, 5, 0, 0, 0, 0 }, // ET-113 [UNLICENSED]
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@ -223,8 +224,11 @@ static const struct mapper_NES PROGMEM mapsize[] = {
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{ 255, 4, 7, 5, 8, 0, 0 }, // 110-in-1 multicart (same as 225) [UNLICENSED]
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// 264 - Yoko [TODO]
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{ 268, 0, 11, 0, 8, 0, 0 }, // 268.0 MindKids/CoolGirl [UNLICENSED]
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{ 289, 5, 7, 0, 0, 0, 0 }, // bmc-60311c 17-in-1/76-in-1 [UNLICENSED]
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{ 315, 0, 5, 0, 7, 0, 0 }, // BMC-830134C [UNLICENSED]
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{ 319, 3, 3, 4, 4, 0, 0 }, // hp-898f [UNLICENSED]
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{ 329, 1, 7, 0, 0, 0, 3 }, // UNL-EDU2000, same as 177 [UNLICENSED]
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{ 332, 4, 4, 5, 5, 0, 0 }, // bmc-ws [UNLICENSED]
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{ 366, 0, 6, 0, 8, 0, 0 }, // GN-45 [UNLICENSED]
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{ 446, 0, 8, 0, 0, 0, 0 }, // Mindkids SMD172B_FGPA submapper 0 & 1 [UNLICENSED]
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{ 470, 0, 11, 0, 0, 0, 0 }, // INX_007T_V01 [UNLICENSED]
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@ -1064,7 +1068,7 @@ static void write_reg_m59(unsigned int address) {
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set_address(0);
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}
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// Multicart Mapper 226
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// Multicart Mappers 226/289/332
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static void write_prg_pulsem2(unsigned int address, uint8_t data) {
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PHI2_LOW;
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ROMSEL_HI;
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@ -1121,6 +1125,35 @@ void dumpPRG_pulsem2(word base, word address) {
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myFile.write(sdBuffer, 512);
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}
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// Multicart Mapper 332
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static unsigned char read_chr_pulsem2(unsigned int address) {
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PHI2_LOW;
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MODE_READ;
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PHI2_HI;
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ROMSEL_HI;
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PHI2_LOW;
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set_address(address);
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PHI2_HI;
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CHR_READ_LOW;
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PHI2_LOW;
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for (unsigned int i = 0; i < 8; i++) {
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PHI2_LOW;
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PHI2_HI;
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}
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uint8_t result = PINK;
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PHI2_LOW;
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CHR_READ_HI;
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PHI2_HI;
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return result;
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}
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void dumpCHR_pulsem2(word address) {
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for (int x = 0; x < 512; x++) {
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sdBuffer[x] = read_chr_pulsem2(address + x);
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}
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myFile.write(sdBuffer, 512);
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}
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/******************************************
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File Functions
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*****************************************/
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@ -2293,26 +2326,37 @@ void readPRG(bool readrom) {
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case 45: // MMC3 Clone with Outer Registers
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banks = ((int_pow(2, prgsize) * 2)) - 2; // Set Number of Banks
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for (size_t i = 0; i < banks; i += 2) { // 128K/256K/512K/1024K
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// set outer bank registers
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write_prg_byte(0x6000, 0); // CHR-OR
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write_prg_byte(0x6000, (i & 0xC0)); // PRG-OR
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write_prg_byte(0x6000, ((i >> 2) & 0xC0)); // CHR-AND,CHR-OR/PRG-OR
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write_prg_byte(0x6000, 0x80); // PRG-AND
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// set inner bank registers
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write_prg_byte(0x8000, 6); // PRG Bank 0 ($8000-$9FFF)
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write_prg_byte(0x8001, i);
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dumpBankPRG(0x0, 0x2000, base);
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// set outer bank registers
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write_prg_byte(0x6000, 0); // CHR-OR
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write_prg_byte(0x6000, ((i + 1) & 0xC0)); // PRG-OR
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write_prg_byte(0x6000, (((i + 1) >> 2) & 0xC0)); // CHR-AND,CHR-OR/PRG-OR
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write_prg_byte(0x6000, 0x80); // PRG-AND
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// set inner bank registers
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write_prg_byte(0x8000, 7); // PRG Bank 1 ($A000-$BFFF)
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write_prg_byte(0x8001, i + 1);
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dumpBankPRG(0x2000, 0x4000, base);
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for (word address = 0x0; address < 0x2000; address += 512) {
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// set outer bank registers
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write_prg_byte(0x6000, 0x00); // CHR-OR
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write_prg_byte(0x6000, (i & 0xC0)); // PRG-OR
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write_prg_byte(0x6000, ((i >> 2) & 0xC0)); // CHR-AND,CHR-OR/PRG-OR
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write_prg_byte(0x6000, 0x80); // PRG-AND
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// set inner bank registers
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write_prg_byte(0x8000, 6); // PRG Bank 0 ($8000-$9FFF)
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write_prg_byte(0x8001, i);
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dumpPRG(base, address);
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}
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for (word address = 0x2000; address < 0x4000; address += 512) {
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// set outer bank registers
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write_prg_byte(0x6000, 0x00); // CHR-OR
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write_prg_byte(0x6000, ((i + 1) & 0xC0)); // PRG-OR
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write_prg_byte(0x6000, (((i + 1) >> 2) & 0xC0)); // CHR-AND,CHR-OR/PRG-OR
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write_prg_byte(0x6000, 0x80); // PRG-AND
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// set inner bank registers
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write_prg_byte(0x8000, 7); // PRG Bank 1 ($A000-$BFFF)
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write_prg_byte(0x8001, i + 1);
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dumpPRG(base, address);
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}
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}
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for (word address = 0x4000; address < 0x8000; address += 512) { // Final 2 Banks ($C000-$FFFF)
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// set outer bank registers
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write_prg_byte(0x6000, 0x00); // CHR-OR
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write_prg_byte(0x6000, 0xC0); // PRG-OR
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write_prg_byte(0x6000, 0xC0); // CHR-AND,CHR-OR/PRG-OR
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write_prg_byte(0x6000, 0x80); // PRG-AND
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dumpPRG(base, address);
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}
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dumpBankPRG(0x4000, 0x8000, base); // Final 2 Banks ($C000-$FFFF)
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break;
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case 46:
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@ -2902,6 +2946,14 @@ void readPRG(bool readrom) {
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}
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break;
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case 237: // 1024K
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banks = int_pow(2, prgsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_pulsem2(0x8000, i | 0xC0); // 32K NROM Mode
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dumpBankPRG(0x0, 0x8000, base);
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}
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break;
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case 240:
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banks = int_pow(2, prgsize) / 2;
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for (size_t i = 0; i < banks; i++) {
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@ -2932,6 +2984,35 @@ void readPRG(bool readrom) {
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}
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break;
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case 289: // 512K/1024K/2048K
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banks = int_pow(2, prgsize);
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for (int i = 0; i < banks; i++) {
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for (word address = 0; address < 0x4000; address += 512) { // 16K
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write_prg_pulsem2(0x6000, 0); // NROM-128 Mode
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write_prg_pulsem2(0x6001, i); // Set Bank
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dumpPRG_pulsem2(base, address);
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}
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}
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break;
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case 319: // 128K
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banks = int_pow(2, prgsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x6004, (i << 3) | 0x40); // prg a14 = cpu a14 (NROM-256)
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dumpBankPRG(0x0, 0x8000, base);
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}
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break;
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case 332: // 256K
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banks = int_pow(2, prgsize);
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for (int i = 0; i < banks; i++) {
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for (word address = 0x0; address < 0x4000; address += 512) {
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write_prg_pulsem2(0x6000, 0x08 | (i & 0x07) | ((i & 0x08) << 3));
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dumpPRG_pulsem2(base, address);
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}
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}
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break;
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case 446:
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banks = int_pow(2, prgsize) * 2;
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write_prg_byte(0x5003, 0);
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@ -3824,6 +3905,25 @@ void readCHR(bool readrom) {
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dumpBankCHR(0x1000, 0x1400);
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}
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break;
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case 319: // 64K
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banks = int_pow(2, chrsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x6000, i << 4);
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dumpBankCHR(0x0, 0x2000);
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}
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break;
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case 332: // 128K
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banks = int_pow(2, chrsize) / 2;
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for (int i = 0; i < banks; i++) {
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for (word address = 0x0; address < 0x2000; address += 512) {
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write_prg_pulsem2(0x6000, (i & 0x08) << 3);
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write_prg_pulsem2(0x6001, 0x30 | (i & 0x07));
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dumpCHR_pulsem2(address);
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}
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}
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break;
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}
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if (!readrom) {
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myFile.flush();
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