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added NES mappers 59+63+113+126+134+174
added NES mappers 59+63+113+126+134+174
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nsx0r
GitHub
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a72abda056
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a18434b8fc
@ -65,8 +65,10 @@ static const byte PROGMEM mapsize[] = {
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48, 3, 4, 6, 6, 0, 0, // taito tc0690
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52, 0, 3, 0, 3, 0, 0, // Realtec 8213 [UNLICENSED]
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58, 1, 6, 1, 6, 0, 0, // BMC-GKB (C)NROM-based multicarts, duplicate of mapper 213 [UNLICENSED]
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59, 0, 3, 0, 4, 0, 0, // BMC-T3H53 & BMC-D1038 [UNLICENSED]
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60, 2, 2, 3, 3, 0, 0, // Reset-based NROM-128 4-in-1 multicarts [UNLICENSED]
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62, 7, 7, 8, 8, 0, 0, // K-1017P [UNLICENSED]
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63, 0, 8, 0, 0, 0, 0, // NTDEC "Powerful" multicart [UNLICENSED]
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64, 2, 3, 4, 5, 0, 0, // tengen rambo-1 [UNLICENSED]
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65, 3, 4, 5, 6, 0, 0, // irem h-3001
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66, 2, 3, 2, 3, 0, 0, // gxrom/mhrom
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@ -97,9 +99,12 @@ static const byte PROGMEM mapsize[] = {
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96, 3, 3, 0, 0, 0, 0, // (oeka kids)
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97, 4, 4, 0, 0, 0, 0, // irem tam-s1 (kaiketsu yanchamaru)
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105, 4, 4, 0, 0, 0, 0, // (nintendo world Championships 1990) [UNTESTED]
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113, 1, 4, 0, 5, 0, 0, // NINA-03/06 [UNLICENSED]
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111, 5, 5, 0, 0, 0, 0, // GTROM [UNLICENSED]
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118, 3, 4, 5, 5, 0, 1, // txsrom/mmc3 [sram r/w]
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119, 3, 3, 4, 4, 0, 0, // tqrom/mmc3
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126, 1, 8, 0, 8, 0, 0, // MMC3-based multicart (PJ-008, AT-207) [UNLICENSED]
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134, 1, 8, 0, 8, 0, 0, // T4A54A, WX-KB4K, or BS-5652 [UNLICENSED]
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140, 3, 3, 3, 5, 0, 0, // jaleco jf-11/jf-14
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142, 1, 3, 0, 0, 0, 0, // UNL-KS7032 [UNLICENSED]
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146, 1, 2, 2, 3, 0, 0, // Sachen 3015 [UNLICENSED]
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@ -112,6 +117,7 @@ static const byte PROGMEM mapsize[] = {
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159, 3, 4, 5, 6, 1, 1, // bandai x24c01 [eep r/w]
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162, 6, 7, 0, 0, 0, 0, // Waixing FS304 [UNLICENSED]
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163, 6, 7, 0, 0, 0, 0, // Nanjing FC-001 [UNLICENSED]
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174, 3, 3, 4, 4, 0, 0, // NTDEC 5-in-1 [UNLICENSED]
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176, 4, 4, 5, 5, 0, 0, // 8025 enhanced MMC3 [UNLICENSED]
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177, 1, 7, 0, 0, 0, 0, // Henggedianzi Super Rich PCB [UNLICENSED]
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178, 5, 5, 0, 0, 0, 0, // some Waixing PCBs [UNLICENSED]
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@ -2885,6 +2891,16 @@ void readPRG(boolean readrom) {
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}
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}
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break;
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case 59:
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banks = int_pow(2, prgsize) ;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x8000 + (i & 0x07) << 4 | 0x80, 0);
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for (word address = 0x0; address < 0x4000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 60:
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for (word address = 0; address < 0x4000; address += 512) {
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@ -2918,6 +2934,16 @@ void readPRG(boolean readrom) {
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}
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}
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break;
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case 63:
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banks = int_pow(2, prgsize);
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x8000 + (i & 0xFF) << 2, 0);
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for (word address = 0x0; address < 0x4000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 67: // 128K
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banks = int_pow(2, prgsize);
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@ -3149,6 +3175,47 @@ void readPRG(boolean readrom) {
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}
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break;
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case 113:
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banks = int_pow(2, prgsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x4100, (i & 0x07) << 3);
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for (word address = 0x0; address < 0x8000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 126:
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banks = int_pow(2, prgsize) * 2;
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write_prg_byte(0xA001, 0x80); // enable WRAM
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write_prg_byte(0x6003, 0x00); // set MMC3 banking mode
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for (int i = 0; i < banks; i += 2) {
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write_prg_byte(0x6000, (i & 0x180) >> 3 | (i & 0x70) >> 4); // select outer bank
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write_prg_byte(0x8000, 6); // 8k bank 0 at $8000
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write_prg_byte(0x8001, i);
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write_prg_byte(0x8000, 7); // 8k bank 1 at $A000
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write_prg_byte(0x8001, i + 1);
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for (word address = 0x0; address < 0x4000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 134:
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banks = int_pow(2, prgsize) * 2;
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write_prg_byte(0x6000, 0x00); // set MMC3 banking mode
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for (int i = 0; i < banks; i += 2) {
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write_prg_byte(0x6001, (i & 0x30) >> 4); // select outer bank
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write_prg_byte(0x8000, 6); // 8k bank 0 at $8000
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write_prg_byte(0x8001, i);
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write_prg_byte(0x8000, 7); // 8k bank 1 at $A000
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write_prg_byte(0x8001, i + 1);
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for (word address = 0x0; address < 0x4000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 142:
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banks = int_pow(2, prgsize) * 2;
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base = 0x6000; // 4x 8k switchable PRG ROM banks at $6000-$DFFF
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@ -3216,6 +3283,15 @@ void readPRG(boolean readrom) {
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}
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}
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break;
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case 174: // 128k
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for (int i = 0; i < 8; i++) {
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write_prg_byte(0xFF00 + (i << 4), 0);
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for (word address = 0x0; address < 0x4000; address += 512) {
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dumpPRG(base, address);
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}
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}
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break;
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case 176:
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banks = int_pow(2, prgsize) * 2;
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@ -3858,6 +3934,16 @@ void readCHR(boolean readrom) {
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}
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}
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break;
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case 59:
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banks = int_pow(2, chrsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x8000 + (i & 0x07), 0);
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for (word address = 0x0; address < 0x2000; address += 512) {
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dumpCHR(address);
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}
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}
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break;
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case 60:
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for (int i = 0; i < 4; i++) {
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@ -4099,6 +4185,47 @@ void readCHR(boolean readrom) {
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}
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}
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break;
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case 113:
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banks = int_pow(2, chrsize) / 2;
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for (int i = 0; i < banks; i++) {
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write_prg_byte(0x4100, (i & 0x08) << 3 | (i & 0x07));
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for (word address = 0x0; address < 0x2000; address += 512) {
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dumpCHR(address);
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}
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}
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break;
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case 126:
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banks = int_pow(2, chrsize) * 2;
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write_prg_byte(0xA001, 0x80); // enable WRAM
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write_prg_byte(0x6003, 0x00); // set MMC3 banking mode
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for (int i = 0; i < banks; i += 2) {
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write_prg_byte(0x6000, (i & 0x200) >> 5 | (i & 0x100) >> 3); // select outer bank
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write_prg_byte(0x8000, 0); // 2k bank 0 at $0000
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write_prg_byte(0x8001, i);
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write_prg_byte(0x8000, 1); // 2k bank 1 at $0800
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write_prg_byte(0x8001, i + 2);
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for (word address = 0x0; address < 0x1000; address += 512) {
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dumpCHR(address);
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}
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}
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break;
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case 134:
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banks = int_pow(2, chrsize) * 2;
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write_prg_byte(0x6000, 0x00); // set MMC3 banking mode
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for (int i = 0; i < banks; i += 2) {
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write_prg_byte(0x6001, (i & 0x180) >> 3); // select outer bank
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write_prg_byte(0x8000, 0); // 2k bank 0 at $0000
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write_prg_byte(0x8001, i);
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write_prg_byte(0x8000, 1); // 2k bank 1 at $0800
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write_prg_byte(0x8001, i + 2);
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for (word address = 0x0; address < 0x1000; address += 512) {
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dumpCHR(address);
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}
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}
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break;
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case 140: // 32K/128K
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banks = int_pow(2, chrsize) / 2;
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@ -4109,6 +4236,15 @@ void readCHR(boolean readrom) {
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}
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}
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break;
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case 174: // 64k
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for (int i = 0; i < 8; i++) {
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write_prg_byte(0xFF00 + (i << 1), 0);
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for (word address = 0x0; address < 0x2000; address += 512) {
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dumpCHR(address);
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}
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}
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break;
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case 176:
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banks = int_pow(2, chrsize) * 4;
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