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V18: Add SA-1 SRAM write support by skaman

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Many thanks to skaman for finding out how to write the SA-1 SRAM.
This commit is contained in:
sanni 2016-08-25 12:25:04 +02:00 committed by GitHub
parent 1603c87256
commit ee01ff3bfa
2 changed files with 44 additions and 9 deletions
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8
Cart_Reader/Cart_Reader.ino
View File

@ -2,8 +2,8 @@
Cartridge Reader for Arduino Mega2560 Cartridge Reader for Arduino Mega2560
Author: sanni Author: sanni
Date: 2016-08-22 Date: 2016-08-25
Version: V17H Version: V18
SD lib: https://github.com/greiman/SdFat SD lib: https://github.com/greiman/SdFat
LCD lib: https://github.com/adafruit/Adafruit_SSD1306 LCD lib: https://github.com/adafruit/Adafruit_SSD1306
@ -16,7 +16,7 @@
MichlK - ROM-Reader for Super Nintendo MichlK - ROM-Reader for Super Nintendo
Jeff Saltzman - 4-Way Button Jeff Saltzman - 4-Way Button
Wayne and Layne - Video-Game-Shield menu Wayne and Layne - Video-Game-Shield menu
skaman - SNES enhancements skaman - SNES enhancements and SA1 sram support
nocash - Nintendo Power commands nocash - Nintendo Power commands
crazynation - N64 bus timing crazynation - N64 bus timing
hkz/themanbehindthecurtain - N64 flashram commands hkz/themanbehindthecurtain - N64 flashram commands
@ -31,7 +31,7 @@
Pickle - SDD1 fix Pickle - SDD1 fix
**********************************************************************************/ **********************************************************************************/
char ver[5] = "V17G"; char ver[5] = "V18";
/****************************************** /******************************************
Define Output Define Output

45
Cart_Reader/SNS.ino
View File

@ -932,14 +932,49 @@ void writeSRAM (boolean browseFile) {
} }
// SA1 // SA1
else if (romType == SA) { else if (romType == SA) {
// Writing SRAM on HiRom needs CS(PH3) to be high long lastByte = (long(sramSize) * 0x80);
// Enable CPU Clock
clockgen.set_freq(357954500ULL, SI5351_PLL_FIXED, SI5351_CLK1);
clockgen.output_enable(SI5351_CLK1, 1);
// Direct writes to BW-RAM (SRAM) in banks 0x40-0x43 don't work
// Break BW-RAM (SRAM) into 0x2000 blocks
// Use $2225 to map BW-RAM block to 0x6000-0x7FFF
// Writes must be to entire address range 0x0000-0x7FFF
byte lastBlock = 0;
lastBlock = lastByte / 0x2000;
// Writing SRAM on SA1 needs CS(PH3) to be high
PORTH |= (1 << 3); PORTH |= (1 << 3);
// Sram size
long lastByte = (long(sramSize) * 128); for (byte currBlock = 0; currBlock < lastBlock; currBlock++) {
for (long currByte = 0x0; currByte < lastByte; currByte++) { // Set 0x2225 (SA-1 BMAP) to map SRAM Block to 0x6000-0x7FFF
writeBank_SNES(0x40, currByte, myFile.read()); writeBank_SNES(0, 0x2225, currBlock);
// Set 0x2227 to 0x80 SA-1 SWBE BW-RAM Write Enable
writeBank_SNES(0, 0x2227, 0x80);
for (long currByte = 0x0000; currByte < 0x8000; currByte += 512) {
if (currByte < 0x6000) {
for (unsigned long c = 0; c < 512; c++) {
// Shift to bypass protected 1st 0x100 bytes
writeBank_SNES(0, currByte + c, currBlock + lastBlock);
} }
} }
else {
myFile.read(sdBuffer, 512);
for (unsigned long c = 0; c < 512; c++) {
writeBank_SNES(0, currByte + c, sdBuffer[c]);
// Wait a little to prevent 1 byte write error
__asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t");
}
}
}
}
// Set 0x2227 to 0x00 SA-1 SWBE BW-RAM Write Disable
writeBank_SNES(0, 0x2227, 0x00);
// Disable CPU clock
clockgen.output_enable(SI5351_CLK1, 0);
}
// Set pins to input // Set pins to input
dataIn(); dataIn();