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PPCRec: Fix stack pointer alignment for calls

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Exzap 2024-10-30 03:49:42 +01:00
parent 83569ae66b
commit 8219a5f9e7
1 changed files with 6 additions and 3 deletions
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9
src/Cafe/HW/Espresso/Recompiler/BackendX64/BackendX64.cpp
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@ -177,6 +177,7 @@ bool PPCRecompilerX64Gen_imlInstruction_macro(PPCRecFunction_t* PPCRecFunction,
{ {
if (imlInstruction->operation == PPCREC_IML_MACRO_B_TO_REG) if (imlInstruction->operation == PPCREC_IML_MACRO_B_TO_REG)
{ {
//x64Gen_int3(x64GenContext);
uint32 branchDstReg = _reg32(imlInstruction->op_macro.paramReg); uint32 branchDstReg = _reg32(imlInstruction->op_macro.paramReg);
if(X86_REG_RDX != branchDstReg) if(X86_REG_RDX != branchDstReg)
x64Gen_mov_reg64_reg64(x64GenContext, X86_REG_RDX, branchDstReg); x64Gen_mov_reg64_reg64(x64GenContext, X86_REG_RDX, branchDstReg);
@ -553,10 +554,12 @@ void PPCRecompilerX64Gen_imlInstruction_atomic_cmp_store(PPCRecFunction_t* PPCRe
void PPCRecompilerX64Gen_imlInstruction_call_imm(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction) void PPCRecompilerX64Gen_imlInstruction_call_imm(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction)
{ {
// the register allocator takes care of spilling volatile registers and moving parameters to the right registers, so we don't need to do any special handling here // the register allocator takes care of spilling volatile registers and moving parameters to the right registers, so we don't need to do any special handling here
x64GenContext->emitter->SUB_qi8(X86_REG_RSP, 0x28); // reserve enough space for any parameters while keeping stack alignment of 16 intact x64GenContext->emitter->SUB_qi8(X86_REG_RSP, 0x20); // reserve enough space for any parameters while keeping stack alignment of 16 intact
x64GenContext->emitter->MOV_qi64(X86_REG_RAX, imlInstruction->op_call_imm.callAddress); x64GenContext->emitter->MOV_qi64(X86_REG_RAX, imlInstruction->op_call_imm.callAddress);
x64GenContext->emitter->CALL_q(X86_REG_RAX); x64GenContext->emitter->CALL_q(X86_REG_RAX);
x64GenContext->emitter->ADD_qi8(X86_REG_RSP, 0x28); x64GenContext->emitter->ADD_qi8(X86_REG_RSP, 0x20);
// a note about the stack pointer:
// currently the code generated by generateEnterRecompilerCode makes sure the stack is 16 byte aligned, so we don't need to fix it up here
} }
bool PPCRecompilerX64Gen_imlInstruction_r_r(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction) bool PPCRecompilerX64Gen_imlInstruction_r_r(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction)
@ -1623,7 +1626,7 @@ void PPCRecompilerX64Gen_generateEnterRecompilerCode()
{ {
x64GenContext_t x64GenContext{}; x64GenContext_t x64GenContext{};
// start of recompiler entry function // start of recompiler entry function (15 regs)
x64Gen_push_reg64(&x64GenContext, X86_REG_RAX); x64Gen_push_reg64(&x64GenContext, X86_REG_RAX);
x64Gen_push_reg64(&x64GenContext, X86_REG_RCX); x64Gen_push_reg64(&x64GenContext, X86_REG_RCX);
x64Gen_push_reg64(&x64GenContext, X86_REG_RDX); x64Gen_push_reg64(&x64GenContext, X86_REG_RDX);