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695 lines
24 KiB
ArmAsm
695 lines
24 KiB
ArmAsm
@/******************************************************************************
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@ *
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@ * Copyright (C) 2015 The Android Open Source Project
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@ *
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@ * Licensed under the Apache License, Version 2.0 (the "License");
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@ * you may not use this file except in compliance with the License.
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@ * You may obtain a copy of the License at:
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@ *
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@ * http://www.apache.org/licenses/LICENSE-2.0
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@ *
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@ * Unless required by applicable law or agreed to in writing, software
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@ * distributed under the License is distributed on an "AS IS" BASIS,
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@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@ * See the License for the specific language governing permissions and
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@ * limitations under the License.
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@ *
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@ *****************************************************************************
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@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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@*/
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@**
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@*******************************************************************************
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@* @file
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@* ih264_resi_trans_quant_a9.s
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@*
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@* @brief
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@* Contains function definitions for residual and forward trans
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@*
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@* @author
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@* Ittiam
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@*
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@* @par List of Functions:
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@* ih264_resi_trans_quant_4x4_a9
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@* ih264_resi_trans_quant_8x8_a9
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@* ih264_resi_trans_quant_chroma_4x4_a9
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@* ih264_hadamard_quant_4x4_a9
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@* ih264_hadamard_quant_2x2_uv_a9
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@*
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@* @remarks
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@* None
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@*
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@*******************************************************************************
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.text
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.p2align 2
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@*****************************************************************************
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@*
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@* Function Name : ih264_resi_trans_quant_4x4_a9
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@* Description : This function does cf4 of H264
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@*
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@* Arguments : R0 :pointer to src buffer
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@ R1 :pointer to pred buffer
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@ R2 :pointer to dst buffer
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@ R3 :source stride
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@ STACK : pred stride,
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@ dst stride,
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@ pointer to scaling matrix,
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@ pointer to threshold matrix,
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@ qbits,
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@ rounding factor,
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@ pointer to store nnz
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@ pointer to store non quantized dc value
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@ Values Returned : NONE
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@
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@ Register Usage :
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@ Stack Usage : 40 bytes
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@ Cycles : Around
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@ Interruptiaility : Interruptable
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@
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@ Known Limitations
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@ \Assumptions :
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@
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@ Revision History :
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@ DD MM YYYY Author(s) Changes
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@ 1 12 2013 100633 First version
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@ 20 1 2014 100633 Changes the API, Optimization
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@
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@*****************************************************************************
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.global ih264_resi_trans_quant_4x4_a9
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ih264_resi_trans_quant_4x4_a9:
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@R0 :pointer to src buffer
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@R1 :pointer to pred buffer
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@R2 :pointer to dst buffer
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@R3 :Source stride
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@STACk :pred stride
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@ :scale matirx,
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@ :threshold matrix
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@ :qbits
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@ :round factor
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@ :nnz
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push {r4-r12, lr} @push all the variables first
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add r11, sp, #40 @decrement stack pointer,to accomodate two variables
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ldmfd r11, {r4-r10} @load the strides into registers
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@R0 :pointer to src buffer
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@R1 :pointer to pred buffer
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@R2 :pointer to dst buffer
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@R3 :Source stride
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@R4 :Pred stride
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@R5 :scale matirx,
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@R6 :threshold matrix
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@R7 :qbits
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@R8 :round factor
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@R9 :nnz
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vpush {d8-d15}
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mov r11, #0
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sub r7, r11, r7 @Negate the qbit value for usiing LSL
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@------------Fucntion Loading done----------------;
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vld1.u8 d30, [r0], r3 @load first 8 pix src row 1
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vld1.u8 d31, [r1], r4 @load first 8 pix pred row 1
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vld1.u8 d28, [r0], r3 @load first 8 pix src row 2
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vld1.u8 d29, [r1], r4 @load first 8 pix pred row 2
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vld1.u8 d26, [r0], r3 @load first 8 pix src row 3
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vld1.u8 d27, [r1], r4 @load first 8 pix pred row 3
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vsubl.u8 q0, d30, d31 @find residue row 1
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vld1.u8 d24, [r0], r3 @load first 8 pix src row 4
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vld1.u8 d25, [r1], r4 @load first 8 pix pred row 4
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vsubl.u8 q1, d28, d29 @find residue row 2
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vsubl.u8 q2, d26, d27 @find residue row 3
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vsubl.u8 q3, d24, d25 @find residue row 4
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vtrn.16 d0, d2 @T12
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vtrn.16 d4, d6 @T23
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vtrn.32 d0, d4 @T13
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vtrn.32 d2, d6 @T14
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vadd.s16 d8 , d0, d6 @x0 = x4+x7
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vadd.s16 d9 , d2, d4 @x1 = x5+x6
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vsub.s16 d10, d2, d4 @x2 = x5-x6
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vsub.s16 d11, d0, d6 @x3 = x4-x7
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vshl.s16 d12, d10, #1 @U_SHIFT(x2,1,shft)
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vshl.s16 d13, d11, #1 @U_SHIFT(x3,1,shft)
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vadd.s16 d14, d8, d9 @x4 = x0 + x1;
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vsub.s16 d16, d8, d9 @x6 = x0 - x1;
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vadd.s16 d15, d13, d10 @x5 = U_SHIFT(x3,1,shft) + x2;
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vsub.s16 d17, d11, d12 @x7 = x3 - U_SHIFT(x2,1,shft);
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@taking transpose again so as to make do vert transform
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vtrn.16 d14, d15 @T12
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vtrn.16 d16, d17 @T23
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vtrn.32 d14, d16 @T13
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vtrn.32 d15, d17 @T24
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@let us do vertical transform
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@same code as horiz
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vadd.s16 d18, d14, d17 @x0 = x4+x7
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vadd.s16 d19, d15, d16 @x1 = x5+x6
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vsub.s16 d20, d15, d16 @x2 = x5-x6
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vsub.s16 d21, d14, d17 @x3 = x4-x7
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vshl.s16 d22, d20, #1 @U_SHIFT(x2,1,shft)
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vshl.s16 d23, d21, #1 @U_SHIFT(x3,1,shft)
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vdup.s32 q4, r8 @Load rounding value row 1
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vadd.s16 d24, d18, d19 @x5 = x0 + x1;
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vsub.s16 d26, d18, d19 @x7 = x0 - x1;
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vadd.s16 d25, d23, d20 @x6 = U_SHIFT(x3,1,shft) + x2;
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vsub.s16 d27, d21, d22 @x8 = x3 - U_SHIFT(x2,1,shft);
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vdup.s32 q10, r7 @Load qbit values
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vst1.s16 d24[0], [r10] @Store the dc value to alternate dc sddress
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@core tranform is done for 4x8 block 1
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vld1.s16 {q14-q15}, [r5] @load the scaling values
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vabs.s16 q0, q12 @Abs val of row 1 blk 1
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vabs.s16 q1, q13 @Abs val of row 2 blk 1
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vmov.s32 q5, q4 @copy round fact for row 2
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vmov.s32 q6, q4 @copy round fact for row 2
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vclt.s16 q2, q12, #0 @Get the sign of row 1 blk 1
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vmov.s32 q7, q4 @copy round fact for row 2
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vclt.s16 q3, q13, #0 @Get the sign of row 2 blk 1
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vmlal.s16 q4, d0, d28 @Multiply and add row 1
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vmlal.s16 q5, d1, d29 @Multiply and add row 2
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vmlal.s16 q6, d2, d30 @Multiply and add row 3
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vmlal.s16 q7, d3, d31 @Multiply and add row 4
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vshl.s32 q11, q4, q10 @Shift row 1
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vshl.s32 q12, q5, q10 @Shift row 2
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vshl.s32 q13, q6, q10 @Shift row 3
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vshl.s32 q14, q7, q10 @Shift row 4
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vmovn.s32 d30, q11 @Narrow row 1
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vmovn.s32 d31, q12 @Narrow row 2
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vmovn.s32 d0 , q13 @Narrow row 3
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vmovn.s32 d1 , q14 @Narrow row 4
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vneg.s16 q1, q15 @Get negative
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vneg.s16 q4, q0 @Get negative
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vceq.s16 q5, q15, #0 @I compare with zero row 1 and 2 blk 1
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vceq.s16 q6, q0 , #0 @I compare with zero row 1 and 2 blk 1
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vbsl.s16 q2, q1, q15 @Restore sign of row 1 and 2
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vbsl.s16 q3, q4, q0 @Restore sign of row 3 and 4
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vmovn.u16 d14, q5 @I Narrow the comparison for row 1 and 2 blk 1
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vmovn.u16 d15, q6 @I Narrow the comparison for row 1 and 2 blk 2
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vshr.u8 q8, q7, #7 @I Reduce comaparison bit to a signle bit row 1 and 2 blk 1 and 2 [ keep the value for later use ]
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vpadd.u8 d18, d16, d17 @I pair add nnz 1
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vpadd.u8 d20, d18, d19 @I Pair add nnz 2
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vpadd.u8 d22, d20, d21 @I Pair add nnz 3
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vpadd.u8 d24, d22, d23 @I Pair add nnz4
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vst1.s16 {q2-q3}, [r2] @Store blk
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vmov.u8 d25, #16 @I Get max nnz
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vsub.u8 d26, d25, d24 @I invert current nnz
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vst1.u8 d26[0], [r9] @I Write nnz
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vpop {d8-d15}
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pop {r4-r12, pc}
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@*****************************************************************************
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@*
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@* Function Name : ih264_resi_trans_quant_chroma_4x4_a9
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@* Description : This function does residue calculation, forward transform
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@* and quantization for 4x4 chroma block.
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@*
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@* Arguments : R0 :pointer to src buffer
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@ R1 :pointer to pred buffer
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@ R2 :pointer to dst buffer
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@ R3 :source stride
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@ STACK : pred stride,
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@ dst stride,
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@ pointer to scaling matrix,
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@ pointer to threshold matrix,
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@ qbits,
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@ rounding factor,
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@ pointer to store nnz
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@ pointer to store unquantized dc values
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@ Values Returned : NONE
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@
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@ Register Usage :
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@ Stack Usage : 40 bytes
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@ Cycles : Around
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@ Interruptiaility : Interruptable
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@
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@ Known Limitations
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@ \Assumptions :
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@
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@ Revision History :
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@ DD MM YYYY Author(s) Changes
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@ 11 2 2015 100664 First version
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@
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@*****************************************************************************
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.global ih264_resi_trans_quant_chroma_4x4_a9
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ih264_resi_trans_quant_chroma_4x4_a9:
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@R0 :pointer to src buffer
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@R1 :pointer to pred buffer
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@R2 :pointer to dst buffer
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@R3 :Source stride
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@STACk :pred stride
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@ :scale matirx,
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@ :threshold matrix
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@ :qbits
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@ :round factor
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@ :nnz
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@ :pu1_dc_alt_addr
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push {r4-r12, lr} @push all the variables first
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add r11, sp, #40 @decrement stack pointer,to accomodate two variables
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ldmfd r11, {r4-r10} @load the strides into registers
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@R0 :pointer to src buffer
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@R1 :pointer to pred buffer
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@R2 :pointer to dst buffer
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@R3 :Source stride
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@R4 :Pred stride
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@R5 :scale matirx,
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@R6 :threshold matrix
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@R7 :qbits
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@R8 :round factor
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@R9 :nnz
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vpush {d8-d15}
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mov r11, #0
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sub r7, r11, r7 @Negate the qbit value for usiing LSL
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@------------Fucntion Loading done----------------;
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vld2.u8 {d10, d11}, [r0], r3 @load first 8 pix src row 1
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vld2.u8 {d11, d12}, [r1], r4 @load first 8 pix pred row 1
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vld2.u8 {d28, d29}, [r0], r3 @load first 8 pix src row 2
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vld2.u8 {d29, d30}, [r1], r4 @load first 8 pix pred row 2
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vld2.u8 {d25, d26}, [r0], r3 @load first 8 pix src row 3
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vld2.u8 {d26, d27}, [r1], r4 @load first 8 pix pred row 3
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vsubl.u8 q0, d10, d11 @find residue row 1
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vld2.u8 {d22, d23}, [r0], r3 @load first 8 pix src row 4
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vld2.u8 {d23, d24}, [r1], r4 @load first 8 pix pred row 4
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vsubl.u8 q1, d28, d29 @find residue row 2
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vsubl.u8 q2, d25, d26 @find residue row 3
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vsubl.u8 q3, d22, d23 @find residue row 4
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vtrn.16 d0, d2 @T12
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vtrn.16 d4, d6 @T23
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vtrn.32 d0, d4 @T13
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vtrn.32 d2, d6 @T14
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vadd.s16 d8 , d0, d6 @x0 = x4+x7
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vadd.s16 d9 , d2, d4 @x1 = x5+x6
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vsub.s16 d10, d2, d4 @x2 = x5-x6
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vsub.s16 d11, d0, d6 @x3 = x4-x7
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vshl.s16 d12, d10, #1 @U_SHIFT(x2,1,shft)
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vshl.s16 d13, d11, #1 @U_SHIFT(x3,1,shft)
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vadd.s16 d14, d8, d9 @x4 = x0 + x1;
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vsub.s16 d16, d8, d9 @x6 = x0 - x1;
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vadd.s16 d15, d13, d10 @x5 = U_SHIFT(x3,1,shft) + x2;
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vsub.s16 d17, d11, d12 @x7 = x3 - U_SHIFT(x2,1,shft);
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@taking transpose again so as to make do vert transform
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vtrn.16 d14, d15 @T12
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vtrn.16 d16, d17 @T23
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vtrn.32 d14, d16 @T13
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vtrn.32 d15, d17 @T24
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@let us do vertical transform
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@same code as horiz
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vadd.s16 d18, d14, d17 @x0 = x4+x7
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vadd.s16 d19, d15, d16 @x1 = x5+x6
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vsub.s16 d20, d15, d16 @x2 = x5-x6
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vsub.s16 d21, d14, d17 @x3 = x4-x7
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vshl.s16 d22, d20, #1 @U_SHIFT(x2,1,shft)
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vshl.s16 d23, d21, #1 @U_SHIFT(x3,1,shft)
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vdup.s32 q4, r8 @Load rounding value row 1
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vadd.s16 d24, d18, d19 @x5 = x0 + x1;
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vsub.s16 d26, d18, d19 @x7 = x0 - x1;
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vadd.s16 d25, d23, d20 @x6 = U_SHIFT(x3,1,shft) + x2;
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vsub.s16 d27, d21, d22 @x8 = x3 - U_SHIFT(x2,1,shft);
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vdup.s32 q10, r7 @Load qbit values
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vst1.s16 d24[0], [r10] @Store Unquantized dc value to dc alte address
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@core tranform is done for 4x8 block 1
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vld1.s16 {q14-q15}, [r5] @load the scaling values
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vabs.s16 q0, q12 @Abs val of row 1 blk 1
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vabs.s16 q1, q13 @Abs val of row 2 blk 1
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vmov.s32 q5, q4 @copy round fact for row 2
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vmov.s32 q6, q4 @copy round fact for row 2
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vclt.s16 q2, q12, #0 @Get the sign of row 1 blk 1
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vmov.s32 q7, q4 @copy round fact for row 2
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vclt.s16 q3, q13, #0 @Get the sign of row 2 blk 1
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vmlal.s16 q4, d0, d28 @Multiply and add row 1
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vmlal.s16 q5, d1, d29 @Multiply and add row 2
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vmlal.s16 q6, d2, d30 @Multiply and add row 3
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vmlal.s16 q7, d3, d31 @Multiply and add row 4
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vshl.s32 q11, q4, q10 @Shift row 1
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vshl.s32 q12, q5, q10 @Shift row 2
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vshl.s32 q13, q6, q10 @Shift row 3
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vshl.s32 q14, q7, q10 @Shift row 4
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vmovn.s32 d30, q11 @Narrow row 1
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vmovn.s32 d31, q12 @Narrow row 2
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vmovn.s32 d0 , q13 @Narrow row 3
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vmovn.s32 d1 , q14 @Narrow row 4
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vneg.s16 q1, q15 @Get negative
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vneg.s16 q4, q0 @Get negative
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vceq.s16 q5, q15, #0 @I compare with zero row 1 and 2 blk 1
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vceq.s16 q6, q0 , #0 @I compare with zero row 1 and 2 blk 1
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vbsl.s16 q2, q1, q15 @Restore sign of row 1 and 2
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vbsl.s16 q3, q4, q0 @Restore sign of row 3 and 4
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vmovn.u16 d14, q5 @I Narrow the comparison for row 1 and 2 blk 1
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vmovn.u16 d15, q6 @I Narrow the comparison for row 1 and 2 blk 2
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vshr.u8 q8, q7, #7 @I Reduce comaparison bit to a signle bit row 1 and 2 blk 1 and 2 [ keep the value for later use ]
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vpadd.u8 d18, d16, d17 @I pair add nnz 1
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vpadd.u8 d20, d18, d19 @I Pair add nnz 2
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vpadd.u8 d22, d20, d21 @I Pair add nnz 3
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vpadd.u8 d24, d22, d23 @I Pair add nnz4
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vst1.s16 {q2-q3}, [r2] @Store blk
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vmov.u8 d25, #16 @I Get max nnz
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vsub.u8 d26, d25, d24 @I invert current nnz
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vst1.u8 d26[0], [r9] @I Write nnz
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vpop {d8-d15}
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pop {r4-r12, pc}
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@*****************************************************************************
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@*
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@* Function Name : ih264_hadamard_quant_4x4_a9
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@* Description : This function does forward hadamard transform and
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@* quantization for luma dc block
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@*
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@* Arguments : R0 :pointer to src buffer
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@ R1 :pointer to dst buffer
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@ R2 :pu2_scale_matrix
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@ R2 :pu2_threshold_matrix
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@ STACk : u4_qbits
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@ u4_round_factor
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@ pu1_nnz
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@ Values Returned : NONE
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@
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@ Register Usage :
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@ Stack Usage : 0 bytes
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@ Cycles : Around
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@ Interruptiaility : Interruptable
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@
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@ Known Limitations
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@ \Assumptions :
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@
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@ Revision History :
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@ DD MM YYYY Author(s) Changes
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@ 20 2 2015 100633 First version
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@
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@*****************************************************************************
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@ih264_hadamard_quant_4x4_a9(WORD16 *pi2_src, WORD16 *pi2_dst,
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@ const UWORD16 *pu2_scale_matrix,
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@ const UWORD16 *pu2_threshold_matrix, UWORD32 u4_qbits,
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@ UWORD32 u4_round_factor,UWORD8 *pu1_nnz
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@ )
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.global ih264_hadamard_quant_4x4_a9
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ih264_hadamard_quant_4x4_a9:
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@Registert usage
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@ r0 : src
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@ r1 : dst
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@ r2 : *pu2_scale_matrix
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@ r3 : *pu2_threshold_matrix
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vld4.s16 {d0, d1, d2, d3}, [r0]! @Load 4x4 block
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vpush {d8-d15}
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vld1.u16 d30[0], [r2] @load pu2_scale_matrix[0]
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vaddl.s16 q3, d0, d3 @x0 = x4 + x7;
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vaddl.s16 q4, d1, d2 @x1 = x5 + x6;
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vsubl.s16 q5, d1, d2 @x2 = x5 - x6;
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vsubl.s16 q6, d0, d3 @x3 = x4 - x7;
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vdup.u16 d30, d30[0] @pu2_scale_matrix[0]
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vadd.s32 q7, q3, q4 @pi2_dst[0] = x0 + x1;
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vadd.s32 q8, q6, q5 @pi2_dst[1] = x3 + x2;
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add r3, sp, #68 @Get address of u4_round_factor
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vsub.s32 q9, q3, q4 @pi2_dst[2] = x0 - x1;
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vsub.s32 q10, q6, q5 @pi2_dst[3] = x3 - x2;
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vtrn.s32 q7, q8 @transpose 4x4 block
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vtrn.s32 q9, q10
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vld1.s32 d0[0], [r3] @load u4_round_factor
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vswp d15, d18
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vswp d17, d20
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add r3, sp, #64 @Get address of u4_qbits
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vadd.s32 q11, q7, q10 @x0 = x4 + x7;
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vadd.s32 q12, q8, q9 @x1 = x5 + x6;
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vld1.s32 d31[0], [r3] @load u4_qbits
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vsub.s32 q13, q8, q9 @x2 = x5 - x6;
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vsub.s32 q14, q7, q10 @x3 = x4 - x7;
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vdup.s32 q7, d0[0] @u4_round_factor
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vadd.s32 q0, q11, q12 @(x0 + x1)
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vadd.s32 q1, q14, q13 @(x3 + x2)
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vsub.s32 q2, q11, q12 @(x0 - x1)
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vsub.s32 q3, q14, q13 @(x3 - x2)
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vdup.s32 q11, d31[0] @u4_round_factor
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vshrn.s32 d0, q0, #1 @i4_value = (x0 + x1) >> 1;
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vshrn.s32 d1, q1, #1 @i4_value = (x3 + x2) >> 1;
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vshrn.s32 d2, q2, #1 @i4_value = (x0 - x1) >> 1;
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vshrn.s32 d3, q3, #1 @i4_value = (x3 - x2) >> 1;
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vabs.s16 q5, q0
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vabs.s16 q6, q1
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vmov.s32 q8, q7 @Get the round fact
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vmov.s32 q9, q7
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vmov.s32 q10, q7
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vclt.s16 q3, q0, #0 @get the sign row 1,2
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vclt.s16 q4, q1, #0
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vneg.s32 q11, q11 @-u4_round_factor
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vmlal.u16 q7, d10, d30
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vmlal.u16 q8, d11, d30
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vmlal.u16 q9, d12, d30
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vmlal.u16 q10, d13, d30
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vshl.u32 q7, q7, q11
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vshl.u32 q8, q8, q11
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vshl.u32 q9, q9, q11
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vshl.u32 q10, q10, q11
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vqmovn.u32 d22, q7
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vqmovn.u32 d23, q8
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vqmovn.u32 d24, q9
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vqmovn.u32 d25, q10
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vneg.s16 q13, q11
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vneg.s16 q14, q12
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vbsl.s16 q3, q13, q11
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vbsl.s16 q4, q14, q12
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vceq.s16 q5, q11, #0
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vceq.s16 q6, q12, #0
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vst1.s16 {q3}, [r1]!
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vshrn.u16 d14, q5, #8
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vshrn.u16 d15, q6, #8
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ldr r3, [sp, #72] @Load *pu1_nnz
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vshr.u8 q7, q7, #7
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vst1.s16 {q4}, [r1]!
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vadd.u8 d16, d14, d15
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vmov.u8 d20, #16
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vpadd.u8 d17, d16, d16
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vpadd.u8 d18, d17, d17
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vpadd.u8 d19, d18, d18
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vsub.u8 d20, d20, d19
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vst1.u8 d20[0], [r3]
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vpop {d8-d15}
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bx lr
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@*****************************************************************************
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@*
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@* Function Name : ih264_hadamard_quant_2x2_uv_a9
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@* Description : This function does forward hadamard transform and
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@* quantization for dc block of chroma for both planes
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@*
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@* Arguments : R0 :pointer to src buffer
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@ R1 :pointer to dst buffer
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@ R2 :pu2_scale_matrix
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@ R2 :pu2_threshold_matrix
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@ STACk : u4_qbits
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@ u4_round_factor
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@ pu1_nnz
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@ Values Returned : NONE
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@
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@ Register Usage :
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@ Stack Usage : 0 bytes
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@ Cycles : Around
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@ Interruptiaility : Interruptable
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@
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@ Known Limitations
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@ \Assumptions :
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@
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@ Revision History :
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@ DD MM YYYY Author(s) Changes
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@ 20 2 2015 100633 First version
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@
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@*****************************************************************************
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@ ih264_hadamard_quant_2x2_uv_a9(WORD16 *pi2_src, WORD16 *pi2_dst,
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@ const UWORD16 *pu2_scale_matrix,
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@ const UWORD16 *pu2_threshold_matrix, UWORD32 u4_qbits,
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@ UWORD32 u4_round_factor,UWORD8 *pu1_nnz
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@ )
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.global ih264_hadamard_quant_2x2_uv_a9
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ih264_hadamard_quant_2x2_uv_a9:
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vpush {d8-d15}
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vld2.s16 {d0-d1}, [r0] @load src
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add r3, sp, #68 @Get address of u4_round_factor
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vaddl.s16 q3, d0, d1 @x0 = x4 + x5;, x2 = x6 + x7;
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vld1.u16 d30[0], [r2] @load pu2_scale_matrix[0]
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vsubl.s16 q4, d0, d1 @x1 = x4 - x5; x3 = x6 - x7;
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add r0, sp, #64 @Get affress of u4_qbits
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vld1.s32 d28[0], [r3] @load u4_round_factor
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vtrn.s32 q3, q4 @q1 -> x0 x1, q2 -> x2 x3
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vadd.s32 q0, q3, q4 @ (x0 + x2) (x1 + x3) (y0 + y2); (y1 + y3);
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vld1.s32 d24[0], [r0] @load u4_qbits
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vsub.s32 q1, q3, q4 @ (x0 - x2) (x1 - x3) (y0 - y2); (y1 - y3);
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vdup.u16 d30, d30[0] @pu2_scale_matrix
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vabs.s32 q2, q0
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vabs.s32 q3, q1
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vdup.s32 q14, d28[0] @u4_round_factor
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vmovl.u16 q15, d30 @pu2_scale_matrix
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vclt.s32 q4, q0, #0 @get the sign row 1,2
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vdup.s32 q12, d24[0] @u4_round_factor
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vclt.s32 q5, q1, #0
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vqmovn.u32 d8, q4
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vqmovn.s32 d9, q5
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vmov.s32 q13, q14 @Get the round fact
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vneg.s32 q12, q12 @-u4_round_factor
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vmla.u32 q13, q2, q15
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vmla.u32 q14, q3, q15
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vshl.u32 q13, q13, q12 @>>qbit
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vshl.u32 q14, q14, q12 @>>qbit
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vqmovn.u32 d10, q13
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vqmovn.u32 d11, q14
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vneg.s16 q6, q5
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vbsl.s16 q4, q6, q5 @*sign
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vtrn.s32 d8, d9
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vceq.s16 q7, q4, #0 @Compute nnz
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vshrn.u16 d14, q7, #8 @reduce nnz comparison to 1 bit
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ldr r3, [sp, #72] @Load *pu1_nnz
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vshr.u8 d14, d14, #7 @reduce nnz comparison to 1 bit
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vmov.u8 d20, #4 @Since we add zeros, we need to subtract from 4 to get nnz
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vpadd.u8 d17, d14, d14 @Sum up nnz
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vst1.s16 {q4}, [r1]! @Store the block
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vpadd.u8 d17, d17, d17 @Sum up nnz
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vsub.u8 d20, d20, d17 @4- numzeros
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vst1.u16 d20[0], [r3] @store nnz
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vpop {d8-d15}
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bx lr
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