From 58accf068963e3dbf2d94a49256d334c3548e571 Mon Sep 17 00:00:00 2001 From: ekeeke Date: Fri, 25 Feb 2022 15:29:18 +0100 Subject: [PATCH] [Core/CD] fixed Memory Mode, Timer and Font Color registers byte access at even address (verified on real hardware, cf. Krikzz's mcd-verificator) --- core/cd_hw/scd.c | 15 ++++++++++++--- core/cd_hw/scd.h | 2 +- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/core/cd_hw/scd.c b/core/cd_hw/scd.c index edb728d..f2f8ef8 100644 --- a/core/cd_hw/scd.c +++ b/core/cd_hw/scd.c @@ -2,7 +2,7 @@ * Genesis Plus * Mega CD / Sega CD hardware * - * Copyright (C) 2012-2021 Eke-Eke (Genesis Plus GX) + * Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX) * * Redistribution and use of this code or any derivative works are permitted * provided that the following conditions are met: @@ -798,6 +798,7 @@ static void scd_write_byte(unsigned int address, unsigned int data) } case 0x03: /* Memory Mode */ + case 0x02: /* !LDS and !UDS are ignored (verified on real hardware, cf. Krikzz's mcd-verificator) */ { s68k_poll_sync(1<<0x03); @@ -952,8 +953,8 @@ static void scd_write_byte(unsigned int address, unsigned int data) return; } - case 0x0e: /* SUB-CPU communication flags */ - case 0x0f: /* !LWR is ignored (Space Ace, Dragon's Lair) */ + case 0x0f: /* SUB-CPU communication flags */ + case 0x0e: /* !LDS and !UDS are ignored (verified on real hardware, cf. Krikzz's mcd-verificator, Space Ace, Dragon's Lair) */ { s68k_poll_sync(1<<0x0f); scd.regs[0x0f>>1].byte.l = data; @@ -961,6 +962,7 @@ static void scd_write_byte(unsigned int address, unsigned int data) } case 0x31: /* Timer */ + case 0x30: /* !LDS and !UDS are ignored (verified on real hardware, cf. Krikzz's mcd-verificator) */ { /* reload timer (one timer clock = 384 CPU cycles) */ scd.timer = data * TIMERS_SCYCLES_RATIO; @@ -992,6 +994,13 @@ static void scd_write_byte(unsigned int address, unsigned int data) return; } + case 0x4d: /* Font Color */ + case 0x4c: /* !LDS and !UDS are ignored (verified on real hardware, cf. Krikzz's mcd-verificator) */ + { + scd.regs[0x4c>>1].byte.l = data; + break; + } + default: { /* SUB-CPU communication words */ diff --git a/core/cd_hw/scd.h b/core/cd_hw/scd.h index 49b66b0..8fafb66 100644 --- a/core/cd_hw/scd.h +++ b/core/cd_hw/scd.h @@ -2,7 +2,7 @@ * Genesis Plus * Mega CD / Sega CD hardware * - * Copyright (C) 2012-2021 Eke-Eke (Genesis Plus GX) + * Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX) * * Redistribution and use of this code or any derivative works are permitted * provided that the following conditions are met: