From 8be7c0269b0592bd635dabf61568bdaaa53bfb17 Mon Sep 17 00:00:00 2001 From: ekeeke Date: Tue, 5 Oct 2021 19:40:08 +0200 Subject: [PATCH] [Core/Misc] MSVC compatibility fixes (backported from libretro repository) --- core/cd_hw/libchdr/deps/libFLAC/cpu.c | 68 ++++++++++--------- .../deps/libFLAC/include/private/bitmath.h | 2 +- .../deps/libFLAC/include/share/compat.h | 2 +- core/cd_hw/libchdr/src/chd.c | 2 +- core/ntsc/sms_ntsc.c | 4 +- 5 files changed, 40 insertions(+), 38 deletions(-) diff --git a/core/cd_hw/libchdr/deps/libFLAC/cpu.c b/core/cd_hw/libchdr/deps/libFLAC/cpu.c index 8e9dc9e..e2cf0f1 100644 --- a/core/cd_hw/libchdr/deps/libFLAC/cpu.c +++ b/core/cd_hw/libchdr/deps/libFLAC/cpu.c @@ -39,7 +39,7 @@ #include #include -#if defined(_MSC_VER) && !defined(_XBOX) +#if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310 # include /* for __cpuid() and _xgetbv() */ #endif @@ -49,11 +49,6 @@ #ifdef DEBUG #include - -#define dfprintf fprintf -#else -/* This is bad practice, it should be a static void empty function */ -#define dfprintf(file, format, ...) #endif @@ -138,21 +133,23 @@ ia32_cpu_info (FLAC__CPUInfo *info) info->ia32.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false; } - dfprintf(stderr, "CPU info (IA-32):\n"); - dfprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n'); - dfprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n'); - dfprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n'); - dfprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n'); - dfprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n'); - dfprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n'); - dfprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n'); - dfprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n'); +#ifdef DEBUG + fprintf(stderr, "CPU info (IA-32):\n"); + fprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n'); + fprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n'); + fprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n'); + fprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n'); + fprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n'); + fprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n'); + fprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n'); + fprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n'); if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) { - dfprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n'); - dfprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n'); - dfprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n'); + fprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n'); + fprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n'); + fprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n'); } +#endif /* * now have to check for OS support of AVX instructions @@ -164,9 +161,10 @@ ia32_cpu_info (FLAC__CPUInfo *info) info->ia32.fma = false; } - if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) { - dfprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n'); - } +#ifdef DEBUG + if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) + fprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n'); +#endif #else info->use_asm = false; #endif @@ -199,17 +197,20 @@ x86_64_cpu_info (FLAC__CPUInfo *info) info->x86.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false; } - dfprintf(stderr, "CPU info (x86-64):\n"); - dfprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n'); - dfprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n'); - dfprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n'); - dfprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n'); +#ifdef DEBUG + fprintf(stderr, "CPU info (x86-64):\n"); + fprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n'); + fprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n'); + fprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n'); + fprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n'); - if (FLAC__AVX_SUPPORTED) { - dfprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n'); - dfprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n'); - dfprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n'); + if (FLAC__AVX_SUPPORTED) + { + fprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n'); + fprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n'); + fprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n'); } +#endif /* * now have to check for OS support of AVX instructions @@ -221,9 +222,10 @@ x86_64_cpu_info (FLAC__CPUInfo *info) info->x86.fma = false; } - if (FLAC__AVX_SUPPORTED) { - dfprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n'); - } +#ifdef DEBUG + if (FLAC__AVX_SUPPORTED) + fprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n'); +#endif #else /* Silence compiler warnings. */ (void) info; diff --git a/core/cd_hw/libchdr/deps/libFLAC/include/private/bitmath.h b/core/cd_hw/libchdr/deps/libFLAC/include/private/bitmath.h index 1be0ada..4766d63 100644 --- a/core/cd_hw/libchdr/deps/libFLAC/include/private/bitmath.h +++ b/core/cd_hw/libchdr/deps/libFLAC/include/private/bitmath.h @@ -38,7 +38,7 @@ #include "share/compat.h" -#if defined(_MSC_VER) && !defined(_XBOX) +#if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310 #include /* for _BitScanReverse* */ #endif diff --git a/core/cd_hw/libchdr/deps/libFLAC/include/share/compat.h b/core/cd_hw/libchdr/deps/libFLAC/include/share/compat.h index 744aabb..17e7754 100644 --- a/core/cd_hw/libchdr/deps/libFLAC/include/share/compat.h +++ b/core/cd_hw/libchdr/deps/libFLAC/include/share/compat.h @@ -49,7 +49,7 @@ #if defined _MSC_VER || defined __BORLANDC__ || defined __MINGW32__ #include /* for off_t */ #define FLAC__off_t __int64 /* use this instead of off_t to fix the 2 GB limit */ -#if !defined __MINGW32__ +#if !defined __MINGW32__ && _MSC_VER && _MSC_VER > 1310 #define fseeko _fseeki64 #define ftello _ftelli64 #else /* MinGW */ diff --git a/core/cd_hw/libchdr/src/chd.c b/core/cd_hw/libchdr/src/chd.c index 4e1ad93..a2ad056 100644 --- a/core/cd_hw/libchdr/src/chd.c +++ b/core/cd_hw/libchdr/src/chd.c @@ -438,7 +438,7 @@ void *lzma_fast_alloc(void *p, size_t size) addr = (uint32_t *)malloc(size + sizeof(uint32_t) + LZMA_MIN_ALIGNMENT_BYTES); if (addr==NULL) return NULL; - for (int scan = 0; scan < MAX_LZMA_ALLOCS; scan++) + for (scan = 0; scan < MAX_LZMA_ALLOCS; scan++) { if (codec->allocptr[scan] == NULL) { diff --git a/core/ntsc/sms_ntsc.c b/core/ntsc/sms_ntsc.c index d41239e..884f225 100644 --- a/core/ntsc/sms_ntsc.c +++ b/core/ntsc/sms_ntsc.c @@ -88,6 +88,7 @@ void sms_ntsc_init( sms_ntsc_t* ntsc, sms_ntsc_setup_t const* setup ) void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input, int in_width, int vline) { + int n; int const chunk_count = in_width / sms_ntsc_in_chunk; /* handle extra 0, 1, or 2 pixels by placing them at beginning of row */ @@ -102,9 +103,8 @@ void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned (SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2, (SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 ); - sms_ntsc_out_t* restrict line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]); + sms_ntsc_out_t* line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]); - int n; input += in_extra; for ( n = chunk_count; n; --n )