mirror of
https://github.com/Wiimpathy/HatariWii.git
synced 2024-11-26 19:44:18 +01:00
213 lines
5.6 KiB
ArmAsm
213 lines
5.6 KiB
ArmAsm
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; Bus error tester - with word access
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; (assemble with TurboAss)
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startaddr EQU $FF8000
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endaddr EQU $FFFFFE
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movea.l 4(SP),A5
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move.l $0C(A5),D0
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add.l $14(SP),D0
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add.l $1C(SP),D0
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add.l #$0800,D0
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move.l D0,D1
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add.l A5,D1
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and.l #-2,D1
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movea.l D1,SP
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move.l D0,-(SP)
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move.l A5,-(SP)
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clr.w -(SP)
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move.w #$4A,-(SP)
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trap #1 ; Mshrink
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lea 12(SP),SP
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clr.l -(SP)
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move.w #$20,-(SP)
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trap #1 ; Super
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addq.l #6,SP
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move.w D0,old_ssp
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clr.w -(SP)
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pea filename
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move.w #$3C,-(SP)
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trap #1 ; Fcreate
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addq.l #8,SP
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move.w D0,fhndl
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pea welcometxt
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move.l #welcometxtend-welcometxt-1,-(SP)
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move.w D0,-(SP)
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move.w #$40,-(SP)
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trap #1 ; Fwrite(welcometxt)
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lea 12(SP),SP
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move.l $08,oldbushandler
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move.l #buserrcatch,$08
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movea.l #startaddr,A5
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loop:
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movea.l SP,A6
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move.w (A5),D0 ; *** Try to generate a bus error ***
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tst.w be_region
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beq.s cont
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lea hex_buf+10,A0
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bsr write_hex
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clr.w be_region
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pea hex_buf
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move.l #19,-(SP)
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move.w fhndl,-(SP)
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move.w #$40,-(SP)
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trap #1 ; Fwrite
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lea 12(SP),SP
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cont:
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addq.l #2,A5
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cmpa.l #endaddr,A5
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bne.s loop
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tst.w be_region
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beq.s nofinalwrite
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lea hex_buf+10,A0
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bsr write_hex
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pea hex_buf
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move.l #19,-(SP)
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move.w fhndl,-(SP)
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move.w #$40,-(SP)
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trap #1 ; Fwrite
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lea 12(SP),SP
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nofinalwrite:
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move.l oldbushandler,$08
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pea eoftxt
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move.l #8,-(SP)
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move.w fhndl,-(SP)
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move.w #$40,-(SP)
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trap #1 ; Fwrite(eoftxt)
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lea 12(SP),SP
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move.w fhndl,-(SP)
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move.w #$3E,-(SP)
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trap #1 ; Fclose
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addq.l #4,SP
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move.l old_ssp,-(SP)
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move.w #$20,-(SP)
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trap #1 ; Super
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addq.l #6,SP
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clr.w -(SP)
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trap #1 ; Pterm0
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buserrcatch:
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movea.l A6,SP
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tst.w be_region
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bne cont
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move.w #-1,be_region
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lea hex_buf,A0
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bsr.s write_hex
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bra cont
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write_hex:
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move.l A5,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b6_10
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add.b #'0',D1
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bra.s b6_ok
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b6_10: add.b #'A'-10,D1
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b6_ok: move.b D1,6(A0)
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move.l A5,D1
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lsr.b #4,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b5_10
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add.b #'0',D1
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bra.s b5_ok
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b5_10: add.b #'A'-10,D1
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b5_ok: move.b D1,5(A0)
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move.l A5,D1
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lsr.w #8,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b4_10
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add.b #'0',D1
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bra.s b4_ok
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b4_10: add.b #'A'-10,D1
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b4_ok: move.b D1,4(A0)
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move.l A5,D1
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move.w #12,D2
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lsr.w D2,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b3_10
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add.b #'0',D1
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bra.s b3_ok
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b3_10: add.b #'A'-10,D1
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b3_ok: move.b D1,3(A0)
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move.l A5,D1
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move.w #16,D2
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lsr.l D2,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b2_10
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add.b #'0',D1
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bra.s b2_ok
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b2_10: add.b #'A'-10,D1
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b2_ok: move.b D1,2(A0)
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move.l A5,D1
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move.w #20,D2
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lsr.l D2,D1
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and.b #$0F,D1
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cmp.b #10,D1
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bge.s b1_10
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add.b #'0',D1
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bra.s b1_ok
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b1_10: add.b #'A'-10,D1
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b1_ok: move.b D1,1(A0)
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rts
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DATA
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filename:
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DC.B "BUSERR_W.TXT",0
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welcometxt:
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DC.B "Bus Error testing results (word access):",13,10,13,10,0
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welcometxtend:
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eoftxt:
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DC.B 13,10,"EOF!",13,10,0
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hex_buf: DC.B "$000000 - $000000",13,10,0
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EVEN
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be_region: DC.W 0
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BSS
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old_ssp:
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DS.L 1
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oldbushandler:
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DS.L 1
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fhndl:
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DS.W 1
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END
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