mirror of
https://github.com/wiiu-env/JsTypeHax.git
synced 2024-11-16 15:39:16 +01:00
344 lines
8.8 KiB
Python
344 lines
8.8 KiB
Python
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condition_table_true = ["lt", "gt", "eq"]
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condition_table_false = ["ge", "le", "ne"]
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trap_condition_table = {
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1: "lgt",
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2: "llt",
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4: "eq",
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5: "lge",
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8: "gt",
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12: "ge",
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16: "lt",
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20: "le",
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31: "u"
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}
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spr_table = {
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8: "lr",
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9: "ctr"
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}
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def decodeI(value):
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return (value >> 2) & 0xFFFFFF, (value >> 1) & 1, value & 1
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def decodeB(value):
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return (value >> 21) & 0x1F, (value >> 16) & 0x1F, (value >> 2) & 0x3FFF, (value >> 1) & 1, value & 1
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def decodeD(value):
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return (value >> 21) & 0x1F, (value >> 16) & 0x1F, value & 0xFFFF
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def decodeX(value):
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return (value >> 21) & 0x1F, (value >> 16) & 0x1F, (value >> 11) & 0x1F, (value >> 1) & 0x3FF, value & 1
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def extend_sign(value, bits=16):
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if value & 1 << (bits - 1):
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value -= 1 << bits
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return value
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def ihex(value):
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return "-" * (value < 0) + "0x" + hex(value).lstrip("-0x").rstrip("L").zfill(1).upper()
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def decodeCond(BO, BI):
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#TODO: Better condition code
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if BO == 20: return ""
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if BO & 1: return "?"
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if BI > 2: return "?"
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if BO == 4: return condition_table_false[BI]
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if BO == 12: return condition_table_true[BI]
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return "?"
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def loadStore(value, regtype="r"):
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D, A, d = decodeD(value)
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d = extend_sign(d)
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return "%s%i, %s(r%i)" %(regtype, D, ihex(d), A)
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def loadStoreX(D, A, B, pad):
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if pad: return "<invalid>"
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return "r%i, %s, r%i" %(D, ("r%i" %A) if A else "0", B)
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def add(D, A, B, Rc):
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return "add%s" %("." * Rc), "r%i, r%i, r%i" %(D, A, B)
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def addi(value, addr):
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D, A, SIMM = decodeD(value)
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SIMM = extend_sign(SIMM)
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if A == 0:
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return "li", "r%i, %s" %(D, ihex(SIMM))
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return "addi", "r%i, r%i, %s" %(D, A, ihex(SIMM))
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def addic(value, addr):
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D, A, SIMM = decodeD(value)
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SIMM = extend_sign(SIMM)
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return "addic", "r%i, r%i, %s" %(D, A, ihex(SIMM))
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def addic_(value, addr):
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D, A, SIMM = decodeD(value)
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SIMM = extend_sign(SIMM)
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return "addic.", "r%i, r%i, %s" %(D, A, ihex(SIMM))
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def addis(value, addr):
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D, A, SIMM = decodeD(value)
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SIMM = extend_sign(SIMM)
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if A == 0:
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return "lis", "r%i, %s" %(D, ihex(SIMM))
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return "addis", "r%i, r%i, %s" %(D, A, ihex(SIMM))
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def and_(S, A, B, Rc):
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return "and%s" % ("." * Rc), "r%i, r%i, r%i" % (A, S, B)
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def b(value, addr):
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LI, AA, LK = decodeI(value)
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LI = extend_sign(LI, 24) * 4
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if AA:
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dst = LI
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else:
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dst = addr + LI
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return "b%s%s" %("l" * LK, "a" * AA), ihex(dst)
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def bc(value, addr):
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BO, BI, BD, AA, LK = decodeB(value)
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LI = extend_sign(LK, 14) * 4
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instr = "b" + decodeCond(BO, BI)
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if LK: instr += "l"
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if AA:
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instr += "a"
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dst = LI
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else:
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dst = addr + LI
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return instr, ihex(dst)
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def bcctr(BO, BI, pad, LK):
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if pad: return "<invalid>"
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instr = "b" + decodeCond(BO, BI) + "ctr"
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if LK:
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instr += "l"
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return instr
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def bclr(BO, BI, pad, LK):
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if pad: return "<invalid>"
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instr = "b" + decodeCond(BO, BI) + "lr"
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if LK:
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instr += "l"
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return instr
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def cmp(cr, A, B, pad):
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if pad: return "<invalid>"
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if cr & 3:
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return "<invalid>"
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return "cmp", "cr%i, r%i, r%i" %(cr >> 2, A, B)
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def cmpi(value, addr):
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cr, A, SIMM = decodeD(value)
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SIMM = extend_sign(SIMM)
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if cr & 3:
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return "<invalid>"
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return "cmpwi", "cr%i, r%i, %s" %(cr >> 2, A, ihex(SIMM))
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def cmpl(cr, A, B, pad):
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if pad: return "<invalid>"
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if cr & 3:
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return "<invalid>"
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return "cmplw", "cr%i, r%i, r%i" %(cr >> 2, A, B)
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def cmpli(value, addr):
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cr, A, UIMM = decodeD(value)
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if cr & 3:
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return "<invalid>"
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return "cmplwi", "cr%i, r%i, %s" %(cr >> 2, A, ihex(UIMM))
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def cntlzw(S, A, pad, Rc):
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if pad: return "<invalid>"
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return "cntlzw%s" %("." * Rc), "r%i, r%i" %(A, S)
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def dcbst(pad1, A, B, pad2):
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if pad1 or pad2: return "<invalid>"
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return "dcbst", "r%i, r%i" %(A, B)
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def fmr(D, pad, B, Rc):
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if pad: return "<invalid>"
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return "fmr%s" %("." * Rc), "f%i, f%i" %(D, B)
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def fneg(D, pad, B, Rc):
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if pad: return "<invalid>"
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return "fneg%s" %("." * Rc), "f%i, f%i" %(D, B)
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def mfspr(D, sprLo, sprHi, pad):
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if pad: return "<invalid>"
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sprnum = (sprHi << 5) | sprLo
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if sprnum not in spr_table:
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spr = "?"
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else:
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spr = spr_table[sprnum]
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return "mf%s" %spr, "r%i" %D
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def mtspr(S, sprLo, sprHi, pad):
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if pad: return "<invalid>"
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sprnum = (sprHi << 5) | sprLo
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if sprnum not in spr_table:
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spr = ihex(sprnum)
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else:
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spr = spr_table[sprnum]
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return "mt%s" %spr, "r%i" %S
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def lbz(value, addr): return "lbz", loadStore(value)
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def lfd(value, addr): return "lfd", loadStore(value, "f")
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def lfs(value, addr): return "lfs", loadStore(value, "f")
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def lmw(value, addr): return "lmw", loadStore(value)
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def lwz(value, addr): return "lwz", loadStore(value)
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def lwzu(value, addr): return "lwzu", loadStore(value)
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def lwarx(D, A, B, pad): return "lwarx", loadStoreX(D, A, B, pad)
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def lwzx(D, A, B, pad): return "lwzx", loadStoreX(D, A, B, pad)
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def or_(S, A, B, Rc):
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if S == B:
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return "mr%s" %("." * Rc), "r%i, r%i" %(A, S)
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return "or%s" %("." * Rc), "r%i, r%i, r%i" %(A, S, B)
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def ori(value, addr):
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S, A, UIMM = decodeD(value)
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if UIMM == 0:
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return "nop"
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return "ori", "r%s, r%s, %s" %(A, S, ihex(UIMM))
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def oris(value, addr):
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S, A, UIMM = decodeD(value)
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return "oris", "r%s, r%s, %s" %(A, S, ihex(UIMM))
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def rlwinm(value, addr):
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S, A, SH, M, Rc = decodeX(value)
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MB = M >> 5
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ME = M & 0x1F
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dot = "." * Rc
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if SH == 0 and MB == 0 and ME == 31:
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return "nop"
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if MB == 0 and ME == 31 - SH:
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return "slwi%s" %dot, "r%i, r%i, %i" %(A, S, SH)
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if ME == 31 and SH == 32 - MB:
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return "srwi%s" %dot, "r%i, r%i, %i" %(A, S, MB)
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if MB == 0 and ME < 31:
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return "extlwi%s" %dot, "r%i, r%i, %i,%i" %(A, S, ME + 1, SH)
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#extrwi
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if MB == 0 and ME == 31:
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if SH >= 16:
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return "rotlwi%s" %dot, "r%i, r%i, %i" %(A, S, SH)
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return "rotrwi%s" %dot, "r%i, r%i, %i" %(A, S, 32 - SH)
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if SH == 0 and ME == 31:
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return "clrlwi%s" %dot, "r%i, r%i, %i" %(A, S, MB)
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if SH == 0 and MB == 0:
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return "clrrwi%s" %dot, "r%i, r%i, %i" %(A, S, 31 - ME)
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#clrlslwi
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return "rlwinm%s" %dot, "r%i, r%i, %i,%i,%i" %(A, S, SH, MB, ME)
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def sc(value, addr):
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if value & 0x3FFFFFF != 2:
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return "<invalid>"
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return "sc"
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def stb(value, addr): return "stb", loadStore(value)
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def stfd(value, addr): return "stfd", loadStore(value, "f")
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def stfs(value, addr): return "stfs", loadStore(value, "f")
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def stfsu(value, addr): return "stfsu", loadStore(value, "f")
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def stmw(value, addr): return "stmw", loadStore(value)
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def stw(value, addr): return "stw", loadStore(value)
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def stwu(value, addr): return "stwu", loadStore(value)
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def stbx(S, A, B, pad): return "stbx", loadStoreX(S, A, B, pad)
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def stwx(S, A, B, pad): return "stwx", loadStoreX(S, A, B, pad)
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def stwcx(S, A, B, pad): return "stwcx", loadStoreX(S, A, B, pad ^ 1)
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def tw(TO, A, B, pad):
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if pad: return "<invalid>"
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if TO == 31 and A == 0 and B == 0:
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return "trap"
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if TO not in trap_condition_table:
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condition = "?"
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else:
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condition = trap_condition_table[TO]
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return "tw%s" %condition, "r%i, r%i" %(A, B)
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opcode_table_ext1 = {
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16: bclr,
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528: bcctr
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}
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opcode_table_ext2 = {
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0: cmp,
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4: tw,
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20: lwarx,
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23: lwzx,
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26: cntlzw,
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28: and_,
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32: cmpl,
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54: dcbst,
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150: stwcx,
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151: stwx,
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215: stbx,
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266: add,
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339: mfspr,
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444: or_,
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467: mtspr
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}
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opcode_table_float_ext1 = {
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40: fneg,
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72: fmr
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}
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def ext1(value, addr):
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DS, A, B, XO, Rc = decodeX(value)
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if not XO in opcode_table_ext1:
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return "ext1 - %s" %bin(XO)
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return opcode_table_ext1[XO](DS, A, B, Rc)
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def ext2(value, addr):
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DS, A, B, XO, Rc = decodeX(value)
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if not XO in opcode_table_ext2:
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return "ext2 - %s" %bin(XO)
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return opcode_table_ext2[XO](DS, A, B, Rc)
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def float_ext1(value, addr):
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D, A, B, XO, Rc = decodeX(value)
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if not XO in opcode_table_float_ext1:
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return "float_ext1 - %s" %bin(XO)
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return opcode_table_float_ext1[XO](D, A, B, Rc)
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opcode_table = {
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10: cmpli,
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11: cmpi,
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12: addic,
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13: addic_,
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14: addi,
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15: addis,
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16: bc,
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17: sc,
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18: b,
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19: ext1,
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21: rlwinm,
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24: ori,
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25: oris,
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31: ext2,
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32: lwz,
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33: lwzu,
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34: lbz,
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36: stw,
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37: stwu,
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38: stb,
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46: lmw,
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47: stmw,
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48: lfs,
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50: lfd,
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52: stfs,
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53: stfsu,
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54: stfd,
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63: float_ext1
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}
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def disassemble(value, address):
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opcode = value >> 26
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if opcode not in opcode_table:
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return "???"
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instr = opcode_table[opcode](value, address)
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if type(instr) == str:
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return instr
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return instr[0] + " " * (10 - len(instr[0])) + instr[1]
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