2013-09-18 05:03:54 +02:00
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/*
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armmmu.c - Memory Management Unit emulation.
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ARMulator extensions for the ARM7100 family.
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Copyright (C) 1999 Ben Williamson
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2015-01-30 21:48:57 +01:00
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#pragma once
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2013-09-18 05:03:54 +02:00
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2015-05-06 07:42:43 +02:00
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#include "common/swap.h"
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2015-05-13 03:38:29 +02:00
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#include "core/memory.h"
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2015-03-11 21:10:14 +01:00
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#include "core/arm/skyeye_common/armdefs.h"
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2015-07-26 02:19:39 +02:00
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#include "core/arm/skyeye_common/armsupp.h"
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2015-03-11 21:10:14 +01:00
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2015-01-30 21:48:57 +01:00
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// Register numbers in the MMU
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enum
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2013-09-18 05:03:54 +02:00
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{
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2015-03-21 00:35:27 +01:00
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MMU_ID = 0,
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MMU_CONTROL = 1,
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MMU_TRANSLATION_TABLE_BASE = 2,
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MMU_DOMAIN_ACCESS_CONTROL = 3,
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MMU_FAULT_STATUS = 5,
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MMU_FAULT_ADDRESS = 6,
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MMU_CACHE_OPS = 7,
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MMU_TLB_OPS = 8,
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MMU_CACHE_LOCKDOWN = 9,
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MMU_TLB_LOCKDOWN = 10,
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MMU_PID = 13,
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// MMU_V4
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MMU_V4_CACHE_OPS = 7,
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MMU_V4_TLB_OPS = 8,
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// MMU_V3
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MMU_V3_FLUSH_TLB = 5,
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MMU_V3_FLUSH_TLB_ENTRY = 6,
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MMU_V3_FLUSH_CACHE = 7,
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2015-01-30 21:48:57 +01:00
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};
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2015-03-11 21:10:14 +01:00
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// Reads data in big/little endian format based on the
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// state of the E (endian) bit in the emulated CPU's APSR.
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inline u16 ReadMemory16(ARMul_State* cpu, u32 address) {
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u16 data = Memory::Read16(address);
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if (InBigEndianMode(cpu))
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data = Common::swap16(data);
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return data;
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}
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inline u32 ReadMemory32(ARMul_State* cpu, u32 address) {
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u32 data = Memory::Read32(address);
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if (InBigEndianMode(cpu))
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data = Common::swap32(data);
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return data;
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}
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inline u64 ReadMemory64(ARMul_State* cpu, u32 address) {
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u64 data = Memory::Read64(address);
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if (InBigEndianMode(cpu))
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data = Common::swap64(data);
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return data;
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}
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// Writes data in big/little endian format based on the
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// state of the E (endian) bit in the emulated CPU's APSR.
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inline void WriteMemory16(ARMul_State* cpu, u32 address, u16 data) {
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if (InBigEndianMode(cpu))
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data = Common::swap16(data);
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Memory::Write16(address, data);
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}
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inline void WriteMemory32(ARMul_State* cpu, u32 address, u32 data) {
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if (InBigEndianMode(cpu))
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data = Common::swap32(data);
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Memory::Write32(address, data);
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}
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inline void WriteMemory64(ARMul_State* cpu, u32 address, u64 data) {
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if (InBigEndianMode(cpu))
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data = Common::swap64(data);
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Memory::Write64(address, data);
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}
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