2014-04-16 06:03:41 +02:00
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// Copyright 2014 Citra Emulator Project
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2014-12-17 06:38:14 +01:00
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// Licensed under GPLv2 or any later version
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2014-04-16 06:03:41 +02:00
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// Refer to the license.txt file included.
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#pragma once
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2014-08-19 20:57:43 +02:00
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#include <cstddef>
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2015-06-27 18:56:17 +02:00
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#include <string>
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2014-07-22 12:41:16 +02:00
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#include "common/bit_field.h"
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2015-06-27 18:56:17 +02:00
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#include "common/common_types.h"
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2016-04-30 17:34:51 +02:00
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#include "core/hle/result.h"
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2014-04-16 06:03:41 +02:00
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#include "core/hle/service/service.h"
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2016-12-10 13:51:50 +01:00
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namespace Service {
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namespace GSP {
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2014-04-16 06:03:41 +02:00
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2014-07-23 05:26:28 +02:00
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/// GSP interrupt ID
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enum class InterruptId : u8 {
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PSC0 = 0x00,
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PSC1 = 0x01,
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PDC0 = 0x02, // Seems called every vertical screen line
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PDC1 = 0x03, // Seems called every frame
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PPF = 0x04,
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P3D = 0x05,
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DMA = 0x06,
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};
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/// GSP command ID
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enum class CommandId : u32 {
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REQUEST_DMA = 0x00,
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/// Submits a commandlist for execution by the GPU.
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SUBMIT_GPU_CMDLIST = 0x01,
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// Fills a given memory range with a particular value
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SET_MEMORY_FILL = 0x02,
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// Copies an image and optionally performs color-conversion or scaling.
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// This is highly similar to the GameCube's EFB copy feature
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SET_DISPLAY_TRANSFER = 0x03,
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// Conceptionally similar to SET_DISPLAY_TRANSFER and presumable uses the same hardware path
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SET_TEXTURE_COPY = 0x04,
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/// Flushes up to 3 cache regions in a single command.
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CACHE_FLUSH = 0x05,
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};
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2014-07-23 06:10:37 +02:00
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/// GSP thread interrupt relay queue
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struct InterruptRelayQueue {
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// Index of last interrupt in the queue
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u8 index;
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// Number of interrupts remaining to be processed by the userland code
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u8 number_interrupts;
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// Error code - zero on success, otherwise an error has occurred
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u8 error_code;
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u8 padding1;
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u32 missed_PDC0;
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u32 missed_PDC1;
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InterruptId slot[0x34]; ///< Interrupt ID slots
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};
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static_assert(sizeof(InterruptRelayQueue) == 0x40, "InterruptRelayQueue struct has incorrect size");
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2014-07-23 04:59:26 +02:00
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2014-07-25 11:23:28 +02:00
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struct FrameBufferInfo {
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BitField<0, 1, u32> active_fb; // 0 = first, 1 = second
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u32 address_left;
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u32 address_right;
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u32 stride; // maps to 0x1EF00X90 ?
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u32 format; // maps to 0x1EF00X70 ?
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u32 shown_fb; // maps to 0x1EF00X78 ?
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u32 unknown;
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};
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static_assert(sizeof(FrameBufferInfo) == 0x1c, "Struct has incorrect size");
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2014-08-19 20:57:43 +02:00
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struct FrameBufferUpdate {
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BitField<0, 1, u8> index; // Index used for GSP::SetBufferSwap
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BitField<0, 1, u8> is_dirty; // true if GSP should update GPU framebuffer registers
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u16 pad1;
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FrameBufferInfo framebuffer_info[2];
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u32 pad2;
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};
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static_assert(sizeof(FrameBufferUpdate) == 0x40, "Struct has incorrect size");
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// TODO: Not sure if this padding is correct.
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// Chances are the second block is stored at offset 0x24 rather than 0x20.
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#ifndef _MSC_VER
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static_assert(offsetof(FrameBufferUpdate, framebuffer_info[1]) == 0x20,
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"FrameBufferInfo element has incorrect alignment");
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#endif
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/// GSP command
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struct Command {
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BitField<0, 8, CommandId> id;
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union {
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struct {
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u32 source_address;
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u32 dest_address;
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u32 size;
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} dma_request;
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struct {
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u32 address;
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u32 size;
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u32 flags;
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u32 unused[3];
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u32 do_flush;
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} submit_gpu_cmdlist;
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struct {
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u32 start1;
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u32 value1;
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u32 end1;
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u32 start2;
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u32 value2;
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u32 end2;
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u16 control1;
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u16 control2;
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} memory_fill;
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struct {
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u32 in_buffer_address;
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u32 out_buffer_address;
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u32 in_buffer_size;
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u32 out_buffer_size;
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u32 flags;
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2015-07-23 21:25:59 +02:00
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} display_transfer;
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struct {
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u32 in_buffer_address;
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u32 out_buffer_address;
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u32 size;
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u32 in_width_gap;
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u32 out_width_gap;
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u32 flags;
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} texture_copy;
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2015-09-08 00:22:44 +02:00
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struct {
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struct {
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u32 address;
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u32 size;
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} regions[3];
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} cache_flush;
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u8 raw_data[0x1C];
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};
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};
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static_assert(sizeof(Command) == 0x20, "Command struct has incorrect size");
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2014-05-17 22:26:45 +02:00
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2014-07-23 06:10:37 +02:00
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/// GSP shared memory GX command buffer header
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struct CommandBuffer {
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union {
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u32 hex;
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// Current command index. This index is updated by GSP module after loading the command
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// data, right before the command is processed. When this index is updated by GSP module,
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// the total commands field is decreased by one as well.
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BitField<0, 8, u32> index;
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// Total commands to process, must not be value 0 when GSP module handles commands. This
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// must be <=15 when writing a command to shared memory. This is incremented by the
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// application when writing a command to shared memory, after increasing this value
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// TriggerCmdReqQueue is only used if this field is value 1.
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BitField<8, 8, u32> number_commands;
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};
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u32 unk[7];
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Command commands[0xF];
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};
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static_assert(sizeof(CommandBuffer) == 0x200, "CommandBuffer struct has incorrect size");
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2016-12-10 13:51:50 +01:00
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class GSP_GPU final : public Interface {
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public:
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GSP_GPU();
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~GSP_GPU() override;
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2014-10-26 05:56:13 +01:00
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std::string GetPortName() const override {
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return "gsp::Gpu";
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}
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};
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2014-07-23 04:59:26 +02:00
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/**
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* Signals that the specified interrupt type has occurred to userland code
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* @param interrupt_id ID of interrupt that is being signalled
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*/
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2014-07-23 05:26:28 +02:00
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void SignalInterrupt(InterruptId interrupt_id);
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2014-07-23 04:59:26 +02:00
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2016-02-03 22:18:26 +01:00
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ResultCode SetBufferSwap(u32 screen_id, const FrameBufferInfo& info);
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2015-05-26 18:00:26 +02:00
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/**
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2015-05-27 22:21:06 +02:00
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* Retrieves the framebuffer info stored in the GSP shared memory for the
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* specified screen index and thread id.
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* @param thread_id GSP thread id of the process that accesses the structure that we are requesting.
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* @param screen_index Index of the screen we are requesting (Top = 0, Bottom = 1).
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* @returns FramebufferUpdate Information about the specified framebuffer.
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*/
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FrameBufferUpdate* GetFrameBufferInfo(u32 thread_id, u32 screen_index);
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2016-12-10 13:51:50 +01:00
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} // namespace GSP
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} // namespace Service
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