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Merge pull request #382 from lioncash/sx
dyncom: Implement SXTAB16 and SXTB16
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commit
092a67cefb
@ -2766,7 +2766,29 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){
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return inst_base;
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return inst_base;
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}
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SXTAB16"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index)
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{
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arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
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sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = NON_BRANCH;
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inst_base->load_r15 = 0;
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inst_cream->Rm = BITS(inst, 0, 3);
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inst_cream->Rn = BITS(inst, 16, 19);
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inst_cream->Rd = BITS(inst, 12, 15);
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inst_cream->rotate = BITS(inst, 10, 11);
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index)
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{
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return INTERPRETER_TRANSLATE(sxtab16)(inst, index);
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){
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LOG_WARNING(Core_ARM11, "SXTAH untested");
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LOG_WARNING(Core_ARM11, "SXTAH untested");
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst));
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst));
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@ -2784,7 +2806,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){
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return inst_base;
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return inst_base;
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}
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SXTB16"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index)
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ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index)
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{
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{
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst));
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst));
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@ -5896,7 +5918,40 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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FETCH_INST;
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FETCH_INST;
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GOTO_NEXT_INST;
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GOTO_NEXT_INST;
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}
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}
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SXTAB16_INST:
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SXTAB16_INST:
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SXTB16_INST:
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component;
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const u8 rotation = inst_cream->rotate * 8;
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u32 rm_val = RM;
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u32 rn_val = RN;
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if (rotation)
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rm_val = ((rm_val << (32 - rotation)) | (rm_val >> rotation));
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// SXTB16
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if (inst_cream->Rn == 15) {
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u32 lo = (u32)(s8)rm_val;
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u32 hi = (u32)(s8)(rm_val >> 16);
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RD = (lo | (hi << 16));
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}
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// SXTAB16
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else {
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u32 lo = (rn_val & 0xFFFF) + (u32)(s8)(rm_val & 0xFF);
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u32 hi = ((rn_val >> 16) & 0xFFFF) + (u32)(s8)((rm_val >> 16) & 0xFF);
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RD = (lo | (hi << 16));
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}
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(sxtab_inst));
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FETCH_INST;
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GOTO_NEXT_INST;
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}
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SXTAH_INST:
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SXTAH_INST:
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{
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{
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sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component;
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sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component;
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@ -5915,7 +5970,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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FETCH_INST;
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FETCH_INST;
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GOTO_NEXT_INST;
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GOTO_NEXT_INST;
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}
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}
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SXTB16_INST:
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TEQ_INST:
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TEQ_INST:
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{
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{
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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