mirror of
https://github.com/Lime3DS/Lime3DS.git
synced 2024-11-02 08:25:07 +01:00
dyncom: Remove unnecessary parameter for load/store operations
This commit is contained in:
parent
41531eeb32
commit
8617938441
@ -284,7 +284,7 @@ static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sh
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return shifter_operand;
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}
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typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw);
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typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr);
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struct ldst_inst {
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unsigned int inst;
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@ -302,7 +302,7 @@ struct ldst_inst {
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#define P_BIT BIT(inst, 24)
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#define OFFSET_12 BITS(inst, 0, 11)
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static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int addr;
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@ -314,7 +314,7 @@ static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsign
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virt_addr = addr;
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}
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static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn);
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@ -329,7 +329,7 @@ static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigne
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virt_addr = addr;
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}
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static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn);
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@ -341,7 +341,7 @@ static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, u
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virt_addr = addr;
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}
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static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int addr;
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@ -356,7 +356,7 @@ static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, un
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cpu->Reg[Rn] = addr;
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}
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static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int addr;
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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@ -374,7 +374,7 @@ static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsign
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cpu->Reg[Rn] = addr;
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}
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static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn);
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@ -393,7 +393,7 @@ static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, uns
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}
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}
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static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int shift = BITS(inst, 5, 6);
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unsigned int shift_imm = BITS(inst, 7, 11);
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unsigned int Rn = BITS(inst, 16, 19);
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@ -444,7 +444,7 @@ static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int ins
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cpu->Reg[Rn] = addr;
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}
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static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int shift = BITS(inst, 5, 6);
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unsigned int shift_imm = BITS(inst, 7, 11);
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unsigned int Rn = BITS(inst, 16, 19);
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@ -493,7 +493,7 @@ static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int in
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}
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}
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static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm);
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@ -509,7 +509,7 @@ static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, un
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}
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}
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static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int immedL = BITS(inst, 0, 3);
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unsigned int immedH = BITS(inst, 8, 11);
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unsigned int Rn = BITS(inst, 16, 19);
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@ -525,7 +525,7 @@ static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned
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virt_addr = addr;
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}
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static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int addr;
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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@ -540,7 +540,7 @@ static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned i
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virt_addr = addr;
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}
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static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int immedH = BITS(inst, 8, 11);
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unsigned int immedL = BITS(inst, 0, 3);
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@ -559,7 +559,7 @@ static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsig
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cpu->Reg[Rn] = addr;
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}
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static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int immedH = BITS(inst, 8, 11);
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unsigned int immedL = BITS(inst, 0, 3);
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@ -578,7 +578,7 @@ static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsi
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}
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}
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static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int Rm = BITS(inst, 0, 3);
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unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm);
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@ -593,7 +593,7 @@ static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsig
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}
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}
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static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int i = BITS(inst, 0, 15);
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int count = 0;
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@ -609,7 +609,7 @@ static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigne
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cpu->Reg[Rn] -= count * 4;
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}
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static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int i = BITS(inst, 0, 15);
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int count = 0;
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@ -625,7 +625,7 @@ static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigne
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cpu->Reg[Rn] += count * 4;
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}
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static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int i = BITS(inst, 0, 15);
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int count = 0;
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@ -641,7 +641,7 @@ static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned
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cpu->Reg[Rn] += count * 4;
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}
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static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int i = BITS(inst, 0, 15);
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int count = 0;
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@ -659,7 +659,7 @@ static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned
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}
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}
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static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) {
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static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
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unsigned int shift = BITS(inst, 5, 6);
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unsigned int shift_imm = BITS(inst, 7, 11);
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unsigned int Rn = BITS(inst, 16, 19);
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@ -4460,7 +4460,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int inst = inst_cream->inst;
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if (BIT(inst, 22) && !BIT(inst, 15)) {
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@ -4549,7 +4549,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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LDR_INST:
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{
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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@ -4571,7 +4571,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (CondPassed(cpu, inst_base->cond)) {
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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@ -4617,7 +4617,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
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@ -4635,7 +4635,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
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@ -4654,7 +4654,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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// Should check if RD is even-numbered, Rd != 14, addr[0:1] == 0, (CP15_reg1_U == 1 || addr[2] == 0)
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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// The 3DS doesn't have LPAE (Large Physical Access Extension), so it
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// wouldn't do this as a single read.
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@ -4755,7 +4755,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ReadMemory16(cpu, addr);
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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@ -4772,7 +4772,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = Memory::Read8(addr);
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if (BIT(value, 7)) {
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value |= 0xffffff00;
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@ -4792,7 +4792,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = ReadMemory16(cpu, addr);
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if (BIT(value, 15)) {
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@ -4813,7 +4813,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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@ -5316,7 +5316,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
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u32 address = 0;
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inst_cream->get_addr(cpu, inst_cream->inst, address, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, address);
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cpu->Cpsr = ReadMemory32(cpu, address);
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cpu->Reg[15] = ReadMemory32(cpu, address + 4);
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@ -5984,7 +5984,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
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u32 address = 0;
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inst_cream->get_addr(cpu, inst_cream->inst, address, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, address);
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WriteMemory32(cpu, address + 0, cpu->Reg[14]);
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WriteMemory32(cpu, address + 4, cpu->Spsr_copy);
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@ -6068,7 +6068,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int old_RN = cpu->Reg[Rn];
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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if (BIT(inst_cream->inst, 22) == 1) {
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for (int i = 0; i < 13; i++) {
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if (BIT(inst_cream->inst, i)) {
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@ -6139,7 +6139,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
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WriteMemory32(cpu, addr, value);
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@ -6177,7 +6177,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
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Memory::Write8(addr, value);
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}
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@ -6190,7 +6190,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
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Memory::Write8(addr, value);
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}
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@ -6203,7 +6203,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
|
||||
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr);
|
||||
|
||||
// The 3DS doesn't have the Large Physical Access Extension (LPAE)
|
||||
// so STRD wouldn't store these as a single write.
|
||||
@ -6317,7 +6317,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
|
||||
{
|
||||
if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
|
||||
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr);
|
||||
|
||||
unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xffff;
|
||||
WriteMemory16(cpu, addr, value);
|
||||
@ -6331,7 +6331,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
|
||||
{
|
||||
if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
|
||||
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
|
||||
inst_cream->get_addr(cpu, inst_cream->inst, addr);
|
||||
|
||||
unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
|
||||
WriteMemory32(cpu, addr, value);
|
||||
|
Loading…
Reference in New Issue
Block a user