mirror of
https://github.com/Lime3DS/Lime3DS.git
synced 2024-11-02 08:25:07 +01:00
Merge pull request #35 from bunnei/skyeye-3dmoo
ARM: Synchronize Citra's SkyEye core with 3dmoo's.
This commit is contained in:
commit
8a9f155f29
@ -12,6 +12,8 @@ ARM_Interpreter::ARM_Interpreter() {
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state = new ARMul_State;
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state = new ARMul_State;
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ARMul_EmulateInit();
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ARMul_EmulateInit();
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memset(state, 0, sizeof(ARMul_State));
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ARMul_NewState(state);
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ARMul_NewState(state);
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state->abort_model = 0;
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state->abort_model = 0;
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@ -23,12 +25,14 @@ ARM_Interpreter::ARM_Interpreter() {
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mmu_init(state);
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mmu_init(state);
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// Reset the core to initial state
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// Reset the core to initial state
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ARMul_CoProInit(state);
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ARMul_Reset(state);
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ARMul_Reset(state);
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state->NextInstr = 0;
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state->NextInstr = RESUME;
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state->Emulate = 3;
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state->Emulate = 3;
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state->pc = state->Reg[15] = 0x00000000;
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state->pc = state->Reg[15] = 0x00000000;
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->servaddr = 0xFFFF0000;
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}
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}
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ARM_Interpreter::~ARM_Interpreter() {
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ARM_Interpreter::~ARM_Interpreter() {
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@ -278,6 +278,11 @@ struct ARMul_State
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unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
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unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
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unsigned long long NumInstrs; /* the number of instructions executed */
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unsigned long long NumInstrs; /* the number of instructions executed */
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unsigned NumInstrsToExecute;
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unsigned NumInstrsToExecute;
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ARMword currentexaddr;
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ARMword currentexval;
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ARMword servaddr;
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unsigned NextInstr;
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unsigned NextInstr;
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unsigned VectorCatch; /* caught exception mask */
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unsigned VectorCatch; /* caught exception mask */
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unsigned CallDebug; /* set to call the debugger */
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unsigned CallDebug; /* set to call the debugger */
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File diff suppressed because it is too large
Load Diff
@ -18,10 +18,12 @@
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#define __ARMEMU_H__
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#define __ARMEMU_H__
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#include "core/arm/interpreter/skyeye_defs.h"
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#include "armdefs.h"
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#include "core/arm/interpreter/armdefs.h"
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//#include "skyeye.h"
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extern ARMword isize;
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//extern ARMword isize;
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#define DEBUG(...) DEBUG_LOG(ARM11, __VA_ARGS__)
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/* Condition code values. */
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/* Condition code values. */
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#define EQ 0
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#define EQ 0
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@ -228,17 +230,6 @@ extern ARMword isize;
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} \
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} \
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while (0)
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while (0)
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#define SETABORT_SKIPBRANCH(i, m, d) \
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do \
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{ \
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int SETABORT_mode = (m); \
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\
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ARMul_SetSPSR (state, SETABORT_mode, ARMul_GetCPSR (state)); \
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ARMul_SetCPSR (state, ((ARMul_GetCPSR (state) & ~(EMODE | TBIT)) \
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| (i) | SETABORT_mode)); \
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} \
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while (0)
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#ifndef MODE32
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#ifndef MODE32
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#define VECTORS 0x20
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#define VECTORS 0x20
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#define LEGALADDR 0x03ffffff
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#define LEGALADDR 0x03ffffff
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@ -306,7 +297,7 @@ extern ARMword isize;
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if (! state->is_v4) \
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if (! state->is_v4) \
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{ \
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{ \
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/* A standard PC inc and an S cycle. */ \
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/* A standard PC inc and an S cycle. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr = (state->NextInstr & 0xff) | 2; \
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state->NextInstr = (state->NextInstr & 0xff) | 2; \
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} \
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} \
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} \
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} \
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@ -320,7 +311,7 @@ extern ARMword isize;
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else \
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else \
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{ \
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{ \
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/* A standard PC inc and an N cycle. */ \
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/* A standard PC inc and an N cycle. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr |= 3; \
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state->NextInstr |= 3; \
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} \
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} \
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} \
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} \
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@ -330,7 +321,7 @@ extern ARMword isize;
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do \
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do \
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{ \
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{ \
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/* A standard PC inc. */ \
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/* A standard PC inc. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr |= 2; \
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state->NextInstr |= 2; \
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} \
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} \
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while (0)
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while (0)
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@ -420,9 +411,7 @@ extern ARMword isize;
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|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
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|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
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*/
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*/
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#define CP_ACCESS_ALLOWED(STATE, CP) \
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#define CP_ACCESS_ALLOWED(STATE, CP) \
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( ((CP) >= 14) \
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( ((CP) >= 14) ) \
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|| (! (STATE)->is_XScale) \
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|| (xscale_cp15_cp_access_allowed(STATE,15,CP)))
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/* Macro to rotate n right by b bits. */
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/* Macro to rotate n right by b bits. */
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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@ -15,16 +15,7 @@
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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//#include <unistd.h>
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#include "common/platform.h"
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <unistd.h>
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#elif EMU_PLATFORM == PLATFORM_WINDOWS
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#include <windows.h>
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#endif
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#include <math.h>
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armemu.h"
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#include "core/arm/interpreter/armemu.h"
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@ -42,8 +33,8 @@ ARMword ARMul_DoProg (ARMul_State * state);
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ARMword ARMul_DoInstr (ARMul_State * state);
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ARMword ARMul_DoInstr (ARMul_State * state);
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void ARMul_Abort (ARMul_State * state, ARMword address);
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void ARMul_Abort (ARMul_State * state, ARMword address);
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unsigned ARMul_MultTable[32] =
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unsigned ARMul_MultTable[32] = {
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{ 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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};
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};
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ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
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ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
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@ -63,71 +54,27 @@ void arm_dyncom_Abort(ARMul_State * state, ARMword vector)
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/* ahe-ykl : the following code to initialize user mode
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/* ahe-ykl : the following code to initialize user mode
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code is architecture dependent and probably model dependant. */
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code is architecture dependent and probably model dependant. */
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//#include "skyeye_arch.h"
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/*#include "skyeye_arch.h"
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//#include "skyeye_pref.h"
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#include "skyeye_pref.h"
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//#include "skyeye_exec_info.h"
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#include "skyeye_exec_info.h"
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//#include "bank_defs.h"
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#include "bank_defs.h"*/
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#include "armcpu.h"
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//#include "armcpu.h"
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//#include "skyeye_callback.h"
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//#include "skyeye_callback.h"
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//void arm_user_mode_init(generic_arch_t * arch_instance)
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/*
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//{
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ARM_CPU_State* cpu = get_current_cpu();
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// sky_pref_t *pref = get_skyeye_pref();
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arm_core_t* core = &cpu->core[0];
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//
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// if (pref->user_mode_sim)
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// {
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// sky_exec_info_t *info = get_skyeye_exec_info();
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// info->arch_page_size = 0x1000;
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// info->arch_stack_top = 0x1ffffff0;// + 0x401fe7 - 0xff0; /* arbitrary value */
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// /* stack initial address specific to architecture may be placed here */
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//
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// /* we need to mmap the stack space, if we are using skyeye space */
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// if (info->mmap_access)
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// {
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// /* get system stack size */
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// size_t stacksize = 0;
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// pthread_attr_t attr;
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// pthread_attr_init(&attr);
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// pthread_attr_getstacksize(&attr, &stacksize);
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// if (stacksize > info->arch_stack_top)
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// {
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// printf("arch_stack_top is too low\n");
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// stacksize = info->arch_stack_top;
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// }
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//
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// /* Note: Skyeye is occupating 0x400000 to 0x600000 */
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// /* We do a mmap */
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// void* ret = mmap( (info->arch_stack_top) - stacksize,
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// stacksize + 0x1000 , PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
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// if (ret == MAP_FAILED){
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// /* ideally, we should find an empty space until it works */
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// printf("mmap error, stack couldn't be mapped: errno %d\n", errno);
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// exit(-1);
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// } else {
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// memset(ret, '\0', stacksize);
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// //printf("stack top has been defined at %x size %x\n", (uint32_t) ret + stacksize, stacksize);
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// //info->arch_stack_top = (uint32_t) ret + stacksize;
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// }
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// }
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//
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// exec_stack_init();
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//
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// ARM_CPU_State* cpu = get_current_cpu();
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// arm_core_t* core = &cpu->core[0];
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//
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// uint32_t sp = info->initial_sp;
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//
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// core->Cpsr = 0x10; /* User mode */
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// /* FIXME: may need to add thumb */
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// core->Reg[13] = sp;
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// core->Reg[10] = info->start_data;
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// core->Reg[0] = 0;
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// bus_read(32, sp + 4, &(core->Reg[1]));
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// bus_read(32, sp + 8, &(core->Reg[2]));
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// }
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//
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//}
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uint32_t sp = info->initial_sp;
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core->Cpsr = 0x10; // User mode
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// FIXME: may need to add thumb
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core->Reg[13] = sp;
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core->Reg[10] = info->start_data;
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core->Reg[0] = 0;
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bus_read(32, sp + 4, &(core->Reg[1]));
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bus_read(32, sp + 8, &(core->Reg[2]));
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*/
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/***************************************************************************\
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/***************************************************************************\
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* Call this routine once to set up the emulator's tables. *
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* Call this routine once to set up the emulator's tables. *
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\***************************************************************************/
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\***************************************************************************/
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@ -195,6 +142,7 @@ ARMul_NewState (ARMul_State *state)
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if (state->EventPtr == NULL) {
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if (state->EventPtr == NULL) {
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printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n");
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printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n");
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exit(-1);
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exit(-1);
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//skyeye_exit (-1);
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}
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}
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for (i = 0; i < EVENTLISTSIZE; i++)
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for (i = 0; i < EVENTLISTSIZE; i++)
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*(state->EventPtr + i) = NULL;
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*(state->EventPtr + i) = NULL;
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@ -224,9 +172,10 @@ ARMul_NewState (ARMul_State *state)
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state->CP14R0_CCD = -1;
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state->CP14R0_CCD = -1;
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/* ahe-ykl: common function for interpret and dyncom */
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/* ahe-ykl: common function for interpret and dyncom */
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//sky_pref_t *pref = get_skyeye_pref();
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/*sky_pref_t *pref = get_skyeye_pref();
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//if (pref->user_mode_sim)
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if (pref->user_mode_sim)
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// register_callback(arm_user_mode_init, Bootmach_callback);
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register_callback(arm_user_mode_init, Bootmach_callback);
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*/
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memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128);
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memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128);
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state->exclusive_access_state = 0;
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state->exclusive_access_state = 0;
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@ -245,14 +194,13 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
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if (properties & ARM_Fix26_Prop) {
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if (properties & ARM_Fix26_Prop) {
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state->prog32Sig = LOW;
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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state->data32Sig = LOW;
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}
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} else {
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else {
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state->prog32Sig = HIGH;
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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state->data32Sig = HIGH;
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}
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}
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/* 2004-05-09 chy
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/* 2004-05-09 chy
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below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
|
below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
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*/
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*/
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// state->lateabtSig = HIGH;
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// state->lateabtSig = HIGH;
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@ -274,7 +222,7 @@ below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
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/* Only initialse the coprocessor support once we
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/* Only initialse the coprocessor support once we
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know what kind of chip we are dealing with. */
|
know what kind of chip we are dealing with. */
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ARMul_CoProInit (state);
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//ARMul_CoProInit (state);
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}
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}
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@ -291,14 +239,13 @@ ARMul_Reset (ARMul_State * state)
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state->Reg[15] = 0;
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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state->Mode = SVC32MODE;
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}
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} else {
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else {
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state->Reg[15] = R15INTBITS | SVC26MODE;
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state->Reg[15] = R15INTBITS | SVC26MODE;
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state->Cpsr = INTBITS | SVC26MODE;
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state->Cpsr = INTBITS | SVC26MODE;
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state->Mode = SVC26MODE;
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state->Mode = SVC26MODE;
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}
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}
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//fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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//fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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ARMul_CPSRAltered (state);
|
//ARMul_CPSRAltered (state);
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state->Bank = SVCBANK;
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state->Bank = SVCBANK;
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FLUSHPIPE;
|
FLUSHPIPE;
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@ -321,7 +268,7 @@ ARMul_Reset (ARMul_State * state)
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state->NumFcycles = 0;
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state->NumFcycles = 0;
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//fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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//fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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mmu_reset (state);
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//mmu_reset (state);
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//fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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//fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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//mem_reset (state); /* move to memory/ram.c */
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//mem_reset (state); /* move to memory/ram.c */
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@ -341,7 +288,7 @@ ARMul_Reset (ARMul_State * state)
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//teawater add for arm2x86 2005.02.14-------------------------------------------
|
//teawater add for arm2x86 2005.02.14-------------------------------------------
|
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if (arm2x86_init (state)) {
|
if (arm2x86_init (state)) {
|
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printf ("SKYEYE: arm2x86_init error\n");
|
printf ("SKYEYE: arm2x86_init error\n");
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skyeye_exit (-1);
|
//skyeye_exit (-1);
|
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}
|
}
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||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
}
|
}
|
||||||
@ -362,7 +309,8 @@ static void
|
|||||||
dbct_test_speed_sig(int signo)
|
dbct_test_speed_sig(int signo)
|
||||||
{
|
{
|
||||||
printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count);
|
printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count);
|
||||||
skyeye_exit(0);
|
exit(0);
|
||||||
|
//skyeye_exit(0);
|
||||||
}
|
}
|
||||||
#endif //DBCT_TEST_SPEED
|
#endif //DBCT_TEST_SPEED
|
||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
@ -396,12 +344,12 @@ ARMul_DoProg (ARMul_State * state)
|
|||||||
if (sigaction(SIGALRM, &act, NULL) == -1) {
|
if (sigaction(SIGALRM, &act, NULL) == -1) {
|
||||||
#endif //__CYGWIN__
|
#endif //__CYGWIN__
|
||||||
fprintf(stderr, "init timer error.\n");
|
fprintf(stderr, "init timer error.\n");
|
||||||
skyeye_exit(-1);
|
exit(-1);
|
||||||
|
//skyeye_exit(-1);
|
||||||
}
|
}
|
||||||
if (skyeye_config.dbct_test_speed_sec) {
|
if (skyeye_config.dbct_test_speed_sec) {
|
||||||
value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec;
|
value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec;
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
value.it_value.tv_sec = DBCT_TEST_SPEED_SEC;
|
value.it_value.tv_sec = DBCT_TEST_SPEED_SEC;
|
||||||
}
|
}
|
||||||
printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec);
|
printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec);
|
||||||
@ -414,7 +362,7 @@ ARMul_DoProg (ARMul_State * state)
|
|||||||
if (setitimer(ITIMER_REAL, &value, NULL) == -1) {
|
if (setitimer(ITIMER_REAL, &value, NULL) == -1) {
|
||||||
#endif //__CYGWIN__
|
#endif //__CYGWIN__
|
||||||
fprintf(stderr, "init timer error.\n");
|
fprintf(stderr, "init timer error.\n");
|
||||||
skyeye_exit(-1);
|
//skyeye_exit(-1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -429,8 +377,7 @@ ARMul_DoProg (ARMul_State * state)
|
|||||||
#ifdef DBCT
|
#ifdef DBCT
|
||||||
if (skyeye_config.no_dbct) {
|
if (skyeye_config.no_dbct) {
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
pc = ARMul_Emulate32_dbct (state);
|
pc = ARMul_Emulate32_dbct (state);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
@ -439,7 +386,7 @@ ARMul_DoProg (ARMul_State * state)
|
|||||||
}
|
}
|
||||||
|
|
||||||
else {
|
else {
|
||||||
_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
|
//pc = ARMul_Emulate26 (state);
|
||||||
}
|
}
|
||||||
//chy 2006-02-22, should test debugmode first
|
//chy 2006-02-22, should test debugmode first
|
||||||
//chy 2006-04-14, put below codes in ARMul_Emulate
|
//chy 2006-04-14, put below codes in ARMul_Emulate
|
||||||
@ -476,8 +423,7 @@ ARMul_DoInstr (ARMul_State * state)
|
|||||||
#ifdef DBCT
|
#ifdef DBCT
|
||||||
if (skyeye_config.no_dbct) {
|
if (skyeye_config.no_dbct) {
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
|
//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
|
||||||
#ifndef DBCT_GDBRSP
|
#ifndef DBCT_GDBRSP
|
||||||
printf("DBCT GDBRSP function switch is off.\n");
|
printf("DBCT GDBRSP function switch is off.\n");
|
||||||
@ -492,9 +438,8 @@ ARMul_DoInstr (ARMul_State * state)
|
|||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
else {
|
//else
|
||||||
_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
|
//pc = ARMul_Emulate26 (state);
|
||||||
}
|
|
||||||
|
|
||||||
return (pc);
|
return (pc);
|
||||||
}
|
}
|
||||||
@ -533,13 +478,9 @@ ARMul_Abort (ARMul_State * state, ARMword vector)
|
|||||||
isize);
|
isize);
|
||||||
break;
|
break;
|
||||||
case ARMul_SWIV: /* Software Interrupt */
|
case ARMul_SWIV: /* Software Interrupt */
|
||||||
// Modified SETABORT that doesn't branch to a SVC vector as we are implementing this in HLE
|
SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
||||||
// Instead of doing normal routine, backup R15 by one instruction (this is what PC will get
|
|
||||||
// set to, making it the next instruction after the SVC call), and skip setting the LR.
|
|
||||||
SETABORT_SKIPBRANCH (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
|
||||||
isize);
|
isize);
|
||||||
state->Reg[15] -= 4;
|
break;
|
||||||
return;
|
|
||||||
case ARMul_PrefetchAbortV: /* Prefetch Abort */
|
case ARMul_PrefetchAbortV: /* Prefetch Abort */
|
||||||
state->AbortAddr = 1;
|
state->AbortAddr = 1;
|
||||||
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
||||||
@ -575,12 +516,11 @@ ARMul_Abort (ARMul_State * state, ARMword vector)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (ARMul_MODE32BIT) {
|
if (ARMul_MODE32BIT) {
|
||||||
if (state->mmu.control & CONTROL_VECTOR)
|
/*if (state->mmu.control & CONTROL_VECTOR)
|
||||||
vector += 0xffff0000; //for v4 high exception address
|
vector += 0xffff0000; //for v4 high exception address*/
|
||||||
if (state->vector_remap_flag)
|
if (state->vector_remap_flag)
|
||||||
vector += state->vector_remap_addr; /* support some remap function in LPC processor */
|
vector += state->vector_remap_addr; /* support some remap function in LPC processor */
|
||||||
ARMul_SetR15 (state, vector);
|
ARMul_SetR15 (state, vector);
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
ARMul_SetR15 (state, R15CCINTMODE | vector);
|
ARMul_SetR15 (state, R15CCINTMODE | vector);
|
||||||
}
|
}
|
||||||
|
@ -15,22 +15,23 @@
|
|||||||
along with this program; if not, write to the Free Software
|
along with this program; if not, write to the Free Software
|
||||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||||
|
|
||||||
|
//#include <util.h>
|
||||||
|
|
||||||
#include "core/arm/interpreter/armdefs.h"
|
#include "core/arm/interpreter/armdefs.h"
|
||||||
#include "core/arm/interpreter/armemu.h"
|
#include "core/arm/interpreter/armemu.h"
|
||||||
#include "core/arm/interpreter/skyeye_defs.h"
|
|
||||||
#include "core/hle/coprocessor.h"
|
#include "core/hle/coprocessor.h"
|
||||||
#include "core/arm/disassembler/arm_disasm.h"
|
#include "core/arm/disassembler/arm_disasm.h"
|
||||||
|
|
||||||
unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
|
//#include "ansidecl.h"
|
||||||
unsigned cpnum);
|
//#include "skyeye.h"
|
||||||
//extern int skyeye_instr_debug;
|
//extern int skyeye_instr_debug;
|
||||||
/* Definitions for the support routines. */
|
/* Definitions for the support routines. */
|
||||||
|
|
||||||
static ARMword ModeToBank (ARMword);
|
static ARMword ModeToBank (ARMword);
|
||||||
static void EnvokeList (ARMul_State *, unsigned int, unsigned int);
|
static void EnvokeList (ARMul_State *, unsigned int, unsigned int);
|
||||||
|
|
||||||
struct EventNode
|
struct EventNode {
|
||||||
{ /* An event list node. */
|
/* An event list node. */
|
||||||
unsigned (*func) (ARMul_State *); /* The function to call. */
|
unsigned (*func) (ARMul_State *); /* The function to call. */
|
||||||
struct EventNode *next;
|
struct EventNode *next;
|
||||||
};
|
};
|
||||||
@ -76,9 +77,9 @@ ARMword
|
|||||||
ARMul_GetNextPC (ARMul_State * state)
|
ARMul_GetNextPC (ARMul_State * state)
|
||||||
{
|
{
|
||||||
if (state->Mode > SVC26MODE)
|
if (state->Mode > SVC26MODE)
|
||||||
return state->Reg[15] + isize;
|
return state->Reg[15] + INSN_SIZE;
|
||||||
else
|
else
|
||||||
return (state->Reg[15] + isize) & R15PCBITS;
|
return (state->Reg[15] + INSN_SIZE) & R15PCBITS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* This routine sets the value of the PC. */
|
/* This routine sets the value of the PC. */
|
||||||
@ -213,13 +214,13 @@ ARMul_CPSRAltered (ARMul_State * state)
|
|||||||
|
|
||||||
oldmode = state->Mode;
|
oldmode = state->Mode;
|
||||||
|
|
||||||
if (state->Mode != (state->Cpsr & MODEBITS)) {
|
/*if (state->Mode != (state->Cpsr & MODEBITS)) {
|
||||||
state->Mode =
|
state->Mode =
|
||||||
ARMul_SwitchMode (state, state->Mode,
|
ARMul_SwitchMode (state, state->Mode,
|
||||||
state->Cpsr & MODEBITS);
|
state->Cpsr & MODEBITS);
|
||||||
|
|
||||||
state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
|
state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
|
||||||
}
|
}*/
|
||||||
//state->Cpsr &= ~MODEBITS;
|
//state->Cpsr &= ~MODEBITS;
|
||||||
|
|
||||||
ASSIGNINT (state->Cpsr & INTBITS);
|
ASSIGNINT (state->Cpsr & INTBITS);
|
||||||
@ -244,13 +245,11 @@ ARMul_CPSRAltered (ARMul_State * state)
|
|||||||
state->Emulate = CHANGEMODE;
|
state->Emulate = CHANGEMODE;
|
||||||
state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
|
state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
if (state->Mode > SVC26MODE) {
|
if (state->Mode > SVC26MODE) {
|
||||||
state->Emulate = CHANGEMODE;
|
state->Emulate = CHANGEMODE;
|
||||||
state->Reg[15] = R15PC;
|
state->Reg[15] = R15PC;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
|
state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -406,12 +405,10 @@ ARMul_NegZero (ARMul_State * state, ARMword result)
|
|||||||
if (NEG (result)) {
|
if (NEG (result)) {
|
||||||
SETN;
|
SETN;
|
||||||
CLEARZ;
|
CLEARZ;
|
||||||
}
|
} else if (result == 0) {
|
||||||
else if (result == 0) {
|
|
||||||
CLEARN;
|
CLEARN;
|
||||||
SETZ;
|
SETZ;
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
CLEARN;
|
CLEARN;
|
||||||
CLEARZ;
|
CLEARZ;
|
||||||
}
|
}
|
||||||
@ -482,12 +479,13 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
|
|
||||||
UNDEF_LSCPCBaseWb;
|
UNDEF_LSCPCBaseWb;
|
||||||
//printf("SKYEYE ARMul_LDC, CPnum is %x, instr %x, addr %x\n",CPNum, instr, address);
|
//printf("SKYEYE ARMul_LDC, CPnum is %x, instr %x, addr %x\n",CPNum, instr, address);
|
||||||
/*chy 2004-05-23 should update this function in the future,should concern dataabort*/
|
/*chy 2004-05-23 should update this function in the future,should concern dataabort*/
|
||||||
// chy 2004-05-25 , fix it now,so needn't printf
|
// chy 2004-05-25 , fix it now,so needn't printf
|
||||||
// printf("SKYEYE ARMul_LDC, should update this function!!!!!\n");
|
// printf("SKYEYE ARMul_LDC, should update this function!!!!!\n");
|
||||||
//exit(-1);
|
//exit(-1);
|
||||||
|
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->LDC[CPNum]) {
|
||||||
/*
|
/*
|
||||||
printf
|
printf
|
||||||
("SKYEYE ARMul_LDC,NOT ALLOW, underinstr, CPnum is %x, instr %x, addr %x\n",
|
("SKYEYE ARMul_LDC,NOT ALLOW, underinstr, CPnum is %x, instr %x, addr %x\n",
|
||||||
@ -497,8 +495,8 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
//if (ADDREXCEPT (address))
|
/*if (ADDREXCEPT (address))
|
||||||
// INTERNALABORT (address);
|
INTERNALABORT (address);*/
|
||||||
|
|
||||||
cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0);
|
cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0);
|
||||||
while (cpab == ARMul_BUSY) {
|
while (cpab == ARMul_BUSY) {
|
||||||
@ -508,8 +506,7 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
cpab = (state->LDC[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->LDC[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0);
|
instr, 0);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->LDC[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->LDC[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
0);
|
0);
|
||||||
}
|
}
|
||||||
@ -531,10 +528,10 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
|
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
//chy 2004-05-25
|
//chy 2004-05-25
|
||||||
/*
|
/*
|
||||||
if (BIT (21))
|
if (BIT (21))
|
||||||
LSBase = state->Base;
|
LSBase = state->Base;
|
||||||
*/
|
*/
|
||||||
|
|
||||||
cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data);
|
cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data);
|
||||||
|
|
||||||
@ -549,7 +546,7 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
}
|
}
|
||||||
|
|
||||||
//chy 2004-05-25
|
//chy 2004-05-25
|
||||||
L_ldc_takeabort:
|
L_ldc_takeabort:
|
||||||
if (BIT (21)) {
|
if (BIT (21)) {
|
||||||
if (!
|
if (!
|
||||||
((state->abortSig || state->Aborted)
|
((state->abortSig || state->Aborted)
|
||||||
@ -581,7 +578,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
// printf("SKYEYE ARMul_STC, should update this function!!!!!\n");
|
// printf("SKYEYE ARMul_STC, should update this function!!!!!\n");
|
||||||
|
|
||||||
//exit(-1);
|
//exit(-1);
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->STC[CPNum]) {
|
||||||
/*
|
/*
|
||||||
printf
|
printf
|
||||||
("SKYEYE ARMul_STC,NOT ALLOW, undefinstr, CPnum is %x, instr %x, addr %x\n",
|
("SKYEYE ARMul_STC,NOT ALLOW, undefinstr, CPnum is %x, instr %x, addr %x\n",
|
||||||
@ -591,8 +589,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
//if (ADDREXCEPT (address) || VECTORACCESS (address))
|
/*if (ADDREXCEPT (address) || VECTORACCESS (address))
|
||||||
// INTERNALABORT (address);
|
INTERNALABORT (address);*/
|
||||||
|
|
||||||
cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data);
|
cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data);
|
||||||
while (cpab == ARMul_BUSY) {
|
while (cpab == ARMul_BUSY) {
|
||||||
@ -601,8 +599,7 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
cpab = (state->STC[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->STC[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0);
|
instr, 0);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->STC[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->STC[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
&data);
|
&data);
|
||||||
}
|
}
|
||||||
@ -616,16 +613,16 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
CPTAKEABORT;
|
CPTAKEABORT;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
#ifndef MODE32
|
/*#ifndef MODE32
|
||||||
if (ADDREXCEPT (address) || VECTORACCESS (address))
|
if (ADDREXCEPT (address) || VECTORACCESS (address))
|
||||||
INTERNALABORT (address);
|
INTERNALABORT (address);
|
||||||
#endif
|
#endif*/
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
//chy 2004-05-25
|
//chy 2004-05-25
|
||||||
/*
|
/*
|
||||||
if (BIT (21))
|
if (BIT (21))
|
||||||
LSBase = state->Base;
|
LSBase = state->Base;
|
||||||
*/
|
*/
|
||||||
cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data);
|
cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data);
|
||||||
ARMul_StoreWordN (state, address, data);
|
ARMul_StoreWordN (state, address, data);
|
||||||
//chy 2004-05-25
|
//chy 2004-05-25
|
||||||
@ -641,7 +638,7 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||||||
goto L_stc_takeabort;
|
goto L_stc_takeabort;
|
||||||
}
|
}
|
||||||
//chy 2004-05-25
|
//chy 2004-05-25
|
||||||
L_stc_takeabort:
|
L_stc_takeabort:
|
||||||
if (BIT (21)) {
|
if (BIT (21)) {
|
||||||
if (!
|
if (!
|
||||||
((state->abortSig || state->Aborted)
|
((state->abortSig || state->Aborted)
|
||||||
@ -659,15 +656,31 @@ void
|
|||||||
ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
|
ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
|
||||||
{
|
{
|
||||||
unsigned cpab;
|
unsigned cpab;
|
||||||
|
int cm = BITS(0, 3) & 0xf;
|
||||||
|
int cp = BITS(5, 7) & 0x7;
|
||||||
|
int rd = BITS(12, 15) & 0xf;
|
||||||
|
int cn = BITS(16, 19) & 0xf;
|
||||||
|
int cpopc = BITS(21, 23) & 0x7;
|
||||||
|
|
||||||
|
if (CPNum == 15 && source == 0) //Cache flush
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
//printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
|
//printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->MCR[CPNum]) {
|
||||||
//chy 2004-07-19 should fix in the future ????!!!!
|
//chy 2004-07-19 should fix in the future ????!!!!
|
||||||
//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
|
DEBUG("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
|
||||||
ARMul_UndefInstr (state, instr);
|
ARMul_UndefInstr (state, instr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//DEBUG("SKYEYE ARMul_MCR p%d, %d, r%d, c%d, c%d, %d\n", CPNum, cpopc, rd, cn, cm, cp);
|
||||||
|
//DEBUG("plutoo: MCR not implemented\n");
|
||||||
|
//exit(1);
|
||||||
|
//return;
|
||||||
|
|
||||||
cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
|
cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
|
||||||
|
|
||||||
while (cpab == ARMul_BUSY) {
|
while (cpab == ARMul_BUSY) {
|
||||||
@ -677,17 +690,15 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
|
|||||||
cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0);
|
instr, 0);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
source);
|
source);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cpab == ARMul_CANT) {
|
if (cpab == ARMul_CANT) {
|
||||||
printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
|
DEBUG("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); //ichfly todo
|
||||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
//ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
ARMul_Ccycles (state, 1, 0);
|
ARMul_Ccycles (state, 1, 0);
|
||||||
}
|
}
|
||||||
@ -700,7 +711,8 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2
|
|||||||
{
|
{
|
||||||
unsigned cpab;
|
unsigned cpab;
|
||||||
|
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->MCRR[CPNum]) {
|
||||||
ARMul_UndefInstr (state, instr);
|
ARMul_UndefInstr (state, instr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@ -714,16 +726,14 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2
|
|||||||
cpab = (state->MCRR[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->MCRR[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0, 0);
|
instr, 0, 0);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->MCRR[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->MCRR[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
source1, source2);
|
source1, source2);
|
||||||
}
|
}
|
||||||
if (cpab == ARMul_CANT) {
|
if (cpab == ARMul_CANT) {
|
||||||
printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x, source %x %x\n", __FUNCTION__, CPNum, instr, source1, source2);
|
printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x, source %x %x\n", __FUNCTION__, CPNum, instr, source1, source2);
|
||||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
ARMul_Ccycles (state, 1, 0);
|
ARMul_Ccycles (state, 1, 0);
|
||||||
}
|
}
|
||||||
@ -731,21 +741,34 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2
|
|||||||
|
|
||||||
/* This function does the Busy-Waiting for an MRC instruction. */
|
/* This function does the Busy-Waiting for an MRC instruction. */
|
||||||
|
|
||||||
ARMword
|
ARMword ARMul_MRC (ARMul_State * state, ARMword instr)
|
||||||
ARMul_MRC (ARMul_State * state, ARMword instr)
|
|
||||||
{
|
{
|
||||||
unsigned cpab;
|
int cm = BITS(0, 3) & 0xf;
|
||||||
|
int cp = BITS(5, 7) & 0x7;
|
||||||
|
int rd = BITS(12, 15) & 0xf;
|
||||||
|
int cn = BITS(16, 19) & 0xf;
|
||||||
|
int cpopc = BITS(21, 23) & 0x7;
|
||||||
|
|
||||||
|
if (cn == 13 && cm == 0 && cp == 3) { //c13,c0,3; returns CPU svc buffer
|
||||||
ARMword result = HLE::CallMRC(instr);
|
ARMword result = HLE::CallMRC(instr);
|
||||||
|
|
||||||
if (result != -1) {
|
if (result != -1) {
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//DEBUG("SKYEYE ARMul_MRC p%d, %d, r%d, c%d, c%d, %d\n", CPNum, cpopc, rd, cn, cm, cp);
|
||||||
|
//DEBUG("plutoo: MRC not implemented\n");
|
||||||
|
//return;
|
||||||
|
|
||||||
|
unsigned cpab;
|
||||||
|
ARMword result = 0;
|
||||||
|
|
||||||
//printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
|
//printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->MRC[CPNum]) {
|
||||||
//chy 2004-07-19 should fix in the future????!!!!
|
//chy 2004-07-19 should fix in the future????!!!!
|
||||||
//printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n",CPNum, instr);
|
DEBUG("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n", CPNum, instr);
|
||||||
ARMul_UndefInstr (state, instr);
|
ARMul_UndefInstr (state, instr);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@ -757,8 +780,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
|
|||||||
cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0);
|
instr, 0);
|
||||||
return (0);
|
return (0);
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
&result);
|
&result);
|
||||||
}
|
}
|
||||||
@ -767,8 +789,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
|
|||||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||||
/* Parent will destroy the flags otherwise. */
|
/* Parent will destroy the flags otherwise. */
|
||||||
result = ECC;
|
result = ECC;
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
ARMul_Ccycles (state, 1, 0);
|
ARMul_Ccycles (state, 1, 0);
|
||||||
ARMul_Icycles (state, 1, 0);
|
ARMul_Icycles (state, 1, 0);
|
||||||
@ -786,7 +807,8 @@ ARMul_MRRC (ARMul_State * state, ARMword instr, ARMword * dest1, ARMword * dest2
|
|||||||
ARMword result1 = 0;
|
ARMword result1 = 0;
|
||||||
ARMword result2 = 0;
|
ARMword result2 = 0;
|
||||||
|
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->MRRC[CPNum]) {
|
||||||
ARMul_UndefInstr (state, instr);
|
ARMul_UndefInstr (state, instr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@ -798,16 +820,14 @@ ARMul_MRRC (ARMul_State * state, ARMword instr, ARMword * dest1, ARMword * dest2
|
|||||||
cpab = (state->MRRC[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->MRRC[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr, 0, 0);
|
instr, 0, 0);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->MRRC[CPNum]) (state, ARMul_BUSY, instr,
|
cpab = (state->MRRC[CPNum]) (state, ARMul_BUSY, instr,
|
||||||
&result1, &result2);
|
&result1, &result2);
|
||||||
}
|
}
|
||||||
if (cpab == ARMul_CANT) {
|
if (cpab == ARMul_CANT) {
|
||||||
printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x\n", __FUNCTION__, CPNum, instr);
|
printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x\n", __FUNCTION__, CPNum, instr);
|
||||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
BUSUSEDINCPCN;
|
BUSUSEDINCPCN;
|
||||||
ARMul_Ccycles (state, 1, 0);
|
ARMul_Ccycles (state, 1, 0);
|
||||||
ARMul_Icycles (state, 1, 0);
|
ARMul_Icycles (state, 1, 0);
|
||||||
@ -824,7 +844,8 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
|
|||||||
{
|
{
|
||||||
unsigned cpab;
|
unsigned cpab;
|
||||||
|
|
||||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||||
|
if (!state->CDP[CPNum]) {
|
||||||
ARMul_UndefInstr (state, instr);
|
ARMul_UndefInstr (state, instr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@ -835,8 +856,7 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
|
|||||||
cpab = (state->CDP[CPNum]) (state, ARMul_INTERRUPT,
|
cpab = (state->CDP[CPNum]) (state, ARMul_INTERRUPT,
|
||||||
instr);
|
instr);
|
||||||
return;
|
return;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
cpab = (state->CDP[CPNum]) (state, ARMul_BUSY, instr);
|
cpab = (state->CDP[CPNum]) (state, ARMul_BUSY, instr);
|
||||||
}
|
}
|
||||||
if (cpab == ARMul_CANT)
|
if (cpab == ARMul_CANT)
|
||||||
@ -850,6 +870,8 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
|
|||||||
void
|
void
|
||||||
ARMul_UndefInstr (ARMul_State * state, ARMword instr)
|
ARMul_UndefInstr (ARMul_State * state, ARMword instr)
|
||||||
{
|
{
|
||||||
|
/*SKYEYE_LOG_IN_CLR(RED, "In %s, line = %d, undef instr: 0x%x\n",
|
||||||
|
__func__, __LINE__, instr);*/
|
||||||
char buff[512];
|
char buff[512];
|
||||||
ARM_Disasm disasm = ARM_Disasm();
|
ARM_Disasm disasm = ARM_Disasm();
|
||||||
disasm.disasm(state->pc, instr, buff);
|
disasm.disasm(state->pc, instr, buff);
|
||||||
@ -866,12 +888,10 @@ IntPending (ARMul_State * state)
|
|||||||
if (state->NresetSig == LOW) {
|
if (state->NresetSig == LOW) {
|
||||||
ARMul_Abort (state, ARMul_ResetV);
|
ARMul_Abort (state, ARMul_ResetV);
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
} else if (!state->NfiqSig && !FFLAG) {
|
||||||
else if (!state->NfiqSig && !FFLAG) {
|
|
||||||
ARMul_Abort (state, ARMul_FIQV);
|
ARMul_Abort (state, ARMul_FIQV);
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
} else if (!state->NirqSig && !IFLAG) {
|
||||||
else if (!state->NirqSig && !IFLAG) {
|
|
||||||
ARMul_Abort (state, ARMul_IRQV);
|
ARMul_Abort (state, ARMul_IRQV);
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
@ -882,7 +902,7 @@ IntPending (ARMul_State * state)
|
|||||||
/* Align a word access to a non word boundary. */
|
/* Align a word access to a non word boundary. */
|
||||||
|
|
||||||
ARMword
|
ARMword
|
||||||
ARMul_Align (ARMul_State *state, ARMword address, ARMword data)
|
ARMul_Align (ARMul_State* state, ARMword address, ARMword data)
|
||||||
{
|
{
|
||||||
/* This code assumes the address is really unaligned,
|
/* This code assumes the address is really unaligned,
|
||||||
as a shift by 32 is undefined in C. */
|
as a shift by 32 is undefined in C. */
|
||||||
@ -907,7 +927,11 @@ ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay,
|
|||||||
state->Now = ARMul_Time (state);
|
state->Now = ARMul_Time (state);
|
||||||
when = (state->Now + delay) % EVENTLISTSIZE;
|
when = (state->Now + delay) % EVENTLISTSIZE;
|
||||||
event = (struct EventNode *) malloc (sizeof (struct EventNode));
|
event = (struct EventNode *) malloc (sizeof (struct EventNode));
|
||||||
_dbg_assert_msg_(ARM11, event, "SKYEYE:ARMul_ScheduleEvent: malloc event error\n");
|
if (!event) {
|
||||||
|
printf ("SKYEYE:ARMul_ScheduleEvent: malloc event error\n");
|
||||||
|
exit(-1);
|
||||||
|
//skyeye_exit (-1);
|
||||||
|
}
|
||||||
event->func = what;
|
event->func = what;
|
||||||
event->next = *(state->EventPtr + when);
|
event->next = *(state->EventPtr + when);
|
||||||
*(state->EventPtr + when) = event;
|
*(state->EventPtr + when) = event;
|
||||||
|
Loading…
Reference in New Issue
Block a user