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114 lines
3.5 KiB
C
114 lines
3.5 KiB
C
/* armemu.h -- ARMulator emulation macros: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#pragma once
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#include "core/arm/skyeye_common/armdefs.h"
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/* Macros to twiddle the status flags and mode. */
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#define NBIT ((unsigned)1L << 31)
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#define ZBIT (1L << 30)
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#define CBIT (1L << 29)
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#define VBIT (1L << 28)
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#define QBIT (1L << 27)
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#define IBIT (1L << 7)
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#define FBIT (1L << 6)
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#define IFBITS (3L << 6)
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#define R15IBIT (1L << 27)
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#define R15FBIT (1L << 26)
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#define R15IFBITS (3L << 26)
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#if defined MODE32 || defined MODET
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#define CCBITS (0xf8000000L)
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#else
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#define CCBITS (0xf0000000L)
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#endif
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#define INTBITS (0xc0L)
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#if defined MODET && defined MODE32
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#define PCBITS (0xffffffffL)
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#else
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#define PCBITS (0xfffffffcL)
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#endif
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#define MODEBITS (0x1fL)
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#define R15INTBITS (3L << 26)
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#if defined MODET && defined MODE32
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#define R15PCBITS (0x03ffffffL)
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#else
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#define R15PCBITS (0x03fffffcL)
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#endif
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#define R15MODEBITS (0x3L)
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#ifdef MODE32
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#define PCMASK PCBITS
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#define PCWRAP(pc) (pc)
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#else
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#define PCMASK R15PCBITS
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#define PCWRAP(pc) ((pc) & R15PCBITS)
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#endif
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#define PC (state->Reg[15] & PCMASK)
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#define R15CCINTMODE (state->Reg[15] & (CCBITS | R15INTBITS | R15MODEBITS))
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#define R15INT (state->Reg[15] & R15INTBITS)
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#define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
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#define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
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#define R15INTMODE (state->Reg[15] & (R15INTBITS | R15MODEBITS))
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#define R15PC (state->Reg[15] & R15PCBITS)
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#define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
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#define R15MODE (state->Reg[15] & R15MODEBITS)
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// Different ways to start the next instruction.
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enum {
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SEQ = 0,
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NONSEQ = 1,
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PCINCEDSEQ = 2,
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PCINCEDNONSEQ = 3,
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PRIMEPIPE = 4,
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RESUME = 8
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};
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// Values for Emulate.
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enum {
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STOP = 0, // Stop
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CHANGEMODE = 1, // Change mode
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ONCE = 2, // Execute just one interation
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RUN = 3 // Continuous execution
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};
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#define FLUSHPIPE state->NextInstr |= PRIMEPIPE
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// Macro to rotate n right by b bits.
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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// Stuff that is shared across modes.
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extern unsigned ARMul_MultTable[]; // Number of I cycles for a mult.
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extern ARMword ARMul_ImmedTable[]; // Immediate DP LHS values.
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extern char ARMul_BitList[]; // Number of bits in a byte table.
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// Coprocessor support functions.
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extern void ARMul_CoProInit(ARMul_State*);
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extern void ARMul_CoProExit(ARMul_State*);
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extern void ARMul_CoProAttach(ARMul_State*, unsigned, ARMul_CPInits*,
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ARMul_CPExits*, ARMul_LDCs*, ARMul_STCs*,
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ARMul_MRCs*, ARMul_MCRs*, ARMul_MRRCs*, ARMul_MCRRs*,
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ARMul_CDPs*, ARMul_CPReads*, ARMul_CPWrites*);
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extern void ARMul_CoProDetach(ARMul_State*, unsigned);
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