mirror of
https://vps.suchmeme.nl/git/mudkip/Lockpick_RCM.git
synced 2024-11-13 12:55:08 +01:00
Remove "Os" pragmas, merge hekate changes
This commit is contained in:
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eee656bb34
commit
76a13c85fa
@ -40,9 +40,6 @@
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#include "diskio.h" /* Declarations of device I/O functions */
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#include "diskio.h" /* Declarations of device I/O functions */
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#include "../../gfx/gfx.h"
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#include "../../gfx/gfx.h"
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#pragma GCC push_options
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#pragma GCC target ("thumb")
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#define EFSPRINTF(text, ...) print_error(); gfx_printf("%k"text"%k\n", 0xFFFFFF00, 0xFFFFFFFF);
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#define EFSPRINTF(text, ...) print_error(); gfx_printf("%k"text"%k\n", 0xFFFFFF00, 0xFFFFFFFF);
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//#define EFSPRINTF(...)
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//#define EFSPRINTF(...)
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@ -6650,5 +6647,3 @@ FRESULT f_setcp (
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return FR_OK;
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return FR_OK;
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}
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}
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#endif /* FF_CODE_PAGE == 0 */
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#endif /* FF_CODE_PAGE == 0 */
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#pragma GCC pop_options
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@ -97,7 +97,7 @@
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*/
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*/
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#define FF_USE_LFN 1
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#define FF_USE_LFN 3
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#define FF_MAX_LFN 255
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#define FF_MAX_LFN 255
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/* The FF_USE_LFN switches the support for LFN (long file name).
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/* The FF_USE_LFN switches the support for LFN (long file name).
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/
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/
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@ -43,9 +43,6 @@
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#define MAX17050_VMAX_TOLERANCE 50 /* 50 mV */
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#define MAX17050_VMAX_TOLERANCE 50 /* 50 mV */
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#pragma GCC push_options
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#pragma GCC optimize ("Os")
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int max17050_get_property(enum MAX17050_reg reg, int *value)
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int max17050_get_property(enum MAX17050_reg reg, int *value)
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{
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{
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u16 data;
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u16 data;
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@ -267,5 +264,3 @@ int max17050_fix_configuration()
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return 0;
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return 0;
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}
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}
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#pragma GCC pop_options
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@ -37,12 +37,31 @@
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#define FUSE_WRITE_ACCESS_SW 0x30
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#define FUSE_WRITE_ACCESS_SW 0x30
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#define FUSE_PWR_GOOD_SW 0x34
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#define FUSE_PWR_GOOD_SW 0x34
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#define FUSE_SKU_INFO 0x110
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#define FUSE_SKU_INFO 0x110
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#define FUSE_CPU_SPEEDO_0_CALIB 0x114
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#define FUSE_CPU_IDDQ_CALIB 0x118
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#define FUSE_OPT_FT_REV 0x128
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#define FUSE_CPU_SPEEDO_1_CALIB 0x12C
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#define FUSE_CPU_SPEEDO_2_CALIB 0x130
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#define FUSE_SOC_SPEEDO_0_CALIB 0x134
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#define FUSE_SOC_SPEEDO_1_CALIB 0x138
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#define FUSE_SOC_SPEEDO_2_CALIB 0x13C
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#define FUSE_SOC_IDDQ_CALIB 0x140
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#define FUSE_OPT_CP_REV 0x190
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#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19c
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#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19c
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#define FUSE_PRIVATE_KEY0 0x1A4
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#define FUSE_PRIVATE_KEY0 0x1A4
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#define FUSE_PRIVATE_KEY1 0x1A8
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#define FUSE_PRIVATE_KEY1 0x1A8
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#define FUSE_PRIVATE_KEY2 0x1AC
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#define FUSE_PRIVATE_KEY2 0x1AC
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#define FUSE_PRIVATE_KEY3 0x1B0
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#define FUSE_PRIVATE_KEY3 0x1B0
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#define FUSE_PRIVATE_KEY4 0x1B4
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#define FUSE_RESERVED_SW 0x1C0
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#define FUSE_RESERVED_SW 0x1C0
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#define FUSE_OPT_VENDOR_CODE 0x200
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#define FUSE_OPT_FAB_CODE 0x204
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#define FUSE_OPT_LOT_CODE_0 0x208
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#define FUSE_OPT_LOT_CODE_1 0x20C
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#define FUSE_OPT_WAFER_ID 0x210
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#define FUSE_OPT_X_COORDINATE 0x214
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#define FUSE_OPT_Y_COORDINATE 0x218
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#define FUSE_GPU_IDDQ_CALIB 0x228
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/*! Fuse commands. */
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/*! Fuse commands. */
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#define FUSE_READ 0x1
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#define FUSE_READ 0x1
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@ -18,9 +18,6 @@
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#include "../soc/clock.h"
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#include "../soc/clock.h"
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#include "../soc/t210.h"
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#include "../soc/t210.h"
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#pragma GCC push_options
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#pragma GCC optimize ("Os")
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int kfuse_read(u32 *buf)
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int kfuse_read(u32 *buf)
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{
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{
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int res = 0;
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int res = 0;
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@ -57,5 +54,3 @@ int kfuse_wait_ready()
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return 1;
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return 1;
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}
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}
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#pragma GCC pop_options
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@ -32,10 +32,6 @@
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//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
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//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
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#define DPRINTF(...)
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#define DPRINTF(...)
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#pragma GCC push_options
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#pragma GCC target ("thumb")
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#pragma GCC optimize ("Os")
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/*! SCMMC controller base addresses. */
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/*! SCMMC controller base addresses. */
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static const u32 _sdmmc_bases[4] = {
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static const u32 _sdmmc_bases[4] = {
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0x700B0000,
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0x700B0000,
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@ -81,7 +77,7 @@ static int _sdmmc_set_voltage(sdmmc_t *sdmmc, u32 power)
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{
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{
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pwr |= TEGRA_MMC_PWRCTL_SD_BUS_POWER;
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pwr |= TEGRA_MMC_PWRCTL_SD_BUS_POWER;
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sdmmc->regs->pwrcon = pwr;
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sdmmc->regs->pwrcon = pwr;
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}
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}
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return 1;
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return 1;
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}
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}
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@ -389,7 +385,7 @@ int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type)
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static void _sdmmc_reset(sdmmc_t *sdmmc)
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static void _sdmmc_reset(sdmmc_t *sdmmc)
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{
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{
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sdmmc->regs->swrst |=
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sdmmc->regs->swrst |=
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TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE | TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE;
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TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE | TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE;
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_sdmmc_get_clkcon(sdmmc);
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_sdmmc_get_clkcon(sdmmc);
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u32 timeout = get_tmr_ms() + 2000;
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u32 timeout = get_tmr_ms() + 2000;
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@ -460,7 +456,7 @@ static int _sdmmc_setup_read_small_block(sdmmc_t *sdmmc)
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static int _sdmmc_parse_cmdbuf(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present)
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static int _sdmmc_parse_cmdbuf(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present)
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{
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{
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u16 cmdflags = 0;
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u16 cmdflags = 0;
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switch (cmd->rsp_type)
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switch (cmd->rsp_type)
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{
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{
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case SDMMC_RSP_TYPE_0:
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case SDMMC_RSP_TYPE_0:
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@ -726,7 +722,7 @@ static int _sdmmc_check_mask_interrupt(sdmmc_t *sdmmc, u16 *pout, u16 mask)
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sdmmc->regs->norintsts = norintsts & mask;
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sdmmc->regs->norintsts = norintsts & mask;
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return SDMMC_MASKINT_MASKED;
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return SDMMC_MASKINT_MASKED;
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}
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}
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return SDMMC_MASKINT_NOERROR;
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return SDMMC_MASKINT_NOERROR;
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}
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}
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@ -771,7 +767,7 @@ static int _sdmmc_stop_transmission_inner(sdmmc_t *sdmmc, u32 *rsp)
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if (!res)
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if (!res)
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return 0;
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return 0;
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_sdmmc_cache_rsp(sdmmc, rsp, 4, SDMMC_RSP_TYPE_1);
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_sdmmc_cache_rsp(sdmmc, rsp, 4, SDMMC_RSP_TYPE_1);
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return _sdmmc_wait_prnsts_type1(sdmmc);
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return _sdmmc_wait_prnsts_type1(sdmmc);
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@ -905,7 +901,7 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_
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_sdmmc_parse_cmdbuf(sdmmc, cmd, is_data_present);
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_sdmmc_parse_cmdbuf(sdmmc, cmd, is_data_present);
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int res = _sdmmc_wait_request(sdmmc);
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int res = _sdmmc_wait_request(sdmmc);
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DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", res,
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DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", res,
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sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3);
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sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3);
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if (res)
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if (res)
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{
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{
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@ -947,7 +943,7 @@ static int _sdmmc_config_sdmmc1()
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gpio_output_enable(GPIO_PORT_Z, GPIO_PIN_1, GPIO_OUTPUT_DISABLE);
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gpio_output_enable(GPIO_PORT_Z, GPIO_PIN_1, GPIO_OUTPUT_DISABLE);
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usleep(100);
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usleep(100);
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// Check if SD card is inserted.
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// Check if SD card is inserted.
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if(!!gpio_read(GPIO_PORT_Z, GPIO_PIN_1))
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if(!!gpio_read(GPIO_PORT_Z, GPIO_PIN_1))
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return 0;
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return 0;
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@ -1059,7 +1055,7 @@ void sdmmc_end(sdmmc_t *sdmmc)
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if (!sdmmc->clock_stopped)
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if (!sdmmc->clock_stopped)
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{
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{
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_sdmmc_sd_clock_disable(sdmmc);
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_sdmmc_sd_clock_disable(sdmmc);
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// Disable SDMMC power.
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// Disable SDMMC power.
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_OFF);
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_OFF);
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// Disable SD card power.
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// Disable SD card power.
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@ -1138,7 +1134,7 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_1_8);
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_1_8);
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_sdmmc_get_clkcon(sdmmc);
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_sdmmc_get_clkcon(sdmmc);
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msleep(5);
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msleep(5);
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if (sdmmc->regs->hostctl2 & SDHCI_CTRL_VDD_180)
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if (sdmmc->regs->hostctl2 & SDHCI_CTRL_VDD_180)
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{
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{
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sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
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sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
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@ -1150,5 +1146,3 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
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return 0;
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return 0;
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}
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}
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#pragma GCC pop_options
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