Implement generic SR patching and generic sCheckDataRange replacement

This commit is contained in:
Maschell 2022-04-29 00:35:14 +02:00
parent 9a6b924aeb
commit 93fb8f7d84
2 changed files with 10 additions and 5 deletions

View File

@ -11,7 +11,7 @@ DECL_FUNCTION(uint32_t, KiEffectiveToPhysical, uint32_t addressSpace, uint32_t v
} }
DECL_FUNCTION(int32_t, sCheckDataRange, uint32_t address, uint32_t maxDataSize) { DECL_FUNCTION(int32_t, sCheckDataRange, uint32_t address, uint32_t maxDataSize) {
if ((address & 0xF0000000) == 0x80000000) { if ((address & 0xF0000000) == (MEMORY_START_BASE & 0xF0000000)) {
return 1; return 1;
} }

View File

@ -26,10 +26,15 @@ void runOnAllCores(CThread::Callback callback, void *callbackArg, int32_t iAttr
void writeKernelNOPs(CThread *thread, void *arg) { void writeKernelNOPs(CThread *thread, void *arg) {
DEBUG_FUNCTION_LINE_VERBOSE("Writing kernel NOPs on core %d", OSGetThreadAffinity(OSGetCurrentThread()) / 2); DEBUG_FUNCTION_LINE_VERBOSE("Writing kernel NOPs on core %d", OSGetThreadAffinity(OSGetCurrentThread()) / 2);
// Patch out any writes to SR8 // Patch out any writes to SR
KernelNOPAtPhysicalAddress(0xFFF1D754); int sr = MEMORY_START_BASE >> 28;
KernelNOPAtPhysicalAddress(0xFFF1D64C); KernelNOPAtPhysicalAddress(0xfff1d734 + 0x4 * sr);
KernelNOPAtPhysicalAddress(0xFFE00638); if (sr < 7) {
KernelNOPAtPhysicalAddress(0xfff1d604 + 0x4 * sr);
} else {
KernelNOPAtPhysicalAddress(0xfff1d648 + 0x4 * (sr - 7));
}
KernelNOPAtPhysicalAddress(0xffe00618 + 0x4 * sr);
// nop out branches to app panic 0x17 // nop out branches to app panic 0x17
KernelNOPAtPhysicalAddress(0xfff01db0); KernelNOPAtPhysicalAddress(0xfff01db0);