Boot improvements

This commit is contained in:
Mateusz Faderewski 2023-08-27 18:52:03 +02:00
parent 5cdda70c69
commit be1b3b1ab3
3 changed files with 48 additions and 10 deletions

View File

@ -93,7 +93,7 @@ void boot (boot_params_t *params) {
while (cpu_io_read(&SP->DMA_BUSY)); while (cpu_io_read(&SP->DMA_BUSY));
cpu_io_write(&PI->SR, PI_SR_CLR_INTR | PI_SR_RESET); cpu_io_write(&PI->SR, PI_SR_CLR_INTR | PI_SR_RESET);
while (cpu_io_read(&VI->CURR_LINE) != 2); while ((cpu_io_read(&VI->CURR_LINE) & ~(VI_CURR_LINE_FIELD)) != 0);
cpu_io_write(&VI->V_INTR, 0x3FF); cpu_io_write(&VI->V_INTR, 0x3FF);
cpu_io_write(&VI->H_LIMITS, 0); cpu_io_write(&VI->H_LIMITS, 0);
cpu_io_write(&VI->CURR_LINE, 0); cpu_io_write(&VI->CURR_LINE, 0);

View File

@ -157,6 +157,8 @@ typedef struct {
#define VI_CR_PIXEL_ADVANCE_3 (1 << 15) #define VI_CR_PIXEL_ADVANCE_3 (1 << 15)
#define VI_CR_DITHER_FILTER_ON (1 << 16) #define VI_CR_DITHER_FILTER_ON (1 << 16)
#define VI_CURR_LINE_FIELD (1 << 0)
typedef struct { typedef struct {
io32_t MADDR; io32_t MADDR;

View File

@ -7,14 +7,15 @@
#define RI_REFRESH 0x10 #define RI_REFRESH 0x10
#define RI_LATENCY 0x14 #define RI_LATENCY 0x14
#define RI_MODE_RESET 0x0000000C #define RI_MODE_RESET 0x00000000
#define RI_MODE_STANDBY 0x0000000E #define RI_MODE_STANDBY 0x0000000E
#define RDRAM_RESET_DELAY 1024 #define RDRAM_RESET_DELAY 1024
#define RDRAM_STANDBY_DELAY 512
#define IPL3_ENTRY 0xA4000040 #define IPL3_ENTRY 0xA4000040
.set noat
.section .text.reboot, "ax", %progbits .section .text.reboot, "ax", %progbits
.type reboot, %object .type reboot, %object
reboot_start: reboot_start:
@ -22,7 +23,6 @@ reboot_start:
# NOTE: CIC x105 requirement # NOTE: CIC x105 requirement
ipl2: ipl2:
.set noat
.set noreorder .set noreorder
lui $t5, 0xBFC0 lui $t5, 0xBFC0
1: 1:
@ -34,30 +34,66 @@ ipl2:
lw $t0, 0x24($t5) lw $t0, 0x24($t5)
lui $t3, 0xB000 lui $t3, 0xB000
.set reorder .set reorder
.set at
reboot_entry: reboot_entry:
.equ reboot_entry_offset, ((. - reboot_start) / 4) .equ reboot_entry_offset, ((. - reboot_start) / 4)
.global reboot_entry_offset .global reboot_entry_offset
bnez $s5, reset_rdram_skip
reset_rdram: reset_rdram:
li $t0, RI_ADDRESS li $t0, RI_ADDRESS
li $t1, RI_MODE_RESET li $t1, RI_MODE_RESET
sw $t1, RI_MODE($t0) sw $t1, RI_MODE($t0)
li $t2, RDRAM_RESET_DELAY
1:
addiu $t2, (-1)
bnez $t2, 1b
sw $zero, RI_CONFIG($t0) sw $zero, RI_CONFIG($t0)
sw $zero, RI_CURRENT_LOAD($t0) sw $zero, RI_CURRENT_LOAD($t0)
sw $zero, RI_SELECT($t0) sw $zero, RI_SELECT($t0)
sw $zero, RI_REFRESH($t0) sw $zero, RI_REFRESH($t0)
li $t2, RDRAM_RESET_DELAY
delay:
addiu $t2, $t2, (-1)
bnez $t2, delay
li $t1, RI_MODE_STANDBY li $t1, RI_MODE_STANDBY
sw $t1, RI_MODE($t0) sw $t1, RI_MODE($t0)
li $t2, RDRAM_STANDBY_DELAY
1:
addiu $t2, (-1)
bnez $t2, 1b
reset_rdram_skip:
move $at, $zero
move $v0, $zero
move $v1, $zero
move $a0, $zero
move $a1, $zero
move $a2, $zero
move $a3, $zero
move $t0, $zero
move $t1, $zero
move $t2, $zero
move $t3, $zero
move $t4, $zero
move $t5, $zero
move $t6, $zero
move $t7, $zero
move $s0, $zero
move $s1, $zero
move $s2, $zero
move $t8, $zero
move $t9, $zero
move $k0, $zero
move $k1, $zero
move $gp, $zero
move $s8, $zero
move $ra, $zero
mtc0 $zero, $9
run_ipl3: run_ipl3:
li $t3, IPL3_ENTRY li $t3, IPL3_ENTRY
jr $t3 jr $t3