mirror of
https://github.com/Polprzewodnikowy/N64FlashcartMenu.git
synced 2024-11-25 03:56:54 +01:00
Merge pull request #8 from ariahiro64/ed64-basic
ED64P Saves and virtual writeback
This commit is contained in:
commit
d6534bdd0e
1
Makefile
1
Makefile
@ -24,6 +24,7 @@ SRCS = \
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flashcart/sc64/sc64_ll.c \
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flashcart/sc64/sc64.c \
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flashcart/ed64/ed64_ll.c \
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flashcart/ed64/ed64_state.c \
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flashcart/ed64/ed64.c \
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libs/libspng/spng/spng.c \
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libs/mini.c/src/mini.c \
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@ -4,6 +4,7 @@
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#include <fatfs/ff.h>
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#include <libdragon.h>
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#include <libcart/cart.h>
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#include "utils/fs.h"
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#include "utils/utils.h"
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@ -11,17 +12,12 @@
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#include "../flashcart_utils.h"
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#include "ed64_ll.h"
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#include "ed64.h"
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#include "ed64_state.h"
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// #include "../menu/settings.h"
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static ed64_pseudo_writeback_t current_state;
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// // This is a trial hack before using the settings API.
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// #ifndef LAST_ROM_FILE_PATH
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// #define LAST_ROM_FILE_PATH "/ed64/last_rom.txt"
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// #endif
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extern int ed_exit(void);
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extern int ed_exit (void);
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static flashcart_err_t ed64_init (void) {
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@ -30,27 +26,64 @@ static flashcart_err_t ed64_init (void) {
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// FIXME: Update firmware if needed.
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// FIXME: Enable RTC if available.
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// FIXME: Retrive a config file from the SD card that might have been set.
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// This should include the location of the ROM and its save type.
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// Then, if it is valid, perform a save.
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// FIL lrp_fil;
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// UINT lrp_br;
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// older everdrives cannot save during gameplay so we need to the reset method.
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// works by checking if a file exists.
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// if (f_open(&lrp_fil, LAST_ROM_PATH_FILE, FA_READ) != FR_OK) {
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// return FLASHCART_ERR_LOAD;
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// }
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ed64_state_load(¤t_state);
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// if (f_read(&lrp_fil, lrp_path, 1024, &lrp_br) != FR_OK) {
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// f_close(&lrp_fil);
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// return FLASHCART_ERR_LOAD;
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// }
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if (current_state.is_expecting_save_writeback == true) {
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// if (f_close(&lrp_fil) != FR_OK) {
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// return FLASHCART_ERR_LOAD;
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// }
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// make sure next boot doesnt trigger the check changing its state.
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current_state.is_expecting_save_writeback = false;
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ed64_state_save(¤t_state);
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// Now save the content back to the SD!
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// Now save the content back to the SD card!
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FIL fil;
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UINT bw;
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uint8_t cartsave_data[KiB(128)];
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// find the path to last save
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if (file_exists(strip_sd_prefix(current_state.last_save_path))) {
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int save_size = file_get_size(strip_sd_prefix(current_state.last_save_path));
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if ((f_open(&fil, strip_sd_prefix(current_state.last_save_path), FA_CREATE_ALWAYS | FA_READ | FA_WRITE)) != FR_OK) {
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return FLASHCART_ERR_LOAD;
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}
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// everdrive doesn't care about the save type other than flash sram and eeprom
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// so minus flashram we can just check the size
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if (current_state.is_fram_save_type == true) { // flashram is bugged atm
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ed64_ll_get_fram(cartsave_data, save_size);
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// deletes flag
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current_state.is_fram_save_type = false;
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ed64_state_save(¤t_state);
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}
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else if (save_size > KiB(32)) { // sram 128
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ed64_ll_get_sram(cartsave_data, save_size);
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}
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else if (save_size > KiB(2)) { // sram
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ed64_ll_get_sram(cartsave_data, save_size);
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}
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else { // eeprom
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ed64_ll_get_eeprom(cartsave_data, save_size);
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}
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if (f_write(&fil, cartsave_data, save_size, &bw) != FR_OK) {
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return FLASHCART_ERR_LOAD;
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}
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if (f_close(&fil) != FR_OK) {
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return FLASHCART_ERR_LOAD;
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}
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}
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else {
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current_state.is_expecting_save_writeback = false;
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current_state.is_fram_save_type = false;
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current_state.last_save_path = "";
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ed64_state_save(¤t_state);
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}
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}
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return FLASHCART_OK;
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}
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@ -64,12 +97,15 @@ static flashcart_err_t ed64_deinit (void) {
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static bool ed64_has_feature (flashcart_features_t feature) {
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switch (feature) {
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case FLASHCART_FEATURE_64DD: return false;
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default: return false;
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case FLASHCART_FEATURE_64DD:
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return false;
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default:
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return false;
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}
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}
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static flashcart_err_t ed64_load_rom (char *rom_path, flashcart_progress_callback_t *progress) {
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FIL fil;
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UINT br;
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@ -83,58 +119,54 @@ static flashcart_err_t ed64_load_rom (char *rom_path, flashcart_progress_callbac
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// FIXME: if the cart is not V3 or X5 or X7, we need probably need to - 128KiB for save compatibility.
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// Or somehow warn that certain ROM's will have corruption due to the address space being used for saves.
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// Conker's Bad Fur Day doesn't have this issue because eeprom data is at a fixed address in pif ram.
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if (rom_size > MiB(64)) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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if (rom_size == MiB(64)) {
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ed64_save_type_t type = ed64_ll_get_save_type();
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switch (type) {
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case SAVE_TYPE_SRAM:
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rom_size -= KiB(32) - KiB(16);
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case SAVE_TYPE_SRAM_128K:
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case SAVE_TYPE_FLASHRAM:
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rom_size -= KiB(128) - KiB(16);
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break;
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default:
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break;
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}
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}
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size_t sdram_size = rom_size;
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size_t chunk_size = MiB(1);
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for (int offset = 0; offset < sdram_size; offset += chunk_size) {
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for (int offset = 0; offset < sdram_size; offset += chunk_size)
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{
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size_t block_size = MIN(sdram_size - offset, chunk_size);
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if (f_read(&fil, (void *) (ROM_ADDRESS + offset), block_size, &br) != FR_OK) {
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if (f_read(&fil, (void *)(ROM_ADDRESS + offset), block_size, &br) != FR_OK) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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if (progress) {
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progress(f_tell(&fil) / (float) (f_size(&fil)));
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progress(f_tell(&fil) / (float)(f_size(&fil)));
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}
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}
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if (f_tell(&fil) != sdram_size) {
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/*if (f_tell(&fil) != sdram_size) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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}*/
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if (f_close(&fil) != FR_OK) {
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return FLASHCART_ERR_LOAD;
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}
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// Set the required actions for retriving the save file later.
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// Given there is no good place in RAM...
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// This would involve creating some content to a file on the SD card that includes:
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// the ROM name and location and possibly its save type. This information will be used on init to perform a "save writeback".
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// Actually, we should be using the settings API, so this is just a trial hack.
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// FIL lrp_fil;
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// UINT lrp_bw;
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// if (f_open(&lrp_fil, LAST_ROM_FILE_PATH, FA_CREATE_ALWAYS) != FR_OK) {
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// return FLASHCART_ERR_LOAD;
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// }
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// if (f_write(&lrp_fil, rom_path, strlen(rom_path) + 1, &lrp_bw) != FR_OK) {
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// f_close(&lrp_fil);
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// return FLASHCART_ERR_LOAD;
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// }
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// if (f_close(&lrp_fil) != FR_OK) {
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// return FLASHCART_ERR_LOAD;
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// }
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return FLASHCART_OK;
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}
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static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uint32_t file_offset) {
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static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uint32_t file_offset)
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{
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FIL fil;
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UINT br;
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@ -148,6 +180,7 @@ static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uin
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// FIXME: if the cart is not V3 or X5 or X7, we need probably need to - 128KiB for save compatibility.
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// Or somehow warn that certain ROM's will have corruption due to the address space being used for saves.
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if (file_size > (MiB(64) - rom_offset)) {
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f_close(&fil);
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return FLASHCART_ERR_ARGS;
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@ -158,7 +191,7 @@ static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uin
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return FLASHCART_ERR_LOAD;
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}
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if (f_read(&fil, (void *) (ROM_ADDRESS + rom_offset), file_size, &br) != FR_OK) {
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if (f_read(&fil, (void *)(ROM_ADDRESS + rom_offset), file_size, &br) != FR_OK) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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@ -175,32 +208,19 @@ static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uin
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}
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static flashcart_err_t ed64_load_save (char *save_path) {
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void *address = NULL;
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ed64_save_type_t type = ed64_ll_get_save_type();
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switch (type) {
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case SAVE_TYPE_EEPROM_4K:
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case SAVE_TYPE_EEPROM_16K:
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case SAVE_TYPE_SRAM:
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case SAVE_TYPE_SRAM_128K:
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case SAVE_TYPE_FLASHRAM:
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address = (void *) (SRAM_ADDRESS);
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break;
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case SAVE_TYPE_NONE:
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default:
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return FLASHCART_ERR_ARGS;
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}
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FIL fil;
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UINT br;
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if (f_open(&fil, strip_sd_prefix(save_path), FA_READ) != FR_OK) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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size_t save_size = f_size(&fil);
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size_t save_size = file_get_size(strip_sd_prefix(save_path));
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uint8_t cartsave_data[save_size];
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if (f_read(&fil, address, save_size, &br) != FR_OK) {
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if (f_read(&fil, cartsave_data, save_size, &br) != FR_OK) {
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f_close(&fil);
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return FLASHCART_ERR_LOAD;
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}
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@ -209,10 +229,35 @@ static flashcart_err_t ed64_load_save (char *save_path) {
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return FLASHCART_ERR_LOAD;
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}
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if (br != save_size) {
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return FLASHCART_ERR_LOAD;
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current_state.is_fram_save_type = false;
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ed64_save_type_t type = ed64_ll_get_save_type();
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switch (type) {
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case SAVE_TYPE_EEPROM_4K:
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case SAVE_TYPE_EEPROM_16K:
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ed64_ll_set_eeprom(cartsave_data, save_size);
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break;
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case SAVE_TYPE_SRAM:
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ed64_ll_set_sram(cartsave_data, save_size);
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case SAVE_TYPE_SRAM_128K:
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ed64_ll_set_sram_128(cartsave_data, KiB(128));
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break;
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case SAVE_TYPE_FLASHRAM:
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ed64_ll_set_fram(cartsave_data, KiB(128));
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// a cold and warm boot has no way of seeing save types and most types can be determined by size
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// this tells the cart to use flash instead of sram 128 since they are the same size
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current_state.is_fram_save_type = true;
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ed64_state_save(¤t_state);
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break;
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default:
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break;
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}
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current_state.last_save_path = save_path;
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current_state.is_expecting_save_writeback = true;
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ed64_state_save(¤t_state);
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return FLASHCART_OK;
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}
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@ -220,28 +265,28 @@ static flashcart_err_t ed64_set_save_type (flashcart_save_type_t save_type) {
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ed64_save_type_t type;
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switch (save_type) {
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case FLASHCART_SAVE_TYPE_NONE:
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type = SAVE_TYPE_NONE;
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break;
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case FLASHCART_SAVE_TYPE_EEPROM_4K:
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type = SAVE_TYPE_EEPROM_4K;
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break;
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case FLASHCART_SAVE_TYPE_EEPROM_16K:
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type = SAVE_TYPE_EEPROM_16K;
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break;
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case FLASHCART_SAVE_TYPE_SRAM:
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type = SAVE_TYPE_SRAM;
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break;
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case FLASHCART_SAVE_TYPE_SRAM_BANKED:
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case FLASHCART_SAVE_TYPE_SRAM_128K:
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type = SAVE_TYPE_SRAM_128K;
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break;
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case FLASHCART_SAVE_TYPE_FLASHRAM_PKST2:
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case FLASHCART_SAVE_TYPE_FLASHRAM:
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type = SAVE_TYPE_FLASHRAM;
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break;
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default:
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return FLASHCART_ERR_ARGS;
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case FLASHCART_SAVE_TYPE_NONE:
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type = SAVE_TYPE_NONE;
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break;
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case FLASHCART_SAVE_TYPE_EEPROM_4K:
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type = SAVE_TYPE_EEPROM_4K;
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break;
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case FLASHCART_SAVE_TYPE_EEPROM_16K:
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type = SAVE_TYPE_EEPROM_16K;
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break;
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case FLASHCART_SAVE_TYPE_SRAM:
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type = SAVE_TYPE_SRAM;
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break;
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case FLASHCART_SAVE_TYPE_SRAM_BANKED:
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case FLASHCART_SAVE_TYPE_SRAM_128K:
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type = SAVE_TYPE_SRAM_128K;
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break;
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case FLASHCART_SAVE_TYPE_FLASHRAM_PKST2:
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case FLASHCART_SAVE_TYPE_FLASHRAM:
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type = SAVE_TYPE_FLASHRAM;
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break;
|
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default:
|
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return FLASHCART_ERR_ARGS;
|
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}
|
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|
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ed64_ll_set_save_type(type);
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@ -249,7 +294,6 @@ static flashcart_err_t ed64_set_save_type (flashcart_save_type_t save_type) {
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return FLASHCART_OK;
|
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}
|
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|
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|
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static flashcart_t flashcart_ed64 = {
|
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.init = ed64_init,
|
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.deinit = ed64_deinit,
|
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@ -263,7 +307,6 @@ static flashcart_t flashcart_ed64 = {
|
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.set_save_writeback = NULL,
|
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};
|
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|
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|
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flashcart_t *ed64_get_flashcart (void) {
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return &flashcart_ed64;
|
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}
|
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|
@ -1,8 +1,10 @@
|
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#include <malloc.h>
|
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#include <libdragon.h>
|
||||
|
||||
#include "utils/utils.h"
|
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#include "ed64_ll.h"
|
||||
|
||||
|
||||
|
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/* ED64 configuration registers base address */
|
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#define ED64_CONFIG_REGS_BASE (0xA8040000)
|
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|
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@ -23,6 +25,16 @@ typedef enum {
|
||||
|
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} ed64_registers_t;
|
||||
|
||||
void pi_initialize (void);
|
||||
void pi_initialize_sram (void);
|
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void pi_dma_from_cart (void* dest, void* src, unsigned long size);
|
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void pi_dma_to_cart (void* dest, void* src, unsigned long size);
|
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void pi_dma_from_sram (void *dest, unsigned long offset, unsigned long size);
|
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void pi_dma_to_sram (void* src, unsigned long offset, unsigned long size);
|
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void pi_dma_from_cart_safe (void *dest, void *src, unsigned long size);
|
||||
|
||||
void ed64_ll_set_sdcard_timing (void);
|
||||
|
||||
|
||||
#define SAV_EEP_ON 1
|
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#define SAV_SRM_ON 2
|
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@ -32,20 +44,21 @@ typedef enum {
|
||||
#define SAV_RAM_BANK 128
|
||||
#define SAV_RAM_BANK_APPLY 32768
|
||||
|
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uint32_t ed64_ll_reg_read(uint32_t reg);
|
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void ed64_ll_reg_write(uint32_t reg, uint32_t data);
|
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uint32_t ed64_ll_reg_read (uint32_t reg);
|
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void ed64_ll_reg_write (uint32_t reg, uint32_t data);
|
||||
|
||||
uint8_t ed64_ll_sram_bank;
|
||||
ed64_save_type_t ed64_ll_save_type;
|
||||
|
||||
|
||||
uint32_t ed64_ll_reg_read(uint32_t reg) {
|
||||
uint32_t ed64_ll_reg_read (uint32_t reg) {
|
||||
|
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*(volatile uint32_t *) (ED64_CONFIG_REGS_BASE);
|
||||
return *(volatile uint32_t *) (ED64_CONFIG_REGS_BASE + reg * 4);
|
||||
|
||||
}
|
||||
|
||||
void ed64_ll_reg_write(uint32_t reg, uint32_t data) {
|
||||
void ed64_ll_reg_write (uint32_t reg, uint32_t data) {
|
||||
|
||||
*(volatile uint32_t *) (ED64_CONFIG_REGS_BASE);
|
||||
*(volatile uint32_t *) (ED64_CONFIG_REGS_BASE + reg * 4) = data;
|
||||
@ -54,12 +67,13 @@ void ed64_ll_reg_write(uint32_t reg, uint32_t data) {
|
||||
}
|
||||
|
||||
|
||||
ed64_save_type_t ed64_ll_get_save_type() {
|
||||
ed64_save_type_t ed64_ll_get_save_type (void) {
|
||||
|
||||
return ed64_ll_save_type;
|
||||
|
||||
}
|
||||
|
||||
void ed64_ll_set_save_type(ed64_save_type_t type) {
|
||||
void ed64_ll_set_save_type (ed64_save_type_t type) {
|
||||
|
||||
uint16_t save_cfg;
|
||||
uint8_t eeprom_on, sram_on, eeprom_size, sram_size, ram_bank;
|
||||
@ -97,7 +111,6 @@ void ed64_ll_set_save_type(ed64_save_type_t type) {
|
||||
break;
|
||||
}
|
||||
|
||||
save_cfg = 0;
|
||||
if (eeprom_on)save_cfg |= SAV_EEP_ON;
|
||||
if (sram_on)save_cfg |= SAV_SRM_ON;
|
||||
if (eeprom_size)save_cfg |= SAV_EEP_SIZE;
|
||||
@ -109,8 +122,284 @@ void ed64_ll_set_save_type(ed64_save_type_t type) {
|
||||
|
||||
}
|
||||
|
||||
void ed64_ll_set_sram_bank(uint8_t bank) {
|
||||
void ed64_ll_set_sram_bank (uint8_t bank) {
|
||||
|
||||
ed64_ll_sram_bank = bank == 0 ? 0 : 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
void pi_initialize (void) {
|
||||
|
||||
dma_wait();
|
||||
io_write(PI_STATUS_REG, 0x03);
|
||||
|
||||
}
|
||||
|
||||
// Inits PI for sram transfer
|
||||
void pi_initialize_sram (void) {
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x05);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x0C);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x0D);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x02);
|
||||
|
||||
}
|
||||
|
||||
void pi_dma_from_sram (void *dest, unsigned long offset, unsigned long size) {
|
||||
|
||||
io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(dest));
|
||||
io_write(PI_CART_ADDR_REG, (0xA8000000 + offset));
|
||||
asm volatile ("" : : : "memory");
|
||||
io_write(PI_WR_LEN_REG, (size - 1));
|
||||
asm volatile ("" : : : "memory");
|
||||
|
||||
}
|
||||
|
||||
|
||||
void pi_dma_to_sram (void *src, unsigned long offset, unsigned long size) {
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_STATUS_REG, 2);
|
||||
io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(src));
|
||||
io_write(PI_CART_ADDR_REG, (0xA8000000 + offset));
|
||||
io_write(PI_RD_LEN_REG, (size - 1));
|
||||
|
||||
}
|
||||
|
||||
void pi_dma_from_cart (void* dest, void* src, unsigned long size) {
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_STATUS_REG, 0x03);
|
||||
io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(dest));
|
||||
io_write(PI_CART_ADDR_REG, K0_TO_PHYS(src));
|
||||
io_write(PI_WR_LEN_REG, (size - 1));
|
||||
|
||||
}
|
||||
|
||||
|
||||
void pi_dma_to_cart (void* dest, void* src, unsigned long size) {
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_STATUS_REG, 0x02);
|
||||
io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(src));
|
||||
io_write(PI_CART_ADDR_REG, K0_TO_PHYS(dest));
|
||||
io_write(PI_RD_LEN_REG, (size - 1));
|
||||
|
||||
}
|
||||
|
||||
|
||||
// Wrapper to support unaligned access to memory
|
||||
void pi_dma_from_cart_safe (void *dest, void *src, unsigned long size) {
|
||||
|
||||
if (!dest || !src || !size) return;
|
||||
|
||||
unsigned long unalignedSrc = ((unsigned long)src) % 2;
|
||||
unsigned long unalignedDest = ((unsigned long)dest) % 8;
|
||||
|
||||
//FIXME: Do i really need to check if size is 16bit aligned?
|
||||
if (!unalignedDest && !unalignedSrc && !(size % 2)) {
|
||||
pi_dma_from_cart(dest, src, size);
|
||||
dma_wait();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
void* newSrc = (void*)(((unsigned long)src) - unalignedSrc);
|
||||
unsigned long newSize = (size + unalignedSrc) + ((size + unalignedSrc) % 2);
|
||||
|
||||
unsigned char *buffer = memalign(8, newSize);
|
||||
pi_dma_from_cart(buffer, newSrc, newSize);
|
||||
dma_wait();
|
||||
|
||||
memcpy(dest, (buffer + unalignedSrc), size);
|
||||
|
||||
free(buffer);
|
||||
|
||||
}
|
||||
|
||||
|
||||
int ed64_ll_get_sram_128 (uint8_t *buffer, int size) {
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x05);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x0C);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x0D);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x02);
|
||||
|
||||
dma_wait();
|
||||
|
||||
pi_initialize();
|
||||
|
||||
dma_wait();
|
||||
|
||||
pi_dma_from_sram(buffer, -(size - KiB(16)), size) ;
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x40);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x12);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x07);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x03);
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int ed64_ll_get_sram (uint8_t *buffer, int size) {
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x05);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x0C);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x0D);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x02);
|
||||
|
||||
dma_wait();
|
||||
|
||||
pi_initialize();
|
||||
|
||||
dma_wait();
|
||||
|
||||
pi_dma_from_sram(buffer, 0, size) ;
|
||||
|
||||
dma_wait();
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x40);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x12);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x07);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x03);
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
int ed64_ll_get_eeprom (uint8_t *buffer, int size) {
|
||||
|
||||
int blocks=size/8;
|
||||
for( int b = 0; b < blocks; b++ ) {
|
||||
eeprom_read( b, &buffer[b * 8] );
|
||||
}
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int ed64_ll_get_fram (uint8_t *buffer, int size) {
|
||||
|
||||
ed64_ll_set_save_type(SAVE_TYPE_SRAM_128K); //2
|
||||
dma_wait();
|
||||
|
||||
ed64_ll_get_sram_128(buffer, size);
|
||||
data_cache_hit_writeback_invalidate(buffer, size);
|
||||
|
||||
dma_wait();
|
||||
ed64_ll_set_save_type(SAVE_TYPE_FLASHRAM);
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
sram upload
|
||||
*/
|
||||
|
||||
|
||||
int ed64_ll_set_sram_128 (uint8_t *buffer, int size) {
|
||||
|
||||
//half working
|
||||
dma_wait();
|
||||
//Timing
|
||||
pi_initialize_sram();
|
||||
|
||||
//Readmode
|
||||
pi_initialize();
|
||||
|
||||
data_cache_hit_writeback_invalidate(buffer,size);
|
||||
dma_wait();
|
||||
|
||||
pi_dma_to_sram(buffer, -(size - KiB(16)), size);
|
||||
data_cache_hit_writeback_invalidate(buffer,size);
|
||||
|
||||
//Wait
|
||||
dma_wait();
|
||||
//Restore evd Timing
|
||||
ed64_ll_set_sdcard_timing();
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int ed64_ll_set_sram (uint8_t *buffer, int size) {
|
||||
|
||||
//half working
|
||||
dma_wait();
|
||||
//Timing
|
||||
pi_initialize_sram();
|
||||
|
||||
//Readmode
|
||||
pi_initialize();
|
||||
|
||||
data_cache_hit_writeback_invalidate(buffer,size);
|
||||
dma_wait();
|
||||
|
||||
pi_dma_to_sram(buffer, 0, size);
|
||||
data_cache_hit_writeback_invalidate(buffer,size);
|
||||
|
||||
//Wait
|
||||
dma_wait();
|
||||
//Restore evd Timing
|
||||
ed64_ll_set_sdcard_timing();
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int ed64_ll_set_eeprom (uint8_t *buffer, int size) {
|
||||
|
||||
int blocks=size/8;
|
||||
for( int b = 0; b < blocks; b++ ) {
|
||||
eeprom_write( b, &buffer[b * 8] );
|
||||
}
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
int ed64_ll_set_fram (uint8_t *buffer, int size) {
|
||||
|
||||
ed64_ll_set_save_type(SAVE_TYPE_SRAM_128K);
|
||||
dma_wait();
|
||||
|
||||
ed64_ll_set_sram_128(buffer, size);
|
||||
data_cache_hit_writeback_invalidate(buffer, size);
|
||||
|
||||
dma_wait();
|
||||
ed64_ll_set_save_type(SAVE_TYPE_FLASHRAM);
|
||||
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ed64_ll_set_sdcard_timing (void) {
|
||||
|
||||
io_write(PI_BSD_DOM1_LAT_REG, 0x40);
|
||||
io_write(PI_BSD_DOM1_PWD_REG, 0x12);
|
||||
io_write(PI_BSD_DOM1_PGS_REG, 0x07);
|
||||
io_write(PI_BSD_DOM1_RLS_REG, 0x03);
|
||||
|
||||
io_write(PI_BSD_DOM2_LAT_REG, 0x40);
|
||||
io_write(PI_BSD_DOM2_PWD_REG, 0x12);
|
||||
io_write(PI_BSD_DOM2_PGS_REG, 0x07);
|
||||
io_write(PI_BSD_DOM2_RLS_REG, 0x03);
|
||||
|
||||
}
|
||||
|
@ -7,11 +7,44 @@
|
||||
#ifndef FLASHCART_ED64_LL_H__
|
||||
#define FLASHCART_ED64_LL_H__
|
||||
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
// FIXME: redefined because its in a .c instead of a .h
|
||||
#define PI_BASE_REG 0x04600000
|
||||
///////////////////////////////////////////////////////
|
||||
|
||||
#define PIF_RAM_START 0x1FC007C0
|
||||
#define PI_STATUS_ERROR 0x04
|
||||
#define PI_STATUS_IO_BUSY 0x02
|
||||
#define PI_STATUS_DMA_BUSY 0x01
|
||||
|
||||
#define PI_STATUS_REG (PI_BASE_REG+0x10)
|
||||
#define PI_DRAM_ADDR_REG (PI_BASE_REG+0x00) /* DRAM address */
|
||||
#define PI_CART_ADDR_REG (PI_BASE_REG+0x04)
|
||||
#define PI_RD_LEN_REG (PI_BASE_REG+0x08)
|
||||
#define PI_WR_LEN_REG (PI_BASE_REG+0x0C)
|
||||
|
||||
// FIXME: redefined because its in a .c instead of a .h
|
||||
#define PI_BSD_DOM1_LAT_REG (PI_BASE_REG+0x14)
|
||||
#define PI_BSD_DOM1_PWD_REG (PI_BASE_REG+0x18)
|
||||
#define PI_BSD_DOM1_PGS_REG (PI_BASE_REG+0x1C)
|
||||
#define PI_BSD_DOM1_RLS_REG (PI_BASE_REG+0x20)
|
||||
#define PI_BSD_DOM2_LAT_REG (PI_BASE_REG+0x24)
|
||||
#define PI_BSD_DOM2_PWD_REG (PI_BASE_REG+0x28)
|
||||
#define PI_BSD_DOM2_PGS_REG (PI_BASE_REG+0x2C)
|
||||
#define PI_BSD_DOM2_RLS_REG (PI_BASE_REG+0x30)
|
||||
///////////////////////////////////////////////////////
|
||||
|
||||
#define PHYS_TO_K0(x) ((unsigned long)(x)|0x80000000) /* physical to kseg0 */
|
||||
#define K0_TO_PHYS(x) ((unsigned long)(x)&0x1FFFFFFF) /* kseg0 to physical */
|
||||
#define PHYS_TO_K1(x) ((unsigned long)(x)|0xA0000000) /* physical to kseg1 */
|
||||
#define K1_TO_PHYS(x) ((unsigned long)(x)&0x1FFFFFFF) /* kseg1 to physical */
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup ed64
|
||||
* @{
|
||||
@ -29,15 +62,22 @@ typedef enum {
|
||||
SAVE_TYPE_DD64 = 16,
|
||||
} ed64_save_type_t;
|
||||
|
||||
|
||||
#define SRAM_ADDRESS (0x1FFE2000)
|
||||
#define ROM_ADDRESS (0xB0000000)
|
||||
|
||||
/* Save functions */
|
||||
void ed64_ll_set_ram_bank(uint8_t bank);
|
||||
ed64_save_type_t ed64_ll_get_save_type();
|
||||
void ed64_ll_set_save_type(ed64_save_type_t type);
|
||||
void ed64_ll_set_sram_bank (uint8_t bank);
|
||||
ed64_save_type_t ed64_ll_get_save_type ();
|
||||
void ed64_ll_set_save_type (ed64_save_type_t type);
|
||||
|
||||
int ed64_ll_get_sram_128 (uint8_t *buffer, int size);
|
||||
int ed64_ll_get_sram (uint8_t *buffer, int size);
|
||||
int ed64_ll_get_eeprom (uint8_t *buffer, int size);
|
||||
int ed64_ll_get_fram (uint8_t *buffer, int size);
|
||||
|
||||
int ed64_ll_set_sram_128 (uint8_t *buffer, int size);
|
||||
int ed64_ll_set_sram (uint8_t *buffer, int size);
|
||||
int ed64_ll_set_eeprom (uint8_t *buffer, int size);
|
||||
int ed64_ll_set_fram (uint8_t *buffer, int size);
|
||||
|
||||
/** @} */ /* ed64 */
|
||||
|
||||
#endif
|
||||
|
42
src/flashcart/ed64/ed64_state.c
Normal file
42
src/flashcart/ed64/ed64_state.c
Normal file
@ -0,0 +1,42 @@
|
||||
#include <libdragon.h>
|
||||
#include <mini.c/src/mini.h>
|
||||
|
||||
#include "ed64_state.h"
|
||||
#include "utils/fs.h"
|
||||
|
||||
#ifndef ED64_STATE_FILE_PATH
|
||||
#define ED64_STATE_FILE_PATH "sd:/menu/ed64_state.ini"
|
||||
#endif
|
||||
|
||||
static ed64_pseudo_writeback_t init = {
|
||||
.is_expecting_save_writeback = false,
|
||||
.is_fram_save_type = false,
|
||||
.last_save_path = ""
|
||||
};
|
||||
|
||||
|
||||
void ed64_state_load (ed64_pseudo_writeback_t *state) {
|
||||
if (!file_exists(ED64_STATE_FILE_PATH)) {
|
||||
ed64_state_save(&init);
|
||||
}
|
||||
|
||||
mini_t *ini = mini_try_load(ED64_STATE_FILE_PATH);
|
||||
|
||||
state->is_expecting_save_writeback = mini_get_bool(ini, "ed64", "is_expecting_save_writeback", init.is_expecting_save_writeback);
|
||||
state->is_fram_save_type = mini_get_bool(ini, "ed64", "is_fram_save_type", init.is_fram_save_type);
|
||||
state->last_save_path = strdup(mini_get_string(ini, "ed64", "last_save_path", init.last_save_path));
|
||||
|
||||
mini_free(ini);
|
||||
}
|
||||
|
||||
void ed64_state_save (ed64_pseudo_writeback_t *state) {
|
||||
mini_t *ini = mini_create(ED64_STATE_FILE_PATH);
|
||||
|
||||
mini_set_bool(ini, "ed64", "is_expecting_save_writeback", state->is_expecting_save_writeback);
|
||||
mini_set_bool(ini, "ed64", "is_fram_save_type", state->is_fram_save_type);
|
||||
mini_set_string(ini, "ed64", "last_save_path", state->last_save_path);
|
||||
|
||||
mini_save(ini);
|
||||
|
||||
mini_free(ini);
|
||||
}
|
24
src/flashcart/ed64/ed64_state.h
Normal file
24
src/flashcart/ed64/ed64_state.h
Normal file
@ -0,0 +1,24 @@
|
||||
/**
|
||||
* @file e664_state.h
|
||||
* @brief ED64 state
|
||||
* @ingroup flashcart
|
||||
*/
|
||||
|
||||
#ifndef FLASHCART_ED64_STATE_H__
|
||||
#define FLASHCART_ED64_STATE_H__
|
||||
|
||||
/** @brief ED64 Pseudo Writeback Structure */
|
||||
typedef struct {
|
||||
/** @brief The reset button was used */
|
||||
bool is_expecting_save_writeback;
|
||||
/** @brief The last save type was flash ram */
|
||||
bool is_fram_save_type;
|
||||
/** @brief The path to the last loaded ROM */
|
||||
char *last_save_path;
|
||||
} ed64_pseudo_writeback_t;
|
||||
|
||||
void ed64_state_load (ed64_pseudo_writeback_t *state);
|
||||
void ed64_state_save (ed64_pseudo_writeback_t *state);
|
||||
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user