mirror of
https://github.com/Polprzewodnikowy/N64FlashcartMenu.git
synced 2024-12-26 18:21:51 +01:00
333 lines
48 KiB
HTML
333 lines
48 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
|
<html xmlns="http://www.w3.org/1999/xhtml" lang="en-US">
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
|
<meta http-equiv="X-UA-Compatible" content="IE=11"/>
|
|
<meta name="generator" content="Doxygen 1.9.5"/>
|
|
<meta name="viewport" content="width=device-width, initial-scale=1"/>
|
|
<title>N64FlashcartMenu: boot_io.h Source File</title>
|
|
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="jquery.js"></script>
|
|
<script type="text/javascript" src="dynsections.js"></script>
|
|
<link href="search/search.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="search/searchdata.js"></script>
|
|
<script type="text/javascript" src="search/search.js"></script>
|
|
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
|
</head>
|
|
<body>
|
|
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
|
<div id="titlearea">
|
|
<table cellspacing="0" cellpadding="0">
|
|
<tbody>
|
|
<tr id="projectrow">
|
|
<td id="projectalign">
|
|
<div id="projectname">N64FlashcartMenu
|
|
</div>
|
|
</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
</div>
|
|
<!-- end header part -->
|
|
<!-- Generated by Doxygen 1.9.5 -->
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&dn=expat.txt MIT */
|
|
var searchBox = new SearchBox("searchBox", "search/",'.html');
|
|
/* @license-end */
|
|
</script>
|
|
<script type="text/javascript" src="menudata.js"></script>
|
|
<script type="text/javascript" src="menu.js"></script>
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&dn=expat.txt MIT */
|
|
$(function() {
|
|
initMenu('',true,false,'search.php','Search');
|
|
$(document).ready(function() { init_search(); });
|
|
});
|
|
/* @license-end */
|
|
</script>
|
|
<div id="main-nav"></div>
|
|
<!-- window showing the filter options -->
|
|
<div id="MSearchSelectWindow"
|
|
onmouseover="return searchBox.OnSearchSelectShow()"
|
|
onmouseout="return searchBox.OnSearchSelectHide()"
|
|
onkeydown="return searchBox.OnSearchSelectKey(event)">
|
|
</div>
|
|
|
|
<!-- iframe showing the search results (closed by default) -->
|
|
<div id="MSearchResultsWindow">
|
|
<div id="MSearchResults">
|
|
<div class="SRPage">
|
|
<div id="SRIndex">
|
|
<div id="SRResults"></div>
|
|
<div class="SRStatus" id="Loading">Loading...</div>
|
|
<div class="SRStatus" id="Searching">Searching...</div>
|
|
<div class="SRStatus" id="NoMatches">No Matches</div>
|
|
</div>
|
|
</div>
|
|
</div>
|
|
</div>
|
|
|
|
<div id="nav-path" class="navpath">
|
|
<ul>
|
|
<li class="navelem"><a class="el" href="dir_68267d1309a1af8e8297ef4c3efbcdba.html">src</a></li><li class="navelem"><a class="el" href="dir_52780cb445d9f0b97a98e8aabec4d968.html">boot</a></li> </ul>
|
|
</div>
|
|
</div><!-- top -->
|
|
<div class="header">
|
|
<div class="headertitle"><div class="title">boot_io.h</div></div>
|
|
</div><!--header-->
|
|
<div class="contents">
|
|
<a href="boot__io_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno"> 1</span> </div>
|
|
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno"> 7</span><span class="preprocessor">#ifndef BOOT_IO_H__</span></div>
|
|
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno"> 8</span><span class="preprocessor">#define BOOT_IO_H__</span></div>
|
|
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno"> 9</span> </div>
|
|
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno"> 10</span> </div>
|
|
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno"> 11</span><span class="preprocessor">#include <stddef.h></span></div>
|
|
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno"> 12</span><span class="preprocessor">#include <stdint.h></span></div>
|
|
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno"> 13</span> </div>
|
|
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno"> 14</span> </div>
|
|
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno"> 15</span><span class="keyword">typedef</span> <span class="keyword">volatile</span> uint8_t io8_t;</div>
|
|
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno"> 16</span><span class="keyword">typedef</span> <span class="keyword">volatile</span> uint32_t io32_t;</div>
|
|
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno"> 17</span> </div>
|
|
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno"> 18</span> </div>
|
|
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno"> 19</span><span class="preprocessor">#define UNCACHED(address) ((typeof(address)) (((io32_t) (address)) | (0xA0000000UL)))</span></div>
|
|
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno"> 20</span> </div>
|
|
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 22</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno"> 23</span> io32_t DMEM[1024];</div>
|
|
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno"> 24</span> io32_t IMEM[1024];</div>
|
|
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno"> 25</span>} <a class="code hl_struct" href="boot__io_8h.html#structsp__mem__t">sp_mem_t</a>;</div>
|
|
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"> 26</span> </div>
|
|
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno"> 27</span><span class="preprocessor">#define SP_MEM_BASE (0x04000000UL)</span></div>
|
|
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno"> 28</span><span class="preprocessor">#define SP_MEM ((sp_mem_t *) SP_MEM_BASE)</span></div>
|
|
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno"> 29</span> </div>
|
|
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 31</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno"> 32</span> io32_t PADDR;</div>
|
|
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno"> 33</span> io32_t MADDR;</div>
|
|
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno"> 34</span> io32_t RD_LEN;</div>
|
|
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno"> 35</span> io32_t WR_LEN;</div>
|
|
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno"> 36</span> io32_t SR;</div>
|
|
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno"> 37</span> io32_t DMA_FULL;</div>
|
|
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno"> 38</span> io32_t DMA_BUSY;</div>
|
|
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno"> 39</span> io32_t SEMAPHORE;</div>
|
|
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno"> 40</span> io32_t __reserved[0xFFF8];</div>
|
|
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno"> 41</span> io32_t PC;</div>
|
|
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"> 42</span>} <a class="code hl_struct" href="boot__io_8h.html#structsp__regs__t">sp_regs_t</a>;</div>
|
|
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno"> 43</span> </div>
|
|
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno"> 44</span><span class="preprocessor">#define SP_BASE (0x04040000UL)</span></div>
|
|
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno"> 45</span><span class="preprocessor">#define SP ((sp_regs_t *) SP_BASE)</span></div>
|
|
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno"> 46</span> </div>
|
|
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno"> 47</span><span class="preprocessor">#define SP_SR_HALT (1 << 0)</span></div>
|
|
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno"> 48</span><span class="preprocessor">#define SP_SR_BROKE (1 << 1)</span></div>
|
|
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"> 49</span><span class="preprocessor">#define SP_SR_DMA_BUSY (1 << 2)</span></div>
|
|
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno"> 50</span><span class="preprocessor">#define SP_SR_DMA_FULL (1 << 3)</span></div>
|
|
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno"> 51</span><span class="preprocessor">#define SP_SR_IO_FULL (1 << 4)</span></div>
|
|
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno"> 52</span><span class="preprocessor">#define SP_SR_SSTEP (1 << 5)</span></div>
|
|
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno"> 53</span><span class="preprocessor">#define SP_SR_INTR_BREAK (1 << 6)</span></div>
|
|
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"> 54</span><span class="preprocessor">#define SP_SR_SIG0 (1 << 7)</span></div>
|
|
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno"> 55</span><span class="preprocessor">#define SP_SR_SIG1 (1 << 8)</span></div>
|
|
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno"> 56</span><span class="preprocessor">#define SP_SR_SIG2 (1 << 9)</span></div>
|
|
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno"> 57</span><span class="preprocessor">#define SP_SR_SIG3 (1 << 10)</span></div>
|
|
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno"> 58</span><span class="preprocessor">#define SP_SR_SIG4 (1 << 11)</span></div>
|
|
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"> 59</span><span class="preprocessor">#define SP_SR_SIG5 (1 << 12)</span></div>
|
|
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"> 60</span><span class="preprocessor">#define SP_SR_SIG6 (1 << 13)</span></div>
|
|
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"> 61</span><span class="preprocessor">#define SP_SR_SIG7 (1 << 14)</span></div>
|
|
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"> 62</span><span class="preprocessor">#define SP_SR_CLR_HALT (1 << 0)</span></div>
|
|
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"> 63</span><span class="preprocessor">#define SP_SR_SET_HALT (1 << 1)</span></div>
|
|
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"> 64</span><span class="preprocessor">#define SP_SR_CLR_BROKE (1 << 2)</span></div>
|
|
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"> 65</span><span class="preprocessor">#define SP_SR_CLR_INTR (1 << 3)</span></div>
|
|
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"> 66</span><span class="preprocessor">#define SP_SR_SET_INTR (1 << 4)</span></div>
|
|
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"> 67</span><span class="preprocessor">#define SP_SR_CLR_SSTEP (1 << 5)</span></div>
|
|
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"> 68</span><span class="preprocessor">#define SP_SR_SET_SSTEP (1 << 6)</span></div>
|
|
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno"> 69</span><span class="preprocessor">#define SP_SR_CLR_INTR_BREAK (1 << 7)</span></div>
|
|
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno"> 70</span><span class="preprocessor">#define SP_SR_SET_INTR_BREAK (1 << 8)</span></div>
|
|
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"> 71</span><span class="preprocessor">#define SP_SR_CLR_SIG0 (1 << 9)</span></div>
|
|
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"> 72</span><span class="preprocessor">#define SP_SR_SET_SIG0 (1 << 10)</span></div>
|
|
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno"> 73</span><span class="preprocessor">#define SP_SR_CLR_SIG1 (1 << 11)</span></div>
|
|
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"> 74</span><span class="preprocessor">#define SP_SR_SET_SIG1 (1 << 12)</span></div>
|
|
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno"> 75</span><span class="preprocessor">#define SP_SR_CLR_SIG2 (1 << 13)</span></div>
|
|
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"> 76</span><span class="preprocessor">#define SP_SR_SET_SIG2 (1 << 14)</span></div>
|
|
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno"> 77</span><span class="preprocessor">#define SP_SR_CLR_SIG3 (1 << 15)</span></div>
|
|
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno"> 78</span><span class="preprocessor">#define SP_SR_SET_SIG3 (1 << 16)</span></div>
|
|
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno"> 79</span><span class="preprocessor">#define SP_SR_CLR_SIG4 (1 << 17)</span></div>
|
|
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"> 80</span><span class="preprocessor">#define SP_SR_SET_SIG4 (1 << 18)</span></div>
|
|
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"> 81</span><span class="preprocessor">#define SP_SR_CLR_SIG5 (1 << 19)</span></div>
|
|
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"> 82</span><span class="preprocessor">#define SP_SR_SET_SIG5 (1 << 20)</span></div>
|
|
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"> 83</span><span class="preprocessor">#define SP_SR_CLR_SIG6 (1 << 21)</span></div>
|
|
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"> 84</span><span class="preprocessor">#define SP_SR_SET_SIG6 (1 << 22)</span></div>
|
|
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"> 85</span><span class="preprocessor">#define SP_SR_CLR_SIG7 (1 << 23)</span></div>
|
|
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"> 86</span><span class="preprocessor">#define SP_SR_SET_SIG7 (1 << 24)</span></div>
|
|
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"> 87</span> </div>
|
|
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"> 88</span> </div>
|
|
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 90</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno"> 91</span> io32_t START;</div>
|
|
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno"> 92</span> io32_t END;</div>
|
|
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"> 93</span> io32_t CURRENT;</div>
|
|
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"> 94</span> io32_t SR;</div>
|
|
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"> 95</span> io32_t CLOCK;</div>
|
|
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno"> 96</span> io32_t BUF_BUSY;</div>
|
|
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"> 97</span> io32_t PIPE_BUSY;</div>
|
|
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno"> 98</span> io32_t TMEM;</div>
|
|
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno"> 99</span>} <a class="code hl_struct" href="boot__io_8h.html#structdpc__regs__t">dpc_regs_t</a>;</div>
|
|
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno"> 100</span> </div>
|
|
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno"> 101</span><span class="preprocessor">#define DPC_BASE (0x04100000UL)</span></div>
|
|
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno"> 102</span><span class="preprocessor">#define DPC ((dpc_regs_t *) DPC_BASE)</span></div>
|
|
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno"> 103</span> </div>
|
|
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno"> 104</span><span class="preprocessor">#define DPC_SR_XBUS_DMEM_DMA (1 << 0)</span></div>
|
|
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno"> 105</span><span class="preprocessor">#define DPC_SR_FREEZE (1 << 1)</span></div>
|
|
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno"> 106</span><span class="preprocessor">#define DPC_SR_FLUSH (1 << 2)</span></div>
|
|
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno"> 107</span><span class="preprocessor">#define DPC_SR_START_GCLK (1 << 3)</span></div>
|
|
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno"> 108</span><span class="preprocessor">#define DPC_SR_TMEM_BUSY (1 << 4)</span></div>
|
|
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno"> 109</span><span class="preprocessor">#define DPC_SR_PIPE_BUSY (1 << 5)</span></div>
|
|
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno"> 110</span><span class="preprocessor">#define DPC_SR_CMD_BUSY (1 << 6)</span></div>
|
|
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno"> 111</span><span class="preprocessor">#define DPC_SR_CBUF_READY (1 << 7)</span></div>
|
|
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno"> 112</span><span class="preprocessor">#define DPC_SR_DMA_BUSY (1 << 8)</span></div>
|
|
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno"> 113</span><span class="preprocessor">#define DPC_SR_END_VALID (1 << 9)</span></div>
|
|
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno"> 114</span><span class="preprocessor">#define DPC_SR_START_VALID (1 << 10)</span></div>
|
|
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno"> 115</span><span class="preprocessor">#define DPC_SR_CLR_XBUS_DMEM_DMA (1 << 0)</span></div>
|
|
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno"> 116</span><span class="preprocessor">#define DPC_SR_SET_XBUS_DMEM_DMA (1 << 1)</span></div>
|
|
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno"> 117</span><span class="preprocessor">#define DPC_SR_CLR_FREEZE (1 << 2)</span></div>
|
|
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno"> 118</span><span class="preprocessor">#define DPC_SR_SET_FREEZE (1 << 3)</span></div>
|
|
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno"> 119</span><span class="preprocessor">#define DPC_SR_CLR_FLUSH (1 << 4)</span></div>
|
|
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno"> 120</span><span class="preprocessor">#define DPC_SR_SET_FLUSH (1 << 5)</span></div>
|
|
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno"> 121</span><span class="preprocessor">#define DPC_SR_CLR_TMEM_CTR (1 << 6)</span></div>
|
|
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno"> 122</span><span class="preprocessor">#define DPC_SR_CLR_PIPE_CTR (1 << 7)</span></div>
|
|
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno"> 123</span><span class="preprocessor">#define DPC_SR_CLR_CMD_CTR (1 << 8)</span></div>
|
|
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"> 124</span><span class="preprocessor">#define DPC_SR_CLR_CLOCK_CTR (1 << 9)</span></div>
|
|
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno"> 125</span> </div>
|
|
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno"> 126</span> </div>
|
|
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 128</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno"><a class="line" href="boot__io_8h.html#acb0559579506d3949f0b35d39d98156a"> 130</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#acb0559579506d3949f0b35d39d98156a">CR</a>;</div>
|
|
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno"><a class="line" href="boot__io_8h.html#afddfa288e765993552f0b0b9e5091abd"> 132</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#afddfa288e765993552f0b0b9e5091abd">MADDR</a>;</div>
|
|
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno"><a class="line" href="boot__io_8h.html#af2521492273c60801fa69449d73487a9"> 134</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#af2521492273c60801fa69449d73487a9">H_WIDTH</a>;</div>
|
|
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno"><a class="line" href="boot__io_8h.html#af3a2374353eaa0de3c38607693057cfa"> 136</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#af3a2374353eaa0de3c38607693057cfa">V_INTR</a>;</div>
|
|
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a16300cb685dffb0761649b885f36eeb3"> 138</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a16300cb685dffb0761649b885f36eeb3">CURR_LINE</a>;</div>
|
|
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a62ad61417eb98ddc6ad522b566f4667d"> 140</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a62ad61417eb98ddc6ad522b566f4667d">TIMING</a>;</div>
|
|
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ac7797f5ba82e82db9cda5c459a8a7cea"> 142</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ac7797f5ba82e82db9cda5c459a8a7cea">V_SYNC</a>;</div>
|
|
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a68c8e1537ebc5243d5b6bb773fe479ad"> 144</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a68c8e1537ebc5243d5b6bb773fe479ad">H_SYNC</a>;</div>
|
|
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ab76316a7a5c429c53d97eff274b99747"> 146</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ab76316a7a5c429c53d97eff274b99747">H_SYNC_LEAP</a>;</div>
|
|
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno"><a class="line" href="boot__io_8h.html#aa0297b871dc42976d5fefe87d136833b"> 148</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#aa0297b871dc42976d5fefe87d136833b">H_LIMITS</a>;</div>
|
|
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a8a17677bc1236677903d6312d64b73b8"> 150</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a8a17677bc1236677903d6312d64b73b8">V_LIMITS</a>;</div>
|
|
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ac2f4fd1da8557ce8056df383b8c1da22"> 152</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ac2f4fd1da8557ce8056df383b8c1da22">COLOR_BURST</a>;</div>
|
|
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno"><a class="line" href="boot__io_8h.html#abe25faca08f96d7d92585b9686fa647f"> 154</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#abe25faca08f96d7d92585b9686fa647f">H_SCALE</a>;</div>
|
|
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ad640b8c4be56e5e183f09f78368e2328"> 156</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ad640b8c4be56e5e183f09f78368e2328">V_SCALE</a>;</div>
|
|
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno"> 157</span>} <a class="code hl_struct" href="boot__io_8h.html#structvi__regs__t">vi_regs_t</a>;</div>
|
|
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno"> 158</span> </div>
|
|
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno"> 159</span><span class="preprocessor">#define VI_BASE (0x04400000UL)</span></div>
|
|
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno"> 160</span><span class="preprocessor">#define VI ((vi_regs_t *) VI_BASE)</span></div>
|
|
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno"> 161</span> </div>
|
|
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"> 162</span><span class="preprocessor">#define VI_CR_TYPE_16 (2 << 0)</span></div>
|
|
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno"> 163</span><span class="preprocessor">#define VI_CR_TYPE_32 (3 << 0)</span></div>
|
|
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno"> 164</span><span class="preprocessor">#define VI_CR_GAMMA_DITHER_ON (1 << 2)</span></div>
|
|
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno"> 165</span><span class="preprocessor">#define VI_CR_GAMMA_ON (1 << 3)</span></div>
|
|
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno"> 166</span><span class="preprocessor">#define VI_CR_DIVOT_ON (1 << 4)</span></div>
|
|
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno"> 167</span><span class="preprocessor">#define VI_CR_SERRATE_ON (1 << 6)</span></div>
|
|
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno"> 168</span><span class="preprocessor">#define VI_CR_ANTIALIAS_0 (1 << 8)</span></div>
|
|
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno"> 169</span><span class="preprocessor">#define VI_CR_ANTIALIAS_1 (1 << 9)</span></div>
|
|
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno"> 170</span><span class="preprocessor">#define VI_CR_PIXEL_ADVANCE_0 (1 << 12)</span></div>
|
|
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno"> 171</span><span class="preprocessor">#define VI_CR_PIXEL_ADVANCE_1 (1 << 13)</span></div>
|
|
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno"> 172</span><span class="preprocessor">#define VI_CR_PIXEL_ADVANCE_2 (1 << 14)</span></div>
|
|
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno"> 173</span><span class="preprocessor">#define VI_CR_PIXEL_ADVANCE_3 (1 << 15)</span></div>
|
|
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno"> 174</span><span class="preprocessor">#define VI_CR_DITHER_FILTER_ON (1 << 16)</span></div>
|
|
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno"> 175</span> </div>
|
|
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno"> 176</span><span class="preprocessor">#define VI_CURR_LINE_FIELD (1 << 0)</span></div>
|
|
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno"> 177</span> </div>
|
|
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 179</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ad7040a2f3fa50a932cb1d3328784ebb4"> 181</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ad7040a2f3fa50a932cb1d3328784ebb4">MADDR</a>;</div>
|
|
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ac0676d4e820604efc8b5414be5d39f18"> 183</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ac0676d4e820604efc8b5414be5d39f18">LEN</a>;</div>
|
|
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"><a class="line" href="boot__io_8h.html#ad443725846fa9e299773a8f57b357c73"> 185</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#ad443725846fa9e299773a8f57b357c73">CR</a>;</div>
|
|
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a8b1251e120efe26718d3394aec73ca0c"> 187</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a8b1251e120efe26718d3394aec73ca0c">SR</a>;</div>
|
|
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a05b74719e0eb214f19d2aca062baa57d"> 189</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a05b74719e0eb214f19d2aca062baa57d">DACRATE</a>;</div>
|
|
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a43e0411e186298f185d39b80ea5f1d4f"> 191</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a43e0411e186298f185d39b80ea5f1d4f">BITRATE</a>;</div>
|
|
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno"> 192</span>} <a class="code hl_struct" href="boot__io_8h.html#structai__regs__t">ai_regs_t</a>;</div>
|
|
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno"> 193</span> </div>
|
|
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"> 194</span><span class="preprocessor">#define AI_BASE (0x04500000UL)</span></div>
|
|
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"> 195</span><span class="preprocessor">#define AI ((ai_regs_t *) AI_BASE)</span></div>
|
|
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"> 196</span> </div>
|
|
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"> 197</span><span class="preprocessor">#define AI_SR_DMA_BUSY (1 << 30)</span></div>
|
|
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"> 198</span><span class="preprocessor">#define AI_SR_FIFO_FULL (1 << 31)</span></div>
|
|
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"> 199</span><span class="preprocessor">#define AI_CR_DMA_ON (1 << 0)</span></div>
|
|
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"> 200</span> </div>
|
|
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"> 201</span> </div>
|
|
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 203</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="boot__io_8h.html#aa9504bae7269bf8facd720b4ac2d2c00"> 205</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#aa9504bae7269bf8facd720b4ac2d2c00">MADDR</a>;</div>
|
|
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a39dcd01f99c2ca546737cff58821a43d"> 207</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a39dcd01f99c2ca546737cff58821a43d">PADDR</a>;</div>
|
|
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a6d04dc1568e8bec29264bc9a8c2e7724"> 209</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a6d04dc1568e8bec29264bc9a8c2e7724">RDMA</a>;</div>
|
|
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a73468640d22e6304e6a07d5ab81a0efa"> 211</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a73468640d22e6304e6a07d5ab81a0efa">WDMA</a>;</div>
|
|
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a6c4f19758b5239f5239f490a6be98262"> 213</a></span> io32_t <a class="code hl_variable" href="boot__io_8h.html#a6c4f19758b5239f5239f490a6be98262">SR</a>;</div>
|
|
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"><a class="line" href="boot__io_8h.html"> 215</a></span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"> 217</span> io32_t LAT;</div>
|
|
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"> 219</span> io32_t PWD;</div>
|
|
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"> 221</span> io32_t PGS;</div>
|
|
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"> 223</span> io32_t RLS;</div>
|
|
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="boot__io_8h.html#a378681355d279b47c38f6715cfa764d9"> 224</a></span> } DOM[2];</div>
|
|
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"> 225</span>} <a class="code hl_struct" href="boot__io_8h.html#structpi__regs__t">pi_regs_t</a>;</div>
|
|
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"> 226</span> </div>
|
|
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno"> 227</span><span class="preprocessor">#define PI_BASE (0x04600000UL)</span></div>
|
|
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno"> 228</span><span class="preprocessor">#define PI ((pi_regs_t *) PI_BASE)</span></div>
|
|
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"> 229</span> </div>
|
|
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno"> 230</span><span class="preprocessor">#define PI_SR_DMA_BUSY (1 << 0)</span></div>
|
|
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno"> 231</span><span class="preprocessor">#define PI_SR_IO_BUSY (1 << 1)</span></div>
|
|
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno"> 232</span><span class="preprocessor">#define PI_SR_DMA_ERROR (1 << 2)</span></div>
|
|
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"> 233</span><span class="preprocessor">#define PI_SR_RESET (1 << 0)</span></div>
|
|
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"> 234</span><span class="preprocessor">#define PI_SR_CLR_INTR (1 << 1)</span></div>
|
|
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno"> 235</span> </div>
|
|
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno"> 236</span> </div>
|
|
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno"> 237</span><span class="preprocessor">#define ROM_DDIPL_BASE (0x06000000UL)</span></div>
|
|
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno"> 238</span><span class="preprocessor">#define ROM_DDIPL ((io32_t *) ROM_DDIPL_BASE)</span></div>
|
|
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno"> 239</span> </div>
|
|
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"> 240</span> </div>
|
|
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"> 241</span><span class="preprocessor">#define ROM_CART_BASE (0x10000000UL)</span></div>
|
|
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno"> 242</span><span class="preprocessor">#define ROM_CART ((io32_t *) ROM_CART_BASE)</span></div>
|
|
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno"> 243</span> </div>
|
|
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno"> 244</span> </div>
|
|
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno"> 245</span><span class="keyword">static</span> <span class="keyword">inline</span> uint32_t cpu_io_read (io32_t *address) {</div>
|
|
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno"> 246</span> io32_t *uncached = UNCACHED(address);</div>
|
|
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno"> 247</span> uint32_t value = *uncached;</div>
|
|
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno"> 248</span> <span class="keywordflow">return</span> value;</div>
|
|
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno"> 249</span>}</div>
|
|
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno"> 250</span> </div>
|
|
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno"> 251</span><span class="keyword">static</span> <span class="keyword">inline</span> <span class="keywordtype">void</span> cpu_io_write (io32_t *address, uint32_t value) {</div>
|
|
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno"> 252</span> io32_t *uncached = UNCACHED(address);</div>
|
|
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno"> 253</span> *uncached = value;</div>
|
|
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno"> 254</span>}</div>
|
|
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno"> 255</span> </div>
|
|
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno"> 256</span> </div>
|
|
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno"> 257</span><span class="preprocessor">#endif</span></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a05b74719e0eb214f19d2aca062baa57d"><div class="ttname"><a href="boot__io_8h.html#a05b74719e0eb214f19d2aca062baa57d">ai_regs_t::DACRATE</a></div><div class="ttdeci">io32_t DACRATE</div><div class="ttdoc">The DAC rate.</div><div class="ttdef"><b>Definition:</b> boot_io.h:189</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a16300cb685dffb0761649b885f36eeb3"><div class="ttname"><a href="boot__io_8h.html#a16300cb685dffb0761649b885f36eeb3">vi_regs_t::CURR_LINE</a></div><div class="ttdeci">io32_t CURR_LINE</div><div class="ttdoc">The Current Line.</div><div class="ttdef"><b>Definition:</b> boot_io.h:138</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a39dcd01f99c2ca546737cff58821a43d"><div class="ttname"><a href="boot__io_8h.html#a39dcd01f99c2ca546737cff58821a43d">pi_regs_t::PADDR</a></div><div class="ttdeci">io32_t PADDR</div><div class="ttdoc">The Cart Address.</div><div class="ttdef"><b>Definition:</b> boot_io.h:207</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a43e0411e186298f185d39b80ea5f1d4f"><div class="ttname"><a href="boot__io_8h.html#a43e0411e186298f185d39b80ea5f1d4f">ai_regs_t::BITRATE</a></div><div class="ttdeci">io32_t BITRATE</div><div class="ttdoc">The bit rate.</div><div class="ttdef"><b>Definition:</b> boot_io.h:191</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a62ad61417eb98ddc6ad522b566f4667d"><div class="ttname"><a href="boot__io_8h.html#a62ad61417eb98ddc6ad522b566f4667d">vi_regs_t::TIMING</a></div><div class="ttdeci">io32_t TIMING</div><div class="ttdoc">The Timings.</div><div class="ttdef"><b>Definition:</b> boot_io.h:140</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a68c8e1537ebc5243d5b6bb773fe479ad"><div class="ttname"><a href="boot__io_8h.html#a68c8e1537ebc5243d5b6bb773fe479ad">vi_regs_t::H_SYNC</a></div><div class="ttdeci">io32_t H_SYNC</div><div class="ttdoc">The Horizontal Sync.</div><div class="ttdef"><b>Definition:</b> boot_io.h:144</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a6c4f19758b5239f5239f490a6be98262"><div class="ttname"><a href="boot__io_8h.html#a6c4f19758b5239f5239f490a6be98262">pi_regs_t::SR</a></div><div class="ttdeci">io32_t SR</div><div class="ttdoc">The Status Register.</div><div class="ttdef"><b>Definition:</b> boot_io.h:213</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a6d04dc1568e8bec29264bc9a8c2e7724"><div class="ttname"><a href="boot__io_8h.html#a6d04dc1568e8bec29264bc9a8c2e7724">pi_regs_t::RDMA</a></div><div class="ttdeci">io32_t RDMA</div><div class="ttdoc">The Read Length.</div><div class="ttdef"><b>Definition:</b> boot_io.h:209</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a73468640d22e6304e6a07d5ab81a0efa"><div class="ttname"><a href="boot__io_8h.html#a73468640d22e6304e6a07d5ab81a0efa">pi_regs_t::WDMA</a></div><div class="ttdeci">io32_t WDMA</div><div class="ttdoc">The Write Length.</div><div class="ttdef"><b>Definition:</b> boot_io.h:211</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a8a17677bc1236677903d6312d64b73b8"><div class="ttname"><a href="boot__io_8h.html#a8a17677bc1236677903d6312d64b73b8">vi_regs_t::V_LIMITS</a></div><div class="ttdeci">io32_t V_LIMITS</div><div class="ttdoc">The Virtical Limits.</div><div class="ttdef"><b>Definition:</b> boot_io.h:150</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_a8b1251e120efe26718d3394aec73ca0c"><div class="ttname"><a href="boot__io_8h.html#a8b1251e120efe26718d3394aec73ca0c">ai_regs_t::SR</a></div><div class="ttdeci">io32_t SR</div><div class="ttdoc">The Status Register.</div><div class="ttdef"><b>Definition:</b> boot_io.h:187</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_aa0297b871dc42976d5fefe87d136833b"><div class="ttname"><a href="boot__io_8h.html#aa0297b871dc42976d5fefe87d136833b">vi_regs_t::H_LIMITS</a></div><div class="ttdeci">io32_t H_LIMITS</div><div class="ttdoc">The Horizontal Limits.</div><div class="ttdef"><b>Definition:</b> boot_io.h:148</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_aa9504bae7269bf8facd720b4ac2d2c00"><div class="ttname"><a href="boot__io_8h.html#aa9504bae7269bf8facd720b4ac2d2c00">pi_regs_t::MADDR</a></div><div class="ttdeci">io32_t MADDR</div><div class="ttdoc">The Memory Address.</div><div class="ttdef"><b>Definition:</b> boot_io.h:205</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ab76316a7a5c429c53d97eff274b99747"><div class="ttname"><a href="boot__io_8h.html#ab76316a7a5c429c53d97eff274b99747">vi_regs_t::H_SYNC_LEAP</a></div><div class="ttdeci">io32_t H_SYNC_LEAP</div><div class="ttdoc">The Horizontal Sync Leap.</div><div class="ttdef"><b>Definition:</b> boot_io.h:146</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_abe25faca08f96d7d92585b9686fa647f"><div class="ttname"><a href="boot__io_8h.html#abe25faca08f96d7d92585b9686fa647f">vi_regs_t::H_SCALE</a></div><div class="ttdeci">io32_t H_SCALE</div><div class="ttdoc">The Horizontal Scale.</div><div class="ttdef"><b>Definition:</b> boot_io.h:154</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ac0676d4e820604efc8b5414be5d39f18"><div class="ttname"><a href="boot__io_8h.html#ac0676d4e820604efc8b5414be5d39f18">ai_regs_t::LEN</a></div><div class="ttdeci">io32_t LEN</div><div class="ttdoc">The Length of bytes.</div><div class="ttdef"><b>Definition:</b> boot_io.h:183</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ac2f4fd1da8557ce8056df383b8c1da22"><div class="ttname"><a href="boot__io_8h.html#ac2f4fd1da8557ce8056df383b8c1da22">vi_regs_t::COLOR_BURST</a></div><div class="ttdeci">io32_t COLOR_BURST</div><div class="ttdoc">The Colour Burst.</div><div class="ttdef"><b>Definition:</b> boot_io.h:152</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ac7797f5ba82e82db9cda5c459a8a7cea"><div class="ttname"><a href="boot__io_8h.html#ac7797f5ba82e82db9cda5c459a8a7cea">vi_regs_t::V_SYNC</a></div><div class="ttdeci">io32_t V_SYNC</div><div class="ttdoc">The Virtical Sync.</div><div class="ttdef"><b>Definition:</b> boot_io.h:142</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_acb0559579506d3949f0b35d39d98156a"><div class="ttname"><a href="boot__io_8h.html#acb0559579506d3949f0b35d39d98156a">vi_regs_t::CR</a></div><div class="ttdeci">io32_t CR</div><div class="ttdoc">The Control Register.</div><div class="ttdef"><b>Definition:</b> boot_io.h:130</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ad443725846fa9e299773a8f57b357c73"><div class="ttname"><a href="boot__io_8h.html#ad443725846fa9e299773a8f57b357c73">ai_regs_t::CR</a></div><div class="ttdeci">io32_t CR</div><div class="ttdoc">The Control Register.</div><div class="ttdef"><b>Definition:</b> boot_io.h:185</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ad640b8c4be56e5e183f09f78368e2328"><div class="ttname"><a href="boot__io_8h.html#ad640b8c4be56e5e183f09f78368e2328">vi_regs_t::V_SCALE</a></div><div class="ttdeci">io32_t V_SCALE</div><div class="ttdoc">The Virtical Scale.</div><div class="ttdef"><b>Definition:</b> boot_io.h:156</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_ad7040a2f3fa50a932cb1d3328784ebb4"><div class="ttname"><a href="boot__io_8h.html#ad7040a2f3fa50a932cb1d3328784ebb4">ai_regs_t::MADDR</a></div><div class="ttdeci">io32_t MADDR</div><div class="ttdoc">The Memory Address.</div><div class="ttdef"><b>Definition:</b> boot_io.h:181</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_af2521492273c60801fa69449d73487a9"><div class="ttname"><a href="boot__io_8h.html#af2521492273c60801fa69449d73487a9">vi_regs_t::H_WIDTH</a></div><div class="ttdeci">io32_t H_WIDTH</div><div class="ttdoc">The Horizontal Width.</div><div class="ttdef"><b>Definition:</b> boot_io.h:134</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_af3a2374353eaa0de3c38607693057cfa"><div class="ttname"><a href="boot__io_8h.html#af3a2374353eaa0de3c38607693057cfa">vi_regs_t::V_INTR</a></div><div class="ttdeci">io32_t V_INTR</div><div class="ttdoc">The Virtical Interupt.</div><div class="ttdef"><b>Definition:</b> boot_io.h:136</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_afddfa288e765993552f0b0b9e5091abd"><div class="ttname"><a href="boot__io_8h.html#afddfa288e765993552f0b0b9e5091abd">vi_regs_t::MADDR</a></div><div class="ttdeci">io32_t MADDR</div><div class="ttdoc">The Memory Address.</div><div class="ttdef"><b>Definition:</b> boot_io.h:132</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structai__regs__t"><div class="ttname"><a href="boot__io_8h.html#structai__regs__t">ai_regs_t</a></div><div class="ttdoc">Audio Interface Registers Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:179</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structdpc__regs__t"><div class="ttname"><a href="boot__io_8h.html#structdpc__regs__t">dpc_regs_t</a></div><div class="ttdoc">DPC Registers Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:90</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structpi__regs__t"><div class="ttname"><a href="boot__io_8h.html#structpi__regs__t">pi_regs_t</a></div><div class="ttdoc">Peripheral Interface Register Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:203</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structsp__mem__t"><div class="ttname"><a href="boot__io_8h.html#structsp__mem__t">sp_mem_t</a></div><div class="ttdoc">Memory Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:22</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structsp__regs__t"><div class="ttname"><a href="boot__io_8h.html#structsp__regs__t">sp_regs_t</a></div><div class="ttdoc">SP Registers Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:31</div></div>
|
|
<div class="ttc" id="aboot__io_8h_html_structvi__regs__t"><div class="ttname"><a href="boot__io_8h.html#structvi__regs__t">vi_regs_t</a></div><div class="ttdoc">Video Interface Registers Structure.</div><div class="ttdef"><b>Definition:</b> boot_io.h:128</div></div>
|
|
</div><!-- fragment --></div><!-- contents -->
|
|
<!-- start footer part -->
|
|
<hr class="footer"/><address class="footer"><small>
|
|
Generated on Sun Dec 17 2023 21:13:59 for N64FlashcartMenu by <a href="https://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.9.5
|
|
</small></address>
|
|
</body>
|
|
</html>
|