From 063d423db558fb9b9b136d0e5539ce8e166559ce Mon Sep 17 00:00:00 2001 From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> Date: Wed, 3 Apr 2019 14:21:22 +0200 Subject: [PATCH] Sse optimized all the fp to integer conversion instructions (signed) with Tests (signed & unsigned). (#655) * Update CpuTestSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdShImm.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdMove.cs * Update InstEmitSimdCmp.cs * Update VectorHelper.cs * Update InstEmitSimdHelper.cs * Update OpCodeTable.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdHelper.cs * Update InstEmitSimdMove.cs --- Instructions/InstEmitSimdCmp.cs | 6 +- Instructions/InstEmitSimdCvt.cs | 400 ++++++++++++++++++++++++++++- Instructions/InstEmitSimdHelper.cs | 4 +- Instructions/InstEmitSimdMove.cs | 6 +- Instructions/VectorHelper.cs | 87 ++----- OpCodeTable.cs | 6 +- 6 files changed, 419 insertions(+), 90 deletions(-) diff --git a/Instructions/InstEmitSimdCmp.cs b/Instructions/InstEmitSimdCmp.cs index e6b33f7..d54edb7 100644 --- a/Instructions/InstEmitSimdCmp.cs +++ b/Instructions/InstEmitSimdCmp.cs @@ -563,7 +563,7 @@ namespace ChocolArm64.Instructions if (cmpWithZero) { - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorDoubleZero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); } else { @@ -574,7 +574,7 @@ namespace ChocolArm64.Instructions context.EmitLdvectmp(); context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrderedScalar), typesCmp)); - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorDoubleZero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareEqualOrderedScalar), typesCmp)); @@ -839,7 +839,7 @@ namespace ChocolArm64.Instructions } else { - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorDoubleZero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); } if (isLeOrLt) diff --git a/Instructions/InstEmitSimdCvt.cs b/Instructions/InstEmitSimdCvt.cs index c5c61bc..2e2da6a 100644 --- a/Instructions/InstEmitSimdCvt.cs +++ b/Instructions/InstEmitSimdCvt.cs @@ -35,7 +35,7 @@ namespace ChocolArm64.Instructions //Single -> Double. Type[] typesCvt = new Type[] { typeof(Vector128), typeof(Vector128) }; - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorDoubleZero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); context.EmitLdvec(op.Rn); context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertScalarToVector128Double), typesCvt)); @@ -125,7 +125,14 @@ namespace ChocolArm64.Instructions public static void Fcvtms_Gp(ILEmitterCtx context) { - EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Floor))); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsMinusInfinity, isFixed: false); + } + else + { + EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Floor))); + } } public static void Fcvtmu_Gp(ILEmitterCtx context) @@ -207,12 +214,26 @@ namespace ChocolArm64.Instructions public static void Fcvtns_S(ILEmitterCtx context) { - EmitFcvtn(context, signed: true, scalar: true); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, isFixed: false, scalar: true); + } + else + { + EmitFcvtn(context, signed: true, scalar: true); + } } public static void Fcvtns_V(ILEmitterCtx context) { - EmitFcvtn(context, signed: true, scalar: false); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, isFixed: false, scalar: false); + } + else + { + EmitFcvtn(context, signed: true, scalar: false); + } } public static void Fcvtnu_S(ILEmitterCtx context) @@ -227,7 +248,14 @@ namespace ChocolArm64.Instructions public static void Fcvtps_Gp(ILEmitterCtx context) { - EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Ceiling))); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsPlusInfinity, isFixed: false); + } + else + { + EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Ceiling))); + } } public static void Fcvtpu_Gp(ILEmitterCtx context) @@ -237,22 +265,62 @@ namespace ChocolArm64.Instructions public static void Fcvtzs_Gp(ILEmitterCtx context) { - EmitFcvt_s_Gp(context, () => { }); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsZero, isFixed: false); + } + else + { + EmitFcvt_s_Gp(context, () => { }); + } } public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context) { - EmitFcvtzs_Gp_Fixed(context); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsZero, isFixed: true); + } + else + { + EmitFcvtzs_Gp_Fixed(context); + } } public static void Fcvtzs_S(ILEmitterCtx context) { - EmitFcvtz(context, signed: true, scalar: true); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: false, scalar: true); + } + else + { + EmitFcvtz(context, signed: true, scalar: true); + } } public static void Fcvtzs_V(ILEmitterCtx context) { - EmitFcvtz(context, signed: true, scalar: false); + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: false, scalar: false); + } + else + { + EmitFcvtz(context, signed: true, scalar: false); + } + } + + public static void Fcvtzs_V_Fixed(ILEmitterCtx context) + { + if (Optimizations.UseSse41) + { + EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: true, scalar: false); + } + else + { + EmitFcvtz(context, signed: true, scalar: false); + } } public static void Fcvtzu_Gp(ILEmitterCtx context) @@ -275,6 +343,11 @@ namespace ChocolArm64.Instructions EmitFcvtz(context, signed: false, scalar: false); } + public static void Fcvtzu_V_Fixed(ILEmitterCtx context) + { + EmitFcvtz(context, signed: false, scalar: false); + } + public static void Scvtf_Gp(ILEmitterCtx context) { OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; @@ -730,5 +803,314 @@ namespace ChocolArm64.Instructions context.Emit(OpCodes.Mul); } } + + private static void EmitSse41Fcvt_Signed_Gp(ILEmitterCtx context, RoundMode roundMode, bool isFixed) + { + OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; + + if (op.Size == 0) + { + Type[] typesCmpMul = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesAnd = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesRndCvt = new Type[] { typeof(Vector128) }; + Type[] typesCvt = new Type[] { typeof(Vector128) }; + Type[] typesSav = new Type[] { typeof(int) }; + + //string nameCvt; + int fpMaxVal; + + if (op.RegisterSize == RegisterSize.Int32) + { + //nameCvt = nameof(Sse.ConvertToInt32); + fpMaxVal = 0x4F000000; // 2.14748365E9f (2147483648) + } + else + { + //nameCvt = nameof(Sse.ConvertToInt64); + fpMaxVal = 0x5F000000; // 9.223372E18f (9223372036854775808) + } + + context.EmitLdvec(op.Rn); + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), typesCmpMul)); + + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAnd)); + + if (isFixed) + { + // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, op.FBits) + int fpScaled = 0x40000000 + (op.FBits - 1) * 0x800000; + + context.EmitLdc_I4(fpScaled); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), typesCmpMul)); + } + + context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt)); + + context.EmitStvectmp(); + context.EmitLdvectmp(); + + // TODO: Use Sse.ConvertToInt64 once it is fixed (in .NET Core 3.0), + // remove the following if/else and uncomment the code. + + //context.EmitCall(typeof(Sse).GetMethod(nameCvt, typesRndCvt)); + + if (op.RegisterSize == RegisterSize.Int32) + { + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.ConvertToInt32), typesRndCvt)); + } + else + { + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Double), typesRndCvt)); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), new Type[] { typeof(Vector128) })); + } + + context.EmitLdvectmp(); + + context.EmitLdc_I4(fpMaxVal); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), typesCmpMul)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt32), typesCvt)); + + if (op.RegisterSize == RegisterSize.Int32) + { + context.Emit(OpCodes.Xor); + context.Emit(OpCodes.Conv_U8); + } + else + { + context.Emit(OpCodes.Conv_I8); + context.Emit(OpCodes.Xor); + } + + context.EmitStintzr(op.Rd); + } + else /* if (op.Size == 1) */ + { + Type[] typesCmpMul = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesAnd = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesRndCvt = new Type[] { typeof(Vector128) }; + Type[] typesCvt = new Type[] { typeof(Vector128) }; + Type[] typesSav = new Type[] { typeof(long) }; + + string nameCvt; + long fpMaxVal; + + if (op.RegisterSize == RegisterSize.Int32) + { + nameCvt = nameof(Sse2.ConvertToInt32); + fpMaxVal = 0x41E0000000000000L; // 2147483648.0000000d (2147483648) + } + else + { + nameCvt = nameof(Sse2.ConvertToInt64); + fpMaxVal = 0x43E0000000000000L; // 9.2233720368547760E18d (9223372036854775808) + } + + context.EmitLdvec(op.Rn); + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), typesCmpMul)); + + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAnd)); + + if (isFixed) + { + // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, op.FBits) + long fpScaled = 0x4000000000000000L + (op.FBits - 1) * 0x10000000000000L; + + context.EmitLdc_I8(fpScaled); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), typesCmpMul)); + } + + context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt)); + + context.EmitStvectmp(); + context.EmitLdvectmp(); + + context.EmitCall(typeof(Sse2).GetMethod(nameCvt, typesRndCvt)); + + context.EmitLdvectmp(); + + context.EmitLdc_I8(fpMaxVal); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), typesCmpMul)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt32), typesCvt)); + + if (op.RegisterSize == RegisterSize.Int32) + { + context.Emit(OpCodes.Xor); + context.Emit(OpCodes.Conv_U8); + } + else + { + context.Emit(OpCodes.Conv_I8); + context.Emit(OpCodes.Xor); + } + + context.EmitStintzr(op.Rd); + } + } + + private static void EmitSse41Fcvt_Signed(ILEmitterCtx context, RoundMode roundMode, bool isFixed, bool scalar) + { + OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; + + // sizeF == ((OpCodeSimdShImm64)op).Size - 2 + int sizeF = op.Size & 1; + + if (sizeF == 0) + { + Type[] typesCmpMul = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesAndXor = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesRndCvt = new Type[] { typeof(Vector128) }; + Type[] typesSav = new Type[] { typeof(int) }; + + context.EmitLdvec(op.Rn); + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), typesCmpMul)); + + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAndXor)); + + if (isFixed) + { + int fBits = GetImmShr((OpCodeSimdShImm64)op); + + // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits) + int fpScaled = 0x40000000 + (fBits - 1) * 0x800000; + + context.EmitLdc_I4(fpScaled); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), typesCmpMul)); + } + + context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt)); + + context.EmitStvectmp(); + context.EmitLdvectmp(); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Int32), typesRndCvt)); + + context.EmitLdvectmp(); + + context.EmitLdc_I4(0x4F000000); // 2.14748365E9f (2147483648) + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), typesCmpMul)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), typesAndXor)); + + context.EmitStvec(op.Rd); + + if (scalar) + { + EmitVectorZero32_128(context, op.Rd); + } + else if (op.RegisterSize == RegisterSize.Simd64) + { + EmitVectorZeroUpper(context, op.Rd); + } + } + else /* if (sizeF == 1) */ + { + Type[] typesCmpMulUpk = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesAndXor = new Type[] { typeof(Vector128), typeof(Vector128) }; + Type[] typesRndCvt = new Type[] { typeof(Vector128) }; + Type[] typesSv = new Type[] { typeof(long), typeof(long) }; + Type[] typesSav = new Type[] { typeof(long) }; + + context.EmitLdvec(op.Rn); + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), typesCmpMulUpk)); + + context.EmitLdvec(op.Rn); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAndXor)); + + if (isFixed) + { + int fBits = GetImmShr((OpCodeSimdShImm64)op); + + // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits) + long fpScaled = 0x4000000000000000L + (fBits - 1) * 0x10000000000000L; + + context.EmitLdc_I8(fpScaled); + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), typesCmpMulUpk)); + } + + context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt)); + + context.EmitStvectmp(); + context.EmitLdvectmp(); + + context.EmitLdvectmp(); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), typesCmpMulUpk)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt)); + + context.EmitLdvectmp(); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetVector128), typesSv)); + + context.EmitLdvectmp(); + + context.EmitLdc_I8(0x43E0000000000000L); // 9.2233720368547760E18d (9223372036854775808) + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), typesCmpMulUpk)); + + context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), typesAndXor)); + + context.EmitStvec(op.Rd); + + if (scalar) + { + EmitVectorZeroUpper(context, op.Rd); + } + } + } + + private static string GetSse41NameRnd(RoundMode roundMode) + { + switch (roundMode) + { + case RoundMode.ToNearest: + return nameof(Sse41.RoundToNearestInteger); // even + + case RoundMode.TowardsMinusInfinity: + return nameof(Sse41.RoundToNegativeInfinity); + + case RoundMode.TowardsPlusInfinity: + return nameof(Sse41.RoundToPositiveInfinity); + + case RoundMode.TowardsZero: + return nameof(Sse41.RoundToZero); + + default: throw new ArgumentException(nameof(roundMode)); + } + } } } diff --git a/Instructions/InstEmitSimdHelper.cs b/Instructions/InstEmitSimdHelper.cs index 56ef1fd..6799a3a 100644 --- a/Instructions/InstEmitSimdHelper.cs +++ b/Instructions/InstEmitSimdHelper.cs @@ -1367,8 +1367,8 @@ namespace ChocolArm64.Instructions { if (Optimizations.UseSse) { - //TODO: Use Sse2.MoveScalar once it is fixed, - //as of the time of writing it just crashes the JIT (SDK 2.1.504). + // TODO: Use Sse2.MoveScalar once it is fixed (in .NET Core 3.0), + // as of the time of writing it just crashes the JIT. /*Type[] typesMov = new Type[] { typeof(Vector128) }; diff --git a/Instructions/InstEmitSimdMove.cs b/Instructions/InstEmitSimdMove.cs index cdd3517..131ddec 100644 --- a/Instructions/InstEmitSimdMove.cs +++ b/Instructions/InstEmitSimdMove.cs @@ -358,7 +358,7 @@ namespace ChocolArm64.Instructions if (Optimizations.UseSsse3) { Type[] typesCmpSflSub = new Type[] { typeof(Vector128), typeof(Vector128) }; - Type[] typesOr = new Type[] { typeof(Vector128 ), typeof(Vector128 ) }; + Type[] typesOr = new Type[] { typeof(Vector128), typeof(Vector128) }; Type[] typesSav = new Type[] { typeof(long) }; context.EmitLdvec(op.Rn); @@ -710,7 +710,7 @@ namespace ChocolArm64.Instructions context.EmitCall(typeof(Ssse3).GetMethod(nameof(Ssse3.Shuffle), GetTypesSflUpk(0))); } - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInt64Zero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); context.EmitCall(typeof(Sse2).GetMethod(nameUpk, GetTypesSflUpk(3))); @@ -763,7 +763,7 @@ namespace ChocolArm64.Instructions else { context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(op.Size))); - VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInt64Zero)); + VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero)); context.EmitCall(typeof(Sse2).GetMethod(nameUpk, GetTypesSflUpk(3))); } diff --git a/Instructions/VectorHelper.cs b/Instructions/VectorHelper.cs index edb3428..d1dface 100644 --- a/Instructions/VectorHelper.cs +++ b/Instructions/VectorHelper.cs @@ -26,8 +26,8 @@ namespace ChocolArm64.Instructions { if (float.IsNaN(value)) return 0; - return value > int.MaxValue ? int.MaxValue : - value < int.MinValue ? int.MinValue : (int)value; + return value >= int.MaxValue ? int.MaxValue : + value <= int.MinValue ? int.MinValue : (int)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -35,8 +35,8 @@ namespace ChocolArm64.Instructions { if (float.IsNaN(value)) return 0; - return value > long.MaxValue ? long.MaxValue : - value < long.MinValue ? long.MinValue : (long)value; + return value >= long.MaxValue ? long.MaxValue : + value <= long.MinValue ? long.MinValue : (long)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -44,8 +44,8 @@ namespace ChocolArm64.Instructions { if (float.IsNaN(value)) return 0; - return value > uint.MaxValue ? uint.MaxValue : - value < uint.MinValue ? uint.MinValue : (uint)value; + return value >= uint.MaxValue ? uint.MaxValue : + value <= uint.MinValue ? uint.MinValue : (uint)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -53,8 +53,8 @@ namespace ChocolArm64.Instructions { if (float.IsNaN(value)) return 0; - return value > ulong.MaxValue ? ulong.MaxValue : - value < ulong.MinValue ? ulong.MinValue : (ulong)value; + return value >= ulong.MaxValue ? ulong.MaxValue : + value <= ulong.MinValue ? ulong.MinValue : (ulong)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -62,8 +62,8 @@ namespace ChocolArm64.Instructions { if (double.IsNaN(value)) return 0; - return value > int.MaxValue ? int.MaxValue : - value < int.MinValue ? int.MinValue : (int)value; + return value >= int.MaxValue ? int.MaxValue : + value <= int.MinValue ? int.MinValue : (int)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -71,8 +71,8 @@ namespace ChocolArm64.Instructions { if (double.IsNaN(value)) return 0; - return value > long.MaxValue ? long.MaxValue : - value < long.MinValue ? long.MinValue : (long)value; + return value >= long.MaxValue ? long.MaxValue : + value <= long.MinValue ? long.MinValue : (long)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -80,8 +80,8 @@ namespace ChocolArm64.Instructions { if (double.IsNaN(value)) return 0; - return value > uint.MaxValue ? uint.MaxValue : - value < uint.MinValue ? uint.MinValue : (uint)value; + return value >= uint.MaxValue ? uint.MaxValue : + value <= uint.MinValue ? uint.MinValue : (uint)value; } [MethodImpl(MethodImplOptions.AggressiveInlining)] @@ -89,8 +89,8 @@ namespace ChocolArm64.Instructions { if (double.IsNaN(value)) return 0; - return value > ulong.MaxValue ? ulong.MaxValue : - value < ulong.MinValue ? ulong.MinValue : (ulong)value; + return value >= ulong.MaxValue ? ulong.MaxValue : + value <= ulong.MinValue ? ulong.MinValue : (ulong)value; } public static double Round(double value, CpuThreadState state) @@ -500,50 +500,6 @@ namespace ChocolArm64.Instructions return Sse41.Insert(vector, value, 0b1110); } - [MethodImpl(MethodImplOptions.AggressiveInlining)] - public static Vector128 VectorSByteZero() - { - if (Sse2.IsSupported) - { - return Sse2.SetZeroVector128(); - } - - throw new PlatformNotSupportedException(); - } - - [MethodImpl(MethodImplOptions.AggressiveInlining)] - public static Vector128 VectorInt16Zero() - { - if (Sse2.IsSupported) - { - return Sse2.SetZeroVector128(); - } - - throw new PlatformNotSupportedException(); - } - - [MethodImpl(MethodImplOptions.AggressiveInlining)] - public static Vector128 VectorInt32Zero() - { - if (Sse2.IsSupported) - { - return Sse2.SetZeroVector128(); - } - - throw new PlatformNotSupportedException(); - } - - [MethodImpl(MethodImplOptions.AggressiveInlining)] - public static Vector128 VectorInt64Zero() - { - if (Sse2.IsSupported) - { - return Sse2.SetZeroVector128(); - } - - throw new PlatformNotSupportedException(); - } - [MethodImpl(MethodImplOptions.AggressiveInlining)] public static Vector128 VectorSingleZero() { @@ -554,16 +510,5 @@ namespace ChocolArm64.Instructions throw new PlatformNotSupportedException(); } - - [MethodImpl(MethodImplOptions.AggressiveInlining)] - public static Vector128 VectorDoubleZero() - { - if (Sse2.IsSupported) - { - return Sse2.SetZeroVector128(); - } - - throw new PlatformNotSupportedException(); - } } } diff --git a/OpCodeTable.cs b/OpCodeTable.cs index 9fdda87..50bc6a1 100644 --- a/OpCodeTable.cs +++ b/OpCodeTable.cs @@ -313,12 +313,14 @@ namespace ChocolArm64 SetA64(">00111100x011000>xxxxxxxxxxxxxxx", InstEmit.Fcvtzs_Gp_Fixed, typeof(OpCodeSimdCvt64)); SetA64("010111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzs_S, typeof(OpCodeSimd64)); SetA64("0>0011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimd64)); - SetA64("0x0011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimdShImm64)); + SetA64("0x001111001xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V_Fixed, typeof(OpCodeSimdShImm64)); + SetA64("0100111101xxxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V_Fixed, typeof(OpCodeSimdShImm64)); SetA64("x00111100x111001000000xxxxxxxxxx", InstEmit.Fcvtzu_Gp, typeof(OpCodeSimdCvt64)); SetA64(">00111100x011001>xxxxxxxxxxxxxxx", InstEmit.Fcvtzu_Gp_Fixed, typeof(OpCodeSimdCvt64)); SetA64("011111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzu_S, typeof(OpCodeSimd64)); SetA64("0>1011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimd64)); - SetA64("0x1011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimdShImm64)); + SetA64("0x101111001xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V_Fixed, typeof(OpCodeSimdShImm64)); + SetA64("0110111101xxxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V_Fixed, typeof(OpCodeSimdShImm64)); SetA64("000111100x1xxxxx000110xxxxxxxxxx", InstEmit.Fdiv_S, typeof(OpCodeSimdReg64)); SetA64("0>1011100<1xxxxx111111xxxxxxxxxx", InstEmit.Fdiv_V, typeof(OpCodeSimdReg64)); SetA64("000111110x0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Fmadd_S, typeof(OpCodeSimdReg64));