From 4a0f56b6790bd6e7edac39badab1554ea2591899 Mon Sep 17 00:00:00 2001 From: David CARLIER Date: Sun, 13 Aug 2023 13:54:07 +0100 Subject: [PATCH] SDL_TriggerBreakppoint for riscv arch (both 32/64) version. `ebreak` acts like int3 for x86, giving control of running process to debuggers. (cherry picked from commit 723bcd0a8be4e816f6555b6bbbd5e9c26ab27137) --- include/SDL_assert.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/SDL_assert.h b/include/SDL_assert.h index 87d5c1bdb..7ce823ec5 100644 --- a/include/SDL_assert.h +++ b/include/SDL_assert.h @@ -55,6 +55,8 @@ assert can have unique static variables associated with it. #define SDL_TriggerBreakpoint() __builtin_debugtrap() #elif ( (!defined(__NACL__)) && ((defined(__GNUC__) || defined(__clang__)) && (defined(__i386__) || defined(__x86_64__))) ) #define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "int $3\n\t" ) +#elif (defined(__GNUC__) || defined(__clang__)) && defined(__riscv) + #define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "ebreak\n\t" ) #elif ( defined(__APPLE__) && (defined(__arm64__) || defined(__aarch64__)) ) /* this might work on other ARM targets, but this is a known quantity... */ #define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "brk #22\n\t" ) #elif defined(__APPLE__) && defined(__arm__)