mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-10 05:33:16 +02:00
Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers
This commit is contained in:
parent
3936c93448
commit
035efc913e
@ -51,6 +51,7 @@ namespace ChocolArm64
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Set("x10100100xxxxxxxxxxxxxxxxxxxxxxx", AInstEmit.Eor, typeof(AOpCodeAluImm));
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Set("x1001010xx0xxxxxxxxxxxxxxxxxxxxx", AInstEmit.Eor, typeof(AOpCodeAluRs));
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Set("x00100111x0xxxxxxxxxxxxxxxxxxxxx", AInstEmit.Extr, typeof(AOpCodeAluRs));
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Set("11010101000000110010xxxxxxx11111", AInstEmit.Hint, typeof(AOpCodeSystem));
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Set("xx001000110xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Ldar, typeof(AOpCodeMemEx));
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Set("1x001000011xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Ldaxp, typeof(AOpCodeMemEx));
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Set("xx001000010xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Ldaxr, typeof(AOpCodeMemEx));
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@ -193,6 +194,7 @@ namespace ChocolArm64
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Set("000111100x100110010000xxxxxxxxxx", AInstEmit.Frinta_S, typeof(AOpCodeSimd));
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Set("000111100x100101010000xxxxxxxxxx", AInstEmit.Frintm_S, typeof(AOpCodeSimd));
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Set("000111100x100100110000xxxxxxxxxx", AInstEmit.Frintp_S, typeof(AOpCodeSimd));
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Set("000111100x100111010000xxxxxxxxxx", AInstEmit.Frintx_S, typeof(AOpCodeSimd));
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Set("000111100x100001110000xxxxxxxxxx", AInstEmit.Fsqrt_S, typeof(AOpCodeSimd));
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Set("000111100x1xxxxx001110xxxxxxxxxx", AInstEmit.Fsub_S, typeof(AOpCodeSimdReg));
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Set("0>0011101<1xxxxx110101xxxxxxxxxx", AInstEmit.Fsub_V, typeof(AOpCodeSimdReg));
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@ -6,7 +6,7 @@ using System.Reflection.Emit;
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namespace ChocolArm64
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{
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class ATranslator
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public class ATranslator
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{
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public AThread Thread { get; private set; }
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@ -41,7 +41,7 @@ namespace ChocolArm64
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while (Position != 0 && KeepRunning);
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}
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public bool TryGetCachedSub(AOpCode OpCode, out ATranslatedSub Sub)
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internal bool TryGetCachedSub(AOpCode OpCode, out ATranslatedSub Sub)
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{
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if (OpCode.Emitter != AInstEmit.Bl)
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{
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@ -53,7 +53,7 @@ namespace ChocolArm64
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return TryGetCachedSub(((AOpCodeBImmAl)OpCode).Imm, out Sub);
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}
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public bool TryGetCachedSub(long Position, out ATranslatedSub Sub)
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internal bool TryGetCachedSub(long Position, out ATranslatedSub Sub)
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{
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return CachedSubs.TryGetValue(Position, out Sub);
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}
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@ -10,8 +10,6 @@ namespace ChocolArm64.Decoder
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public int Opc { get; private set; }
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public int Size { get; protected set; }
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public int SizeF => Size & 1;
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public AOpCodeSimd(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
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{
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Rd = (OpCode >> 0) & 0x1f;
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@ -265,6 +265,32 @@ namespace ChocolArm64.Instruction
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});
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}
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public static void Frintx_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
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Context.EmitLdarg(ATranslatedSub.StateArgIdx);
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Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
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if (Op.Size == 0)
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{
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.RoundF));
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}
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else if (Op.Size == 1)
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{
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Round));
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}
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else
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{
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throw new InvalidOperationException();
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}
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Fsqrt_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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@ -9,6 +9,11 @@ namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Hint(AILEmitterCtx Context)
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{
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//Execute as no-op.
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}
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public static void Mrs(AILEmitterCtx Context)
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{
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AOpCodeSystem Op = (AOpCodeSystem)Context.CurrOp;
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@ -189,6 +189,32 @@ namespace ChocolArm64.Instruction
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(Value >> 6) & 1 + (Value >> 7);
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}
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public static float RoundF(float Value, int Fpcr)
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{
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switch ((ARoundMode)((Fpcr >> 22) & 3))
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{
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case ARoundMode.ToNearest: return MathF.Round (Value);
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case ARoundMode.TowardsPlusInfinity: return MathF.Ceiling (Value);
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case ARoundMode.TowardsMinusInfinity: return MathF.Floor (Value);
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case ARoundMode.TowardsZero: return MathF.Truncate(Value);
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}
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throw new InvalidOperationException();
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}
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public static double Round(double Value, int Fpcr)
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{
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switch ((ARoundMode)((Fpcr >> 22) & 3))
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{
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case ARoundMode.ToNearest: return Math.Round (Value);
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case ARoundMode.TowardsPlusInfinity: return Math.Ceiling (Value);
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case ARoundMode.TowardsMinusInfinity: return Math.Floor (Value);
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case ARoundMode.TowardsZero: return Math.Truncate(Value);
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}
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throw new InvalidOperationException();
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}
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public static AVec Tbl1_V64(AVec Vector, AVec Tb0)
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{
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return Tbl(Vector, 8, Tb0);
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10
ChocolArm64/State/ARoundMode.cs
Normal file
10
ChocolArm64/State/ARoundMode.cs
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@ -0,0 +1,10 @@
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namespace ChocolArm64.State
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{
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public enum ARoundMode
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{
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ToNearest = 0,
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TowardsPlusInfinity = 1,
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TowardsMinusInfinity = 2,
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TowardsZero = 3
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}
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}
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@ -18,8 +18,8 @@ namespace ChocolArm64.Translation
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private AILBlock ILBlock;
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private AOpCode LastCmpOp;
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private AOpCode LastFlagOp;
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private AOpCode OptOpLastCompare;
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private AOpCode OptOpLastFlagSet;
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private int BlkIndex;
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private int OpcIndex;
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@ -75,6 +75,9 @@ namespace ChocolArm64.Translation
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BlkIndex++;
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OpcIndex = -1;
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OptOpLastFlagSet = null;
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OptOpLastCompare = null;
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ILBlock = Emitter.GetILBlock(BlkIndex);
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}
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@ -120,7 +123,7 @@ namespace ChocolArm64.Translation
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public void TryOptMarkCondWithoutCmp()
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{
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LastCmpOp = CurrOp;
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OptOpLastCompare = CurrOp;
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AInstEmitAluHelper.EmitDataLoadOpers(this);
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@ -146,14 +149,15 @@ namespace ChocolArm64.Translation
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{
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OpCode ILOp;
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int IntCond = (int)Cond;
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int IntCond = (int)Cond;
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if (LastCmpOp != null && LastFlagOp == LastCmpOp && BranchOps.ContainsKey(Cond))
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if (OptOpLastCompare != null &&
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OptOpLastCompare == OptOpLastFlagSet && BranchOps.ContainsKey(Cond))
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{
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Ldloc(Tmp3Index, AIoType.Int, LastCmpOp.RegisterSize);
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Ldloc(Tmp4Index, AIoType.Int, LastCmpOp.RegisterSize);
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Ldloc(Tmp3Index, AIoType.Int, OptOpLastCompare.RegisterSize);
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Ldloc(Tmp4Index, AIoType.Int, OptOpLastCompare.RegisterSize);
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if (LastCmpOp.Emitter == AInstEmit.Adds)
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if (OptOpLastCompare.Emitter == AInstEmit.Adds)
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{
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Emit(OpCodes.Neg);
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}
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@ -356,7 +360,7 @@ namespace ChocolArm64.Translation
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public void EmitLdflg(int Index) => Ldloc(Index, AIoType.Flag);
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public void EmitStflg(int Index)
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{
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LastFlagOp = CurrOp;
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OptOpLastFlagSet = CurrOp;
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Stloc(Index, AIoType.Flag);
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}
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@ -1,5 +1,3 @@
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using ChocolArm64.Memory;
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namespace Ryujinx.Core.OsHle
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{
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static class MemoryRegions
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@ -291,7 +291,10 @@ namespace Ryujinx.Core.OsHle.Objects.Android
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BufferQueue[Slot].State = BufferState.Free;
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WaitBufferFree.Set();
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lock (WaitBufferFree)
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{
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WaitBufferFree.Set();
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}
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});
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}
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@ -317,15 +320,15 @@ namespace Ryujinx.Core.OsHle.Objects.Android
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do
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{
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if ((Slot = GetFreeSlot(Width, Height)) != -1)
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{
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break;
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}
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Logging.Debug("Waiting for a free BufferQueue slot...");
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lock (WaitBufferFree)
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{
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if ((Slot = GetFreeSlot(Width, Height)) != -1)
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{
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break;
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}
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Logging.Debug("Waiting for a free BufferQueue slot...");
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if (!KeepRunning)
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{
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break;
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