mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-10 13:43:17 +02:00
Implement Shader Instructions SUATOM and SURED (#2090)
* Initial Implementation * Further improvements (no support for float/64-bit types) * Merge atomic and reduce instructions, add missing format switch * Fix rebase issues. * Not used. * Whoops. Fixed. * Partial implementation of inc/dec, cleanup and TODOs * Remove testing path * Address Feedback
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@ -40,7 +40,7 @@ namespace Ryujinx.Graphics.Gpu.Shader
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/// <summary>
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/// Version of the codegen (to be changed when codegen or guest format change).
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/// </summary>
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private const ulong ShaderCodeGenVersion = 2605;
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private const ulong ShaderCodeGenVersion = 2092;
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// Progress reporting helpers
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private volatile int _shaderCount;
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@ -132,9 +132,8 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
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return Call(context, operation);
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case Instruction.ImageLoad:
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return ImageLoadOrStore(context, operation);
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case Instruction.ImageStore:
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case Instruction.ImageAtomic:
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return ImageLoadOrStore(context, operation);
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case Instruction.LoadAttribute:
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@ -72,6 +72,7 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
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Add(Instruction.GroupMemoryBarrier, InstType.CallNullary, "groupMemoryBarrier");
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Add(Instruction.ImageLoad, InstType.Special);
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Add(Instruction.ImageStore, InstType.Special);
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Add(Instruction.ImageAtomic, InstType.Special);
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Add(Instruction.IsNan, InstType.CallUnary, "isnan");
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Add(Instruction.LoadAttribute, InstType.Special);
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Add(Instruction.LoadConstant, InstType.Special);
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@ -18,13 +18,39 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
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// TODO: Bindless texture support. For now we just return 0/do nothing.
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if (isBindless)
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{
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return texOp.Inst == Instruction.ImageLoad ? NumberFormatter.FormatFloat(0) : "// imageStore(bindless)";
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return texOp.Inst switch
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{
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Instruction.ImageStore => "// imageStore(bindless)",
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Instruction.ImageLoad => NumberFormatter.FormatFloat(0),
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_ => NumberFormatter.FormatInt(0)
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};
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}
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bool isArray = (texOp.Type & SamplerType.Array) != 0;
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bool isIndexed = (texOp.Type & SamplerType.Indexed) != 0;
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string texCall = texOp.Inst == Instruction.ImageLoad ? "imageLoad" : "imageStore";
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string texCall;
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if (texOp.Inst == Instruction.ImageAtomic)
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{
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texCall = (texOp.Flags & TextureFlags.AtomicMask) switch {
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TextureFlags.Add => "imageAtomicAdd",
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TextureFlags.Minimum => "imageAtomicMin",
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TextureFlags.Maximum => "imageAtomicMax",
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TextureFlags.Increment => "imageAtomicAdd", // TODO: Clamp value.
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TextureFlags.Decrement => "imageAtomicAdd", // TODO: Clamp value.
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TextureFlags.BitwiseAnd => "imageAtomicAnd",
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TextureFlags.BitwiseOr => "imageAtomicOr",
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TextureFlags.BitwiseXor => "imageAtomicXor",
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TextureFlags.Swap => "imageAtomicExchange",
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TextureFlags.CAS => "imageAtomicCompSwap",
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_ => "imageAtomicAdd",
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};
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}
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else
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{
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texCall = texOp.Inst == Instruction.ImageLoad ? "imageLoad" : "imageStore";
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}
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int srcIndex = isBindless ? 1 : 0;
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@ -95,8 +121,6 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
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if (texOp.Inst == Instruction.ImageStore)
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{
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int texIndex = context.FindImageDescriptorIndex(texOp);
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VariableType type = texOp.Format.GetComponentType();
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string[] cElems = new string[4];
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@ -128,7 +152,35 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
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Append(prefix + "vec4(" + string.Join(", ", cElems) + ")");
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}
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texCall += ")" + (texOp.Inst == Instruction.ImageLoad ? GetMask(texOp.Index) : "");
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if (texOp.Inst == Instruction.ImageAtomic)
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{
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VariableType type = texOp.Format.GetComponentType();
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if ((texOp.Flags & TextureFlags.AtomicMask) == TextureFlags.CAS)
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{
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Append(Src(type)); // Compare value.
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}
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string value = (texOp.Flags & TextureFlags.AtomicMask) switch
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{
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TextureFlags.Increment => NumberFormatter.FormatInt(1, type), // TODO: Clamp value
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TextureFlags.Decrement => NumberFormatter.FormatInt(-1, type), // TODO: Clamp value
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_ => Src(type)
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};
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Append(value);
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texCall += ")";
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if (type != VariableType.S32)
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{
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texCall = "int(" + texCall + ")";
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}
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}
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else
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{
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texCall += ")" + (texOp.Inst == Instruction.ImageLoad ? GetMask(texOp.Index) : "");
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}
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return texCall;
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}
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@ -362,7 +362,8 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl
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}
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else if (operation is AstTextureOperation texOp &&
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(texOp.Inst == Instruction.ImageLoad ||
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texOp.Inst == Instruction.ImageStore))
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texOp.Inst == Instruction.ImageStore ||
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texOp.Inst == Instruction.ImageAtomic))
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{
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return texOp.Format.GetComponentType();
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}
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46
Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs
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46
Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs
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@ -0,0 +1,46 @@
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using Ryujinx.Graphics.Shader.Instructions;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeSuatom : OpCodeTextureBase
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{
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public Register Rd { get; }
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public Register Ra { get; }
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public Register Rb { get; }
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public Register Rc { get; }
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public ReductionType Type { get; }
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public AtomicOp AtomicOp { get; }
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public ImageDimensions Dimensions { get; }
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public ClampMode ClampMode { get; }
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public bool ByteAddress { get; }
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public bool UseType { get; }
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public bool IsBindless { get; }
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public bool CompareAndSwap { get; }
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public new static OpCode Create(InstEmitter emitter, ulong address, long opCode) => new OpCodeSuatom(emitter, address, opCode);
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public OpCodeSuatom(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Rd = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
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Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
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Rb = new Register(opCode.Extract(20, 8), RegisterType.Gpr);
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Rc = new Register(opCode.Extract(39, 8), RegisterType.Gpr);
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bool supportsBindless = opCode.Extract(54);
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Type = (ReductionType)opCode.Extract(supportsBindless ? 36 : 51, 3);
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ByteAddress = opCode.Extract(28);
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AtomicOp = (AtomicOp)opCode.Extract(29, 4); // Only useful if CAS is not true.
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Dimensions = (ImageDimensions)opCode.Extract(33, 3);
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ClampMode = (ClampMode)opCode.Extract(49, 2);
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IsBindless = supportsBindless && !opCode.Extract(51);
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UseType = !supportsBindless || opCode.Extract(52);
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CompareAndSwap = opCode.Extract(55);
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}
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}
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}
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Ryujinx.Graphics.Shader/Decoders/OpCodeSured.cs
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44
Ryujinx.Graphics.Shader/Decoders/OpCodeSured.cs
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@ -0,0 +1,44 @@
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using Ryujinx.Graphics.Shader.Instructions;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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enum ClampMode
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{
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Ignore = 0,
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Trap = 2
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}
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class OpCodeSured : OpCodeTextureBase
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{
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public Register Ra { get; }
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public Register Rb { get; }
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public Register Rc { get; }
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public ReductionType Type { get; }
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public AtomicOp AtomicOp { get; }
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public ImageDimensions Dimensions { get; }
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public ClampMode ClampMode { get; }
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public bool UseType { get; }
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public bool IsBindless { get; }
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public bool ByteAddress { get; }
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public new static OpCode Create(InstEmitter emitter, ulong address, long opCode) => new OpCodeSured(emitter, address, opCode);
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public OpCodeSured(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
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Rb = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
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Rc = new Register(opCode.Extract(39, 8), RegisterType.Gpr);
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Type = (ReductionType)opCode.Extract(20, 3);
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ByteAddress = opCode.Extract(23);
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AtomicOp = (AtomicOp)opCode.Extract(24, 3);
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Dimensions = (ImageDimensions)opCode.Extract(33, 3);
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ClampMode = (ClampMode)opCode.Extract(49, 2);
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IsBindless = !opCode.Extract(51);
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UseType = opCode.Extract(52);
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}
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}
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}
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@ -209,6 +209,11 @@ namespace Ryujinx.Graphics.Shader.Decoders
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Set("1110111101011x", InstEmit.Sts, OpCodeMemory.Create);
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Set("11101011000xxx", InstEmit.Suld, OpCodeImage.Create);
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Set("11101011001xxx", InstEmit.Sust, OpCodeImage.Create);
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Set("11101011010xxx", InstEmit.Sured, OpCodeSured.Create);
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Set("11101010110xxx", InstEmit.Suatom, OpCodeSuatom.Create);
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Set("1110101010xxxx", InstEmit.Suatom, OpCodeSuatom.Create);
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Set("11101010011xxx", InstEmit.Suatom, OpCodeSuatom.Create);
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Set("1110101000xxxx", InstEmit.Suatom, OpCodeSuatom.Create);
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Set("1111000011111x", InstEmit.Sync, OpCodeBranchPop.Create);
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Set("110000xxxx111x", InstEmit.Tex, OpCodeTex.Create);
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Set("1101111010111x", InstEmit.TexB, OpCodeTexB.Create);
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@ -7,6 +7,8 @@ namespace Ryujinx.Graphics.Shader.Decoders
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U64 = 2,
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FP32FtzRn = 3,
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FP16x2FtzRn = 4,
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S64 = 5
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S64 = 5,
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SD32 = 6,
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SD64 = 7
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}
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}
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@ -277,6 +277,249 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.Add(operation);
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}
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public static void Sured(EmitterContext context)
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{
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OpCodeSured op = (OpCodeSured)context.CurrOp;
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SamplerType type = ConvertSamplerType(op.Dimensions);
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if (type == SamplerType.None)
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{
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context.Config.GpuAccessor.Log("Invalid image reduction sampler type.");
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return;
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}
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int raIndex = op.Ra.Index;
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int rbIndex = op.Rb.Index;
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Operand Ra()
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{
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if (raIndex > RegisterConsts.RegisterZeroIndex)
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{
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return Const(0);
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}
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return context.Copy(Register(raIndex++, RegisterType.Gpr));
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}
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Operand Rb()
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{
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if (rbIndex > RegisterConsts.RegisterZeroIndex)
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{
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return Const(0);
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}
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return context.Copy(Register(rbIndex++, RegisterType.Gpr));
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}
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List<Operand> sourcesList = new List<Operand>();
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if (op.IsBindless)
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{
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sourcesList.Add(context.Copy(Register(op.Rc)));
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}
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int coordsCount = type.GetDimensions();
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for (int index = 0; index < coordsCount; index++)
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{
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sourcesList.Add(Ra());
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}
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if (Sample1DAs2D && (type & SamplerType.Mask) == SamplerType.Texture1D)
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{
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sourcesList.Add(Const(0));
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type &= ~SamplerType.Mask;
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type |= SamplerType.Texture2D;
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}
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if (type.HasFlag(SamplerType.Array))
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{
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sourcesList.Add(Ra());
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type |= SamplerType.Array;
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}
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TextureFormat format = TextureFormat.R32Sint;
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if (op.UseType)
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{
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if (op.ByteAddress)
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{
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int xIndex = op.IsBindless ? 1 : 0;
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sourcesList[xIndex] = context.ShiftRightS32(sourcesList[xIndex], Const(GetComponentSizeInBytesLog2(op.Type)));
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}
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// TODO: FP and 64-bit formats.
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format = (op.Type == ReductionType.SD32 || op.Type == ReductionType.SD64) ?
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context.Config.GetTextureFormatAtomic(op.HandleOffset) :
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GetTextureFormat(op.Type);
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}
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else if (!op.IsBindless)
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{
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format = context.Config.GetTextureFormatAtomic(op.HandleOffset);
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}
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sourcesList.Add(Rb());
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Operand[] sources = sourcesList.ToArray();
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int handle = op.HandleOffset;
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TextureFlags flags = GetAtomicOpFlags(op.AtomicOp);
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if (op.IsBindless)
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{
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handle = 0;
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flags |= TextureFlags.Bindless;
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}
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TextureOperation operation = context.CreateTextureOperation(
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Instruction.ImageAtomic,
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type,
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format,
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flags,
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handle,
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0,
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null,
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sources);
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context.Add(operation);
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}
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public static void Suatom(EmitterContext context)
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{
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OpCodeSuatom op = (OpCodeSuatom)context.CurrOp;
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SamplerType type = ConvertSamplerType(op.Dimensions);
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if (type == SamplerType.None)
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{
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context.Config.GpuAccessor.Log("Invalid image atomic sampler type.");
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return;
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}
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int raIndex = op.Ra.Index;
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int rbIndex = op.Rb.Index;
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Operand Ra()
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{
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if (raIndex > RegisterConsts.RegisterZeroIndex)
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{
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return Const(0);
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}
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return context.Copy(Register(raIndex++, RegisterType.Gpr));
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}
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Operand Rb()
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{
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if (rbIndex > RegisterConsts.RegisterZeroIndex)
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{
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return Const(0);
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}
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return context.Copy(Register(rbIndex++, RegisterType.Gpr));
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}
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int rdIndex = op.Rd.Index;
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Operand GetDest()
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{
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if (rdIndex > RegisterConsts.RegisterZeroIndex)
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{
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return Const(0);
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}
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return Register(rdIndex++, RegisterType.Gpr);
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}
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List<Operand> sourcesList = new List<Operand>();
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if (op.IsBindless)
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{
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sourcesList.Add(context.Copy(Register(op.Rc)));
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}
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int coordsCount = type.GetDimensions();
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for (int index = 0; index < coordsCount; index++)
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{
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sourcesList.Add(Ra());
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}
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if (Sample1DAs2D && (type & SamplerType.Mask) == SamplerType.Texture1D)
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{
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sourcesList.Add(Const(0));
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type &= ~SamplerType.Mask;
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type |= SamplerType.Texture2D;
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}
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if (type.HasFlag(SamplerType.Array))
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{
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sourcesList.Add(Ra());
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type |= SamplerType.Array;
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}
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TextureFormat format = TextureFormat.R32Sint;
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if (op.UseType)
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{
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if (op.ByteAddress)
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{
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int xIndex = op.IsBindless ? 1 : 0;
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sourcesList[xIndex] = context.ShiftRightS32(sourcesList[xIndex], Const(GetComponentSizeInBytesLog2(op.Type)));
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}
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// TODO: FP and 64-bit formats.
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format = (op.Type == ReductionType.SD32 || op.Type == ReductionType.SD64) ?
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context.Config.GetTextureFormatAtomic(op.HandleOffset) :
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GetTextureFormat(op.Type);
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}
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else if (!op.IsBindless)
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{
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format = context.Config.GetTextureFormatAtomic(op.HandleOffset);
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}
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if (op.CompareAndSwap)
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{
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sourcesList.Add(Rb());
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}
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sourcesList.Add(Rb());
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Operand[] sources = sourcesList.ToArray();
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int handle = op.HandleOffset;
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TextureFlags flags = op.CompareAndSwap ? TextureFlags.CAS : GetAtomicOpFlags(op.AtomicOp);
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if (op.IsBindless)
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{
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handle = 0;
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flags |= TextureFlags.Bindless;
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}
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TextureOperation operation = context.CreateTextureOperation(
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Instruction.ImageAtomic,
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type,
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format,
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flags,
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handle,
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0,
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GetDest(),
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sources);
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context.Add(operation);
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}
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public static void Tex(EmitterContext context)
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{
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EmitTextureSample(context, TextureFlags.None);
|
||||
@ -1332,6 +1575,55 @@ namespace Ryujinx.Graphics.Shader.Instructions
|
||||
};
|
||||
}
|
||||
|
||||
private static int GetComponentSizeInBytesLog2(ReductionType type)
|
||||
{
|
||||
return type switch
|
||||
{
|
||||
ReductionType.U32 => 2,
|
||||
ReductionType.S32 => 2,
|
||||
ReductionType.U64 => 3,
|
||||
ReductionType.FP32FtzRn => 2,
|
||||
ReductionType.FP16x2FtzRn => 2,
|
||||
ReductionType.S64 => 3,
|
||||
ReductionType.SD32 => 2,
|
||||
ReductionType.SD64 => 3,
|
||||
_ => 2
|
||||
};
|
||||
}
|
||||
|
||||
private static TextureFormat GetTextureFormat(ReductionType type)
|
||||
{
|
||||
return type switch
|
||||
{
|
||||
ReductionType.U32 => TextureFormat.R32Uint,
|
||||
ReductionType.S32 => TextureFormat.R32Sint,
|
||||
ReductionType.U64 => TextureFormat.R32G32Uint,
|
||||
ReductionType.FP32FtzRn => TextureFormat.R32Float,
|
||||
ReductionType.FP16x2FtzRn => TextureFormat.R16G16Float,
|
||||
ReductionType.S64 => TextureFormat.R32G32Uint,
|
||||
ReductionType.SD32 => TextureFormat.R32Uint,
|
||||
ReductionType.SD64 => TextureFormat.R32G32Uint,
|
||||
_ => TextureFormat.R32Uint
|
||||
};
|
||||
}
|
||||
|
||||
private static TextureFlags GetAtomicOpFlags(AtomicOp op)
|
||||
{
|
||||
return op switch
|
||||
{
|
||||
AtomicOp.Add => TextureFlags.Add,
|
||||
AtomicOp.Minimum => TextureFlags.Minimum,
|
||||
AtomicOp.Maximum => TextureFlags.Maximum,
|
||||
AtomicOp.Increment => TextureFlags.Increment,
|
||||
AtomicOp.Decrement => TextureFlags.Decrement,
|
||||
AtomicOp.BitwiseAnd => TextureFlags.BitwiseAnd,
|
||||
AtomicOp.BitwiseOr => TextureFlags.BitwiseOr,
|
||||
AtomicOp.BitwiseExclusiveOr => TextureFlags.BitwiseXor,
|
||||
AtomicOp.Swap => TextureFlags.Swap,
|
||||
_ => TextureFlags.Add
|
||||
};
|
||||
}
|
||||
|
||||
private static SamplerType ConvertSamplerType(ImageDimensions target)
|
||||
{
|
||||
return target switch
|
||||
|
@ -69,6 +69,7 @@ namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
|
||||
GroupMemoryBarrier,
|
||||
ImageLoad,
|
||||
ImageStore,
|
||||
ImageAtomic,
|
||||
IsNan,
|
||||
LoadAttribute,
|
||||
LoadConstant,
|
||||
|
@ -13,6 +13,19 @@ namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
|
||||
LodBias = 1 << 4,
|
||||
LodLevel = 1 << 5,
|
||||
Offset = 1 << 6,
|
||||
Offsets = 1 << 7
|
||||
Offsets = 1 << 7,
|
||||
|
||||
AtomicMask = 15 << 16,
|
||||
|
||||
Add = 0 << 16,
|
||||
Minimum = 1 << 16,
|
||||
Maximum = 2 << 16,
|
||||
Increment = 3 << 16,
|
||||
Decrement = 4 << 16,
|
||||
BitwiseAnd = 5 << 16,
|
||||
BitwiseOr = 6 << 16,
|
||||
BitwiseXor = 7 << 16,
|
||||
Swap = 8 << 16,
|
||||
CAS = 9 << 16
|
||||
}
|
||||
}
|
@ -81,6 +81,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
|
||||
Add(Instruction.FusedMultiplyAdd, VariableType.Scalar, VariableType.Scalar, VariableType.Scalar, VariableType.Scalar);
|
||||
Add(Instruction.ImageLoad, VariableType.F32);
|
||||
Add(Instruction.ImageStore, VariableType.None);
|
||||
Add(Instruction.ImageAtomic, VariableType.S32);
|
||||
Add(Instruction.IsNan, VariableType.Bool, VariableType.F32);
|
||||
Add(Instruction.LoadAttribute, VariableType.F32, VariableType.S32, VariableType.S32, VariableType.S32);
|
||||
Add(Instruction.LoadConstant, VariableType.F32, VariableType.S32, VariableType.S32);
|
||||
@ -146,9 +147,10 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
|
||||
{
|
||||
// TODO: Return correct type depending on source index,
|
||||
// that can improve the decompiler output.
|
||||
if (inst == Instruction.ImageLoad ||
|
||||
inst == Instruction.ImageStore ||
|
||||
inst == Instruction.Lod ||
|
||||
if (inst == Instruction.ImageLoad ||
|
||||
inst == Instruction.ImageStore ||
|
||||
inst == Instruction.ImageAtomic ||
|
||||
inst == Instruction.Lod ||
|
||||
inst == Instruction.TextureSample)
|
||||
{
|
||||
return VariableType.F32;
|
||||
|
@ -61,7 +61,9 @@ namespace Ryujinx.Graphics.Shader.Translation.Optimizations
|
||||
src0.GetCbufOffset() | ((src1.GetCbufOffset() + 1) << 16),
|
||||
src0.GetCbufSlot() | ((src1.GetCbufSlot() + 1) << 16));
|
||||
}
|
||||
else if (texOp.Inst == Instruction.ImageLoad || texOp.Inst == Instruction.ImageStore)
|
||||
else if (texOp.Inst == Instruction.ImageLoad ||
|
||||
texOp.Inst == Instruction.ImageStore ||
|
||||
texOp.Inst == Instruction.ImageAtomic)
|
||||
{
|
||||
Operand src0 = Utils.FindLastOperation(texOp.GetSource(0), block);
|
||||
|
||||
@ -69,7 +71,16 @@ namespace Ryujinx.Graphics.Shader.Translation.Optimizations
|
||||
{
|
||||
int cbufOffset = src0.GetCbufOffset();
|
||||
int cbufSlot = src0.GetCbufSlot();
|
||||
texOp.Format = config.GetTextureFormat(cbufOffset, cbufSlot);
|
||||
|
||||
if (texOp.Inst == Instruction.ImageAtomic)
|
||||
{
|
||||
texOp.Format = config.GetTextureFormatAtomic(cbufOffset, cbufSlot);
|
||||
}
|
||||
else
|
||||
{
|
||||
texOp.Format = config.GetTextureFormat(cbufOffset, cbufSlot);
|
||||
}
|
||||
|
||||
SetHandle(config, texOp, cbufOffset, cbufSlot);
|
||||
}
|
||||
}
|
||||
|
@ -278,6 +278,7 @@ namespace Ryujinx.Graphics.Shader.Translation.Optimizations
|
||||
case Instruction.AtomicSwap:
|
||||
case Instruction.AtomicXor:
|
||||
case Instruction.Call:
|
||||
case Instruction.ImageAtomic:
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
@ -162,6 +162,28 @@ namespace Ryujinx.Graphics.Shader.Translation
|
||||
return format;
|
||||
}
|
||||
|
||||
private bool FormatSupportsAtomic(TextureFormat format)
|
||||
{
|
||||
return format == TextureFormat.R32Sint || format == TextureFormat.R32Uint;
|
||||
}
|
||||
|
||||
public TextureFormat GetTextureFormatAtomic(int handle, int cbufSlot = -1)
|
||||
{
|
||||
// Atomic image instructions do not support GL_EXT_shader_image_load_formatted,
|
||||
// and must have a type specified. Default to R32Sint if not available.
|
||||
|
||||
var format = GpuAccessor.QueryTextureFormat(handle, cbufSlot);
|
||||
|
||||
if (!FormatSupportsAtomic(format))
|
||||
{
|
||||
GpuAccessor.Log($"Unsupported format for texture {handle}: {format}.");
|
||||
|
||||
format = TextureFormat.R32Sint;
|
||||
}
|
||||
|
||||
return format;
|
||||
}
|
||||
|
||||
public void SizeAdd(int size)
|
||||
{
|
||||
Size += size;
|
||||
@ -270,8 +292,8 @@ namespace Ryujinx.Graphics.Shader.Translation
|
||||
int handle)
|
||||
{
|
||||
inst &= Instruction.Mask;
|
||||
bool isImage = inst == Instruction.ImageLoad || inst == Instruction.ImageStore;
|
||||
bool isWrite = inst == Instruction.ImageStore;
|
||||
bool isImage = inst == Instruction.ImageLoad || inst == Instruction.ImageStore || inst == Instruction.ImageAtomic;
|
||||
bool isWrite = inst == Instruction.ImageStore || inst == Instruction.ImageAtomic;
|
||||
bool accurateType = inst != Instruction.TextureSize && inst != Instruction.Lod;
|
||||
|
||||
if (isImage)
|
||||
|
Loading…
Reference in New Issue
Block a user