mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-10 13:43:17 +02:00
Removed parts of the MMU functionality to use memory directly (faster, but potentially more dangerous, WIP), also changed the Shl/Sshr immediate instructions to use IL instead of calling the method
This commit is contained in:
parent
d77d691381
commit
18ac1c4045
16
GLScreen.cs
16
GLScreen.cs
@ -6,6 +6,7 @@ using Gal;
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using OpenTK;
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using OpenTK.Graphics;
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using OpenTK.Graphics.OpenGL;
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using Ryujinx.OsHle;
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using System;
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namespace Ryujinx
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@ -60,12 +61,14 @@ namespace Ryujinx
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unsafe void UploadBitmap()
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{
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if (Renderer.FrameBufferPtr == 0)
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int FbSize = Width * Height * 4;
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if (Renderer.FrameBufferPtr == 0 || Renderer.FrameBufferPtr + FbSize > uint.MaxValue)
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{
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return;
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}
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byte* SrcPtr = (byte*)IntPtr.Add(Ns.Ram, (int)Renderer.FrameBufferPtr);
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byte* SrcPtr = (byte*)Ns.Ram + (uint)Renderer.FrameBufferPtr;
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for (int Y = 0; Y < Height; Y++)
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{
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@ -275,7 +278,14 @@ void main(void) {
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{
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unsafe
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{
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byte* Ptr = (byte*)IntPtr.Add(Ns.Ram, (int)Ns.Os.HidOffset);
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long HidOffset = Ns.Os.GetVirtHidOffset();
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if (HidOffset == 0 || HidOffset + Horizon.HidSize > uint.MaxValue)
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{
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return;
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}
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byte* Ptr = (byte*)Ns.Ram + (uint)HidOffset;
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int State = 0;
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@ -361,15 +361,7 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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Context.EmitLdvec(Op.Rn);
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Context.EmitLdc_I4(Op.Imm - (8 << Op.Size));
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Context.EmitLdc_I4(Op.Size);
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ASoftFallback.EmitCall(Context,
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nameof(ASoftFallback.Shl64),
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nameof(ASoftFallback.Shl128));
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Context.EmitStvec(Op.Rd);
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EmitVectorImmBinaryZx(Context, OpCodes.Shl, Op.Imm - (8 << Op.Size));
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}
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public static void Smax_V(AILEmitterCtx Context) => EmitVectorSmax(Context);
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@ -396,15 +388,7 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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Context.EmitLdvec(Op.Rn);
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Context.EmitLdc_I4((8 << (Op.Size + 1)) - Op.Imm);
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Context.EmitLdc_I4(Op.Size);
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ASoftFallback.EmitCall(Context,
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nameof(ASoftFallback.Sshr64),
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nameof(ASoftFallback.Sshr128));
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Context.EmitStvec(Op.Rd);
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EmitVectorImmBinarySx(Context, OpCodes.Shr, (8 << (Op.Size + 1)) - Op.Imm);
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}
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public static void St__V(AILEmitterCtx Context) => EmitSimdMultLdSt(Context, IsLoad: false);
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@ -881,6 +865,55 @@ namespace ChocolArm64.Instruction
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}
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}
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private static void EmitVectorImmBinarySx(AILEmitterCtx Context, OpCode ILOp, long Imm)
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{
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EmitVectorImmBinarySx(Context, () => Context.Emit(ILOp), Imm);
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}
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private static void EmitVectorImmBinaryZx(AILEmitterCtx Context, OpCode ILOp, long Imm)
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{
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EmitVectorImmBinaryZx(Context, () => Context.Emit(ILOp), Imm);
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}
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private static void EmitVectorImmBinarySx(AILEmitterCtx Context, Action Emit, long Imm)
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{
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EmitVectorImmBinaryOp(Context, Emit, Imm, true);
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}
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private static void EmitVectorImmBinaryZx(AILEmitterCtx Context, Action Emit, long Imm)
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{
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EmitVectorImmBinaryOp(Context, Emit, Imm, false);
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}
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private static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit, long Imm, bool Signed)
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
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{
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Context.EmitLdvec(Op.Rd);
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Context.EmitLdc_I4(Index);
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Context.EmitLdc_I4(Op.Size);
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EmitVectorExtract(Context, Op.Rn, Index, Signed);
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Context.EmitLdc_I8(Imm);
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Emit();
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.InsertVec));
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Context.EmitStvec(Op.Rd);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitVectorCmp(AILEmitterCtx Context, OpCode ILOp)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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@ -936,7 +969,7 @@ namespace ChocolArm64.Instruction
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private static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, bool Signed)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
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Context.EmitLdvec(Reg);
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Context.EmitLdc_I4(Index);
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@ -790,32 +790,6 @@ namespace ChocolArm64.Instruction
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return Res;
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}
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public static AVec Shl64(AVec Vector, int Shift, int Size)
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{
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return Shl(Vector, Shift, Size, 8);
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}
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public static AVec Shl128(AVec Vector, int Shift, int Size)
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{
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return Shl(Vector, Shift, Size, 16);
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}
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private static AVec Shl(AVec Vector, int Shift, int Size, int Bytes)
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{
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AVec Res = new AVec();
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int Elems = Bytes >> Size;
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for (int Index = 0; Index < Elems; Index++)
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{
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ulong Value = ExtractVec(Vector, Index, Size);
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Res = InsertVec(Res, Index, Size, Value << Shift);
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}
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return Res;
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}
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public static AVec Sshll(AVec Vector, int Shift, int Size)
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{
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return Sshll_(Vector, Shift, Size, false);
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@ -843,32 +817,6 @@ namespace ChocolArm64.Instruction
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return Res;
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}
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public static AVec Sshr64(AVec Vector, int Shift, int Size)
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{
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return Sshr(Vector, Shift, Size, 8);
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}
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public static AVec Sshr128(AVec Vector, int Shift, int Size)
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{
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return Sshr(Vector, Shift, Size, 16);
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}
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private static AVec Sshr(AVec Vector, int Shift, int Size, int Bytes)
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{
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AVec Res = new AVec();
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int Elems = Bytes >> Size;
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for (int Index = 0; Index < Elems; Index++)
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{
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long Value = ExtractSVec(Vector, Index, Size);
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Res = InsertSVec(Res, Index, Size, Value >> Shift);
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}
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return Res;
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}
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public static AVec Tbl1_V64(AVec Vector, AVec Tb0)
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{
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return Tbl(Vector, 8, Tb0);
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@ -119,55 +119,22 @@ namespace ChocolArm64.Memory
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public byte ReadByte(long Position)
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{
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return *((byte*)(RamPtr + Manager.GetPhys(Position, AMemoryPerm.Read)));
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return *((byte*)(RamPtr + (uint)Position));
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}
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public ushort ReadUInt16(long Position)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Read);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 2))
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{
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return *((ushort*)(RamPtr + PhysPos));
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}
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else
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{
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return (ushort)(
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ReadByte(Position + 0) << 0 |
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ReadByte(Position + 1) << 8);
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}
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return *((ushort*)(RamPtr + (uint)Position));
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}
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public uint ReadUInt32(long Position)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Read);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 4))
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{
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return *((uint*)(RamPtr + PhysPos));
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}
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else
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{
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return (uint)(
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ReadUInt16(Position + 0) << 0 |
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ReadUInt16(Position + 2) << 16);
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}
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return *((uint*)(RamPtr + (uint)Position));
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}
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public ulong ReadUInt64(long Position)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Read);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 8))
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{
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return *((ulong*)(RamPtr + PhysPos));
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}
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else
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{
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return
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(ulong)ReadUInt32(Position + 0) << 0 |
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(ulong)ReadUInt32(Position + 4) << 32;
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}
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return *((ulong*)(RamPtr + (uint)Position));
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}
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public AVec ReadVector128(long Position)
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@ -186,52 +153,22 @@ namespace ChocolArm64.Memory
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public void WriteByte(long Position, byte Value)
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{
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*((byte*)(RamPtr + Manager.GetPhys(Position, AMemoryPerm.Write))) = Value;
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*((byte*)(RamPtr + (uint)Position)) = Value;
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}
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public void WriteUInt16(long Position, ushort Value)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Write);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 2))
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{
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*((ushort*)(RamPtr + PhysPos)) = Value;
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}
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else
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{
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WriteByte(Position + 0, (byte)(Value >> 0));
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WriteByte(Position + 1, (byte)(Value >> 8));
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}
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*((ushort*)(RamPtr + (uint)Position)) = Value;
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}
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public void WriteUInt32(long Position, uint Value)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Write);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 4))
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{
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*((uint*)(RamPtr + PhysPos)) = Value;
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}
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else
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{
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WriteUInt16(Position + 0, (ushort)(Value >> 0));
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WriteUInt16(Position + 2, (ushort)(Value >> 16));
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}
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*((uint*)(RamPtr + (uint)Position)) = Value;
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}
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public void WriteUInt64(long Position, ulong Value)
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{
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long PhysPos = Manager.GetPhys(Position, AMemoryPerm.Write);
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if (BitConverter.IsLittleEndian && !IsPageCrossed(Position, 8))
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{
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*((ulong*)(RamPtr + PhysPos)) = Value;
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}
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else
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{
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WriteUInt32(Position + 0, (uint)(Value >> 0));
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WriteUInt32(Position + 4, (uint)(Value >> 32));
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}
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*((ulong*)(RamPtr + (uint)Position)) = Value;
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}
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public void WriteVector128(long Position, AVec Value)
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@ -6,8 +6,8 @@ namespace ChocolArm64.Memory
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{
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public class AMemoryMgr
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{
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public const long AddrSize = 1L << 36;
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public const long RamSize = 2L * 1024 * 1024 * 1024;
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public const long AddrSize = RamSize;
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public const long RamSize = 4L * 1024 * 1024 * 1024;
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private const int PTLvl0Bits = 11;
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private const int PTLvl1Bits = 13;
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@ -117,7 +117,7 @@ namespace ChocolArm64.Memory
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while ((ulong)Size < (ulong)HeapSize)
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{
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Allocator.Free(GetPhys(Position, AMemoryPerm.None));
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Allocator.Free(Position);
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Position += PageSize;
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}
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@ -254,38 +254,6 @@ namespace ChocolArm64.Memory
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return new AMemoryMapInfo(Start, Size, BaseEntry.Type, BaseEntry.Perm);
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public long GetPhys(long Position, AMemoryPerm Perm)
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{
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if (!HasPTEntry(Position))
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{
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if (Position < 0x08000000)
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{
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Console.WriteLine($"HACK: Ignoring bad access at {Position:x16}");
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return 0;
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}
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throw new VmmPageFaultException(Position);
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}
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PTEntry Entry = GetPTEntry(Position);
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long AbsPos = Entry.Position + (Position & PageMask);
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if (Entry.Map == PTMap.Mirror)
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{
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return GetPhys(AbsPos, Perm);
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}
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if (Entry.Map == PTMap.Unmapped)
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{
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throw new VmmPageFaultException(Position);
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}
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return AbsPos;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool HasPTEntry(long Position)
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{
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@ -3,6 +3,7 @@ namespace Ryujinx.OsHle.Handles
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class HSharedMem
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{
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public long PhysPos { get; private set; }
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public long VirtPos { get; set; }
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public HSharedMem(long PhysPos)
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{
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@ -9,15 +9,13 @@ namespace Ryujinx.OsHle.Handles
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public long Position { get; private set; }
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public long Size { get; private set; }
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public long PhysPos { get; private set; }
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public HTransferMem(AMemory Memory, AMemoryPerm Perm, long Position, long Size, long PhysPos)
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public HTransferMem(AMemory Memory, AMemoryPerm Perm, long Position, long Size)
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{
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this.Memory = Memory;
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this.Perm = Perm;
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this.Position = Position;
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this.Size = Size;
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this.PhysPos = PhysPos;
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}
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}
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}
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@ -159,5 +159,12 @@ namespace Ryujinx.OsHle
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Handles.Delete(Handle);
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}
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public long GetVirtHidOffset()
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{
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HSharedMem HidSharedMem = Handles.GetData<HSharedMem>(HidHandle);
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return HidSharedMem.VirtPos;
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}
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}
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}
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@ -155,8 +155,7 @@ namespace Ryujinx.OsHle.Objects
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HNvMap NvMap = Context.Ns.Os.Handles.GetData<HNvMap>(Handle);
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Context.Ns.Gpu.Renderer.FrameBufferPtr =
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Context.Memory.Manager.GetPhys(NvMap.Address, AMemoryPerm.Read);
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Context.Ns.Gpu.Renderer.FrameBufferPtr = NvMap.Address;
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}
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return MakeReplyParcel(Context, 0);
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@ -77,6 +77,8 @@ namespace Ryujinx.OsHle.Svc
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long Src = Position;
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long Dst = HndData.PhysPos;
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HndData.VirtPos = Src;
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if (Memory.Manager.MapPhys(Src, Dst, Size,
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(int)MemoryType.SharedMemory, (AMemoryPerm)Perm))
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{
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@ -113,9 +115,7 @@ namespace Ryujinx.OsHle.Svc
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Memory.Manager.Reprotect(Position, Size, (AMemoryPerm)Perm);
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long PhysPos = Memory.Manager.GetPhys(Position, AMemoryPerm.None);
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HTransferMem HndData = new HTransferMem(Memory, MapInfo.Perm, Position, Size, PhysPos);
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HTransferMem HndData = new HTransferMem(Memory, MapInfo.Perm, Position, Size);
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int Handle = Ns.Os.Handles.GenerateId(HndData);
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