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Add FMLS (vector) instruction
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2fd718c163
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@ -213,6 +213,8 @@ namespace ChocolArm64
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Set("000111100x1xxxxx011110xxxxxxxxxx", AInstEmit.Fminnm_S, typeof(AOpCodeSimdReg));
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Set("0>0011100<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmla_V, typeof(AOpCodeSimdReg));
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Set("0x0011111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Ve, typeof(AOpCodeSimdRegElemF));
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Set("0>0011101<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmls_V, typeof(AOpCodeSimdReg));
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Set("0x0011111<<xxxxx0101x0xxxxxxxxxx", AInstEmit.Fmls_Ve, typeof(AOpCodeSimdRegElemF));
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Set("000111100x100000010000xxxxxxxxxx", AInstEmit.Fmov_S, typeof(AOpCodeSimd));
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Set("00011110xx1xxxxxxxx100xxxxxxxxxx", AInstEmit.Fmov_Si, typeof(AOpCodeSimdFmov));
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Set("0xx0111100000xxx111101xxxxxxxxxx", AInstEmit.Fmov_V, typeof(AOpCodeSimdImm));
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@ -224,6 +224,24 @@ namespace ChocolArm64.Instruction
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});
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}
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public static void Fmls_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmls_Ve(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmsub_S(AILEmitterCtx Context)
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{
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EmitScalarTernaryRaOpF(Context, () =>
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@ -140,26 +140,6 @@ namespace ChocolArm64.Instruction
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EmitVectorFcmp(Context, OpCodes.Bgt_S);
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}
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public static void Fcmhi_S(AILEmitterCtx Context)
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{
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EmitScalarFcmp(Context, OpCodes.Bgt_Un_S);
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}
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public static void Fcmhi_V(AILEmitterCtx Context)
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{
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EmitVectorFcmp(Context, OpCodes.Bgt_Un_S);
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}
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public static void Fcmhs_S(AILEmitterCtx Context)
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{
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EmitScalarFcmp(Context, OpCodes.Bge_Un_S);
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}
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public static void Fcmhs_V(AILEmitterCtx Context)
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{
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EmitVectorFcmp(Context, OpCodes.Bge_Un_S);
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}
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public static void Fcmle_S(AILEmitterCtx Context)
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{
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EmitScalarFcmp(Context, OpCodes.Ble_S);
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