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Add MLS (vector) instruction, fix mistake introduced on last commit
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@ -203,6 +203,7 @@ namespace ChocolArm64
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Set("xx111100x11xxxxxxxxx10xxxxxxxxxx", AInstEmit.Ldr, typeof(AOpCodeSimdMemReg));
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Set("xx011100xxxxxxxxxxxxxxxxxxxxxxxx", AInstEmit.LdrLit, typeof(AOpCodeSimdMemLit));
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Set("0x001110<<1xxxxx100101xxxxxxxxxx", AInstEmit.Mla_V, typeof(AOpCodeSimdReg));
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Set("0x101110<<1xxxxx100101xxxxxxxxxx", AInstEmit.Mls_V, typeof(AOpCodeSimdReg));
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Set("0x00111100000xxx0xx001xxxxxxxxxx", AInstEmit.Movi_V, typeof(AOpCodeSimdImm));
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Set("0x00111100000xxx10x001xxxxxxxxxx", AInstEmit.Movi_V, typeof(AOpCodeSimdImm));
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Set("0x00111100000xxx110x01xxxxxxxxxx", AInstEmit.Movi_V, typeof(AOpCodeSimdImm));
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@ -182,8 +182,7 @@ namespace ChocolArm64.Instruction
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EmitScalarTernaryRaOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Neg);
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Context.Emit(OpCodes.Add);
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Context.Emit(OpCodes.Sub);
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});
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}
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@ -262,6 +261,15 @@ namespace ChocolArm64.Instruction
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});
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}
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public static void Mls_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpZx(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Mul_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
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@ -210,14 +210,14 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
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EmitVectorOpByElemF(Context, Emit, Op.Index);
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EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: false);
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}
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public static void EmitVectorTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
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{
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AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
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EmitVectorOpByElemF(Context, Emit, Op.Index);
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EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: true);
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}
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public static void EmitVectorOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
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@ -256,7 +256,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem)
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public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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@ -266,6 +266,11 @@ namespace ChocolArm64.Instruction
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for (int Index = 0; Index < (Bytes >> SizeF + 2); Index++)
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{
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if (Ternary)
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{
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EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
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}
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EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
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EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
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