mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-10 13:43:17 +02:00
Optimize address translation and write tracking on the MMU (#571)
* Implement faster address translation and write tracking on the MMU * Rename MemoryAlloc to MemoryManagement, and other nits * Support multi-level page tables * Fix typo * Reword comment a bit * Support scalar vector loads/stores on the memory fast path, and minor fixes * Add missing cast * Alignment * Fix VirtualFree function signature * Change MemoryProtection enum to uint aswell for consistency
This commit is contained in:
parent
a3d46e4133
commit
5001f78b1d
@ -1,14 +0,0 @@
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using System;
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namespace ChocolArm64.Events
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{
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public class MemoryAccessEventArgs : EventArgs
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{
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public long Position { get; private set; }
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public MemoryAccessEventArgs(long position)
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{
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Position = position;
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}
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}
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}
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@ -1,13 +0,0 @@
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using System;
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namespace ChocolArm64.Exceptions
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{
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public class VmmPageFaultException : Exception
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{
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private const string ExMsg = "Tried to access unmapped address 0x{0:x16}!";
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public VmmPageFaultException() { }
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public VmmPageFaultException(long position) : base(string.Format(ExMsg, position)) { }
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}
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}
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@ -31,8 +31,6 @@ namespace ChocolArm64.Instructions
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{
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{
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OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
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OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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EmitLoadAddress(context);
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EmitLoadAddress(context);
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if (signed && op.Extend64)
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if (signed && op.Extend64)
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@ -69,7 +67,6 @@ namespace ChocolArm64.Instructions
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return;
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return;
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}
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}
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdc_I8(op.Imm);
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context.EmitLdc_I8(op.Imm);
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if (op.Signed)
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if (op.Signed)
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@ -116,13 +113,10 @@ namespace ChocolArm64.Instructions
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}
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}
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}
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}
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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EmitLoadAddress(context);
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EmitLoadAddress(context);
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EmitReadAndStore(op.Rt);
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EmitReadAndStore(op.Rt);
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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context.EmitLdc_I8(1 << op.Size);
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context.EmitLdc_I8(1 << op.Size);
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@ -137,8 +131,6 @@ namespace ChocolArm64.Instructions
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{
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{
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OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
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OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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EmitLoadAddress(context);
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EmitLoadAddress(context);
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if (op is IOpCodeSimd64)
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if (op is IOpCodeSimd64)
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@ -159,8 +151,6 @@ namespace ChocolArm64.Instructions
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{
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{
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OpCodeMemPair64 op = (OpCodeMemPair64)context.CurrOp;
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OpCodeMemPair64 op = (OpCodeMemPair64)context.CurrOp;
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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EmitLoadAddress(context);
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EmitLoadAddress(context);
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if (op is IOpCodeSimd64)
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if (op is IOpCodeSimd64)
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@ -174,7 +164,6 @@ namespace ChocolArm64.Instructions
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EmitWriteCall(context, op.Size);
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EmitWriteCall(context, op.Size);
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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context.EmitLdc_I8(1 << op.Size);
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context.EmitLdc_I8(1 << op.Size);
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@ -64,9 +64,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if ((mask & 1) != 0)
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if ((mask & 1) != 0)
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{
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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context.EmitLdc_I4(offset);
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context.EmitLdc_I4(offset);
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context.Emit(OpCodes.Add);
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context.Emit(OpCodes.Add);
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@ -129,9 +127,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if ((mask & 1) != 0)
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if ((mask & 1) != 0)
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{
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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context.EmitLdc_I4(offset);
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context.EmitLdc_I4(offset);
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context.Emit(OpCodes.Add);
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context.Emit(OpCodes.Add);
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@ -198,8 +194,6 @@ namespace ChocolArm64.Instructions
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context.EmitSttmp();
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context.EmitSttmp();
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}
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}
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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if (op.Index)
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if (op.Index)
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{
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{
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context.EmitLdtmp();
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context.EmitLdtmp();
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@ -72,6 +72,8 @@ namespace ChocolArm64.Instructions
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void WriteExclusiveValue(string propName)
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void WriteExclusiveValue(string propName)
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{
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{
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context.Emit(OpCodes.Dup);
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if (op.Size < 3)
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if (op.Size < 3)
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{
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{
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context.Emit(OpCodes.Conv_U8);
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context.Emit(OpCodes.Conv_U8);
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@ -82,13 +84,6 @@ namespace ChocolArm64.Instructions
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context.EmitLdtmp2();
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context.EmitLdtmp2();
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context.EmitCallPrivatePropSet(typeof(CpuThreadState), propName);
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context.EmitCallPrivatePropSet(typeof(CpuThreadState), propName);
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context.EmitLdtmp2();
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if (op.Size < 3)
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{
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context.Emit(OpCodes.Conv_U4);
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}
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}
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}
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if (pair)
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if (pair)
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@ -99,7 +94,6 @@ namespace ChocolArm64.Instructions
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//method to read 128-bits atomically.
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//method to read 128-bits atomically.
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if (op.Size == 2)
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if (op.Size == 2)
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{
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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EmitReadZxCall(context, 3);
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EmitReadZxCall(context, 3);
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}
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}
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else
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else
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{
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{
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throw new InvalidOperationException($"Invalid store size of {1 << op.Size} bytes.");
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throw new InvalidOperationException($"Invalid load size of {1 << op.Size} bytes.");
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}
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}
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}
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}
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else
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else
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{
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{
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//8, 16, 32 or 64-bits (non-pairwise) load.
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//8, 16, 32 or 64-bits (non-pairwise) load.
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdtmp();
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EmitReadZxCall(context, op.Size);
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EmitReadZxCall(context, op.Size);
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@ -320,9 +313,8 @@ namespace ChocolArm64.Instructions
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}
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}
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else
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else
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{
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{
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void EmitWrite(int rt, long offset)
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void EmitWriteCall(int rt, long offset)
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{
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdint(op.Rn);
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context.EmitLdint(op.Rn);
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if (offset != 0)
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if (offset != 0)
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@ -334,14 +326,14 @@ namespace ChocolArm64.Instructions
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context.EmitLdintzr(rt);
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context.EmitLdintzr(rt);
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EmitWriteCall(context, op.Size);
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InstEmitMemoryHelper.EmitWriteCall(context, op.Size);
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}
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}
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EmitWrite(op.Rt, 0);
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EmitWriteCall(op.Rt, 0);
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if (pair)
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if (pair)
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{
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{
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EmitWrite(op.Rt2, 1 << op.Size);
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EmitWriteCall(op.Rt2, 1 << op.Size);
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}
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}
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}
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}
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}
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}
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@ -1,13 +1,20 @@
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using ChocolArm64.Decoders;
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using ChocolArm64.Decoders;
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using ChocolArm64.Memory;
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using ChocolArm64.Memory;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using ChocolArm64.Translation;
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using System;
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using System;
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using System.Reflection.Emit;
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using System.Reflection.Emit;
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using System.Runtime.Intrinsics.X86;
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namespace ChocolArm64.Instructions
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namespace ChocolArm64.Instructions
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{
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{
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static class InstEmitMemoryHelper
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static class InstEmitMemoryHelper
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{
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{
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private static int _tempIntAddress = ILEmitterCtx.GetIntTempIndex();
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private static int _tempIntValue = ILEmitterCtx.GetIntTempIndex();
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private static int _tempIntPtAddr = ILEmitterCtx.GetIntTempIndex();
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private static int _tempVecValue = ILEmitterCtx.GetVecTempIndex();
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private enum Extension
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private enum Extension
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{
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{
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Zx,
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Zx,
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@ -32,9 +39,10 @@ namespace ChocolArm64.Instructions
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private static void EmitReadCall(ILEmitterCtx context, Extension ext, int size)
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private static void EmitReadCall(ILEmitterCtx context, Extension ext, int size)
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{
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{
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bool isSimd = GetIsSimd(context);
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//Save the address into a temp.
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context.EmitStint(_tempIntAddress);
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string name = null;
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bool isSimd = IsSimd(context);
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if (size < 0 || size > (isSimd ? 4 : 3))
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if (size < 0 || size > (isSimd ? 4 : 3))
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{
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{
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@ -43,28 +51,27 @@ namespace ChocolArm64.Instructions
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if (isSimd)
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if (isSimd)
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{
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{
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switch (size)
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if (context.Tier == TranslationTier.Tier0 || !Sse2.IsSupported || size < 2)
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{
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{
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case 0: name = nameof(MemoryManager.ReadVector8); break;
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EmitReadVectorFallback(context, size);
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case 1: name = nameof(MemoryManager.ReadVector16); break;
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}
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case 2: name = nameof(MemoryManager.ReadVector32); break;
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else
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case 3: name = nameof(MemoryManager.ReadVector64); break;
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{
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case 4: name = nameof(MemoryManager.ReadVector128); break;
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EmitReadVector(context, size);
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}
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}
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}
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}
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else
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else
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{
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{
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switch (size)
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if (context.Tier == TranslationTier.Tier0)
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{
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{
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case 0: name = nameof(MemoryManager.ReadByte); break;
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EmitReadIntFallback(context, size);
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case 1: name = nameof(MemoryManager.ReadUInt16); break;
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}
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case 2: name = nameof(MemoryManager.ReadUInt32); break;
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else
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case 3: name = nameof(MemoryManager.ReadUInt64); break;
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{
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EmitReadInt(context, size);
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}
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}
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}
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}
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context.EmitCall(typeof(MemoryManager), name);
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if (!isSimd)
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if (!isSimd)
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{
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{
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if (ext == Extension.Sx32 ||
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if (ext == Extension.Sx32 ||
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@ -89,50 +96,390 @@ namespace ChocolArm64.Instructions
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public static void EmitWriteCall(ILEmitterCtx context, int size)
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public static void EmitWriteCall(ILEmitterCtx context, int size)
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{
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{
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bool isSimd = GetIsSimd(context);
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bool isSimd = IsSimd(context);
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string name = null;
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//Save the value into a temp.
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if (isSimd)
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{
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context.EmitStvec(_tempVecValue);
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}
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else
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{
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context.EmitStint(_tempIntValue);
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}
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//Save the address into a temp.
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context.EmitStint(_tempIntAddress);
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if (size < 0 || size > (isSimd ? 4 : 3))
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if (size < 0 || size > (isSimd ? 4 : 3))
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{
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{
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throw new ArgumentOutOfRangeException(nameof(size));
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throw new ArgumentOutOfRangeException(nameof(size));
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}
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}
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if (size < 3 && !isSimd)
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{
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context.Emit(OpCodes.Conv_I4);
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}
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if (isSimd)
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if (isSimd)
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{
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{
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switch (size)
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if (context.Tier == TranslationTier.Tier0 || !Sse2.IsSupported || size < 2)
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{
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{
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case 0: name = nameof(MemoryManager.WriteVector8); break;
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EmitWriteVectorFallback(context, size);
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case 1: name = nameof(MemoryManager.WriteVector16); break;
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}
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case 2: name = nameof(MemoryManager.WriteVector32); break;
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else
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case 3: name = nameof(MemoryManager.WriteVector64); break;
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{
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case 4: name = nameof(MemoryManager.WriteVector128); break;
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EmitWriteVector(context, size);
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}
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}
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}
|
}
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else
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else
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{
|
{
|
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switch (size)
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if (context.Tier == TranslationTier.Tier0)
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{
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{
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case 0: name = nameof(MemoryManager.WriteByte); break;
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EmitWriteIntFallback(context, size);
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case 1: name = nameof(MemoryManager.WriteUInt16); break;
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}
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case 2: name = nameof(MemoryManager.WriteUInt32); break;
|
else
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case 3: name = nameof(MemoryManager.WriteUInt64); break;
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{
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|
EmitWriteInt(context, size);
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}
|
}
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}
|
}
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|
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context.EmitCall(typeof(MemoryManager), name);
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|
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}
|
}
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|
|
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private static bool GetIsSimd(ILEmitterCtx context)
|
private static bool IsSimd(ILEmitterCtx context)
|
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{
|
{
|
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return context.CurrOp is IOpCodeSimd64 &&
|
return context.CurrOp is IOpCodeSimd64 &&
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!(context.CurrOp is OpCodeSimdMemMs64 ||
|
!(context.CurrOp is OpCodeSimdMemMs64 ||
|
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context.CurrOp is OpCodeSimdMemSs64);
|
context.CurrOp is OpCodeSimdMemSs64);
|
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}
|
}
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|
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|
private static void EmitReadInt(ILEmitterCtx context, int size)
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|
{
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|
EmitAddressCheck(context, size);
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|
|
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|
ILLabel lblFastPath = new ILLabel();
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ILLabel lblSlowPath = new ILLabel();
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ILLabel lblEnd = new ILLabel();
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|
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context.Emit(OpCodes.Brfalse_S, lblFastPath);
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context.MarkLabel(lblSlowPath);
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|
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EmitReadIntFallback(context, size);
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context.Emit(OpCodes.Br, lblEnd);
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context.MarkLabel(lblFastPath);
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|
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EmitPtPointerLoad(context, lblSlowPath);
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|
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|
switch (size)
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|
{
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|
case 0: context.Emit(OpCodes.Ldind_U1); break;
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|
case 1: context.Emit(OpCodes.Ldind_U2); break;
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|
case 2: context.Emit(OpCodes.Ldind_U4); break;
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|
case 3: context.Emit(OpCodes.Ldind_I8); break;
|
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|
}
|
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|
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|
context.MarkLabel(lblEnd);
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|
}
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|
|
||||||
|
private static void EmitReadVector(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
EmitAddressCheck(context, size);
|
||||||
|
|
||||||
|
ILLabel lblFastPath = new ILLabel();
|
||||||
|
ILLabel lblSlowPath = new ILLabel();
|
||||||
|
ILLabel lblEnd = new ILLabel();
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Brfalse_S, lblFastPath);
|
||||||
|
|
||||||
|
context.MarkLabel(lblSlowPath);
|
||||||
|
|
||||||
|
EmitReadVectorFallback(context, size);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Br, lblEnd);
|
||||||
|
|
||||||
|
context.MarkLabel(lblFastPath);
|
||||||
|
|
||||||
|
EmitPtPointerLoad(context, lblSlowPath);
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 2: context.EmitCall(typeof(Sse), nameof(Sse.LoadScalarVector128)); break;
|
||||||
|
|
||||||
|
case 3:
|
||||||
|
{
|
||||||
|
Type[] types = new Type[] { typeof(double*) };
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.LoadScalarVector128), types));
|
||||||
|
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorDoubleToSingle));
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case 4: context.EmitCall(typeof(Sse), nameof(Sse.LoadAlignedVector128)); break;
|
||||||
|
|
||||||
|
throw new InvalidOperationException($"Invalid vector load size of {1 << size} bytes.");
|
||||||
|
}
|
||||||
|
|
||||||
|
context.MarkLabel(lblEnd);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitWriteInt(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
EmitAddressCheck(context, size);
|
||||||
|
|
||||||
|
ILLabel lblFastPath = new ILLabel();
|
||||||
|
ILLabel lblSlowPath = new ILLabel();
|
||||||
|
ILLabel lblEnd = new ILLabel();
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Brfalse_S, lblFastPath);
|
||||||
|
|
||||||
|
context.MarkLabel(lblSlowPath);
|
||||||
|
|
||||||
|
EmitWriteIntFallback(context, size);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Br, lblEnd);
|
||||||
|
|
||||||
|
context.MarkLabel(lblFastPath);
|
||||||
|
|
||||||
|
EmitPtPointerLoad(context, lblSlowPath);
|
||||||
|
|
||||||
|
context.EmitLdint(_tempIntValue);
|
||||||
|
|
||||||
|
if (size < 3)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U4);
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 0: context.Emit(OpCodes.Stind_I1); break;
|
||||||
|
case 1: context.Emit(OpCodes.Stind_I2); break;
|
||||||
|
case 2: context.Emit(OpCodes.Stind_I4); break;
|
||||||
|
case 3: context.Emit(OpCodes.Stind_I8); break;
|
||||||
|
}
|
||||||
|
|
||||||
|
context.MarkLabel(lblEnd);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitWriteVector(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
EmitAddressCheck(context, size);
|
||||||
|
|
||||||
|
ILLabel lblFastPath = new ILLabel();
|
||||||
|
ILLabel lblSlowPath = new ILLabel();
|
||||||
|
ILLabel lblEnd = new ILLabel();
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Brfalse_S, lblFastPath);
|
||||||
|
|
||||||
|
context.MarkLabel(lblSlowPath);
|
||||||
|
|
||||||
|
EmitWriteVectorFallback(context, size);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Br, lblEnd);
|
||||||
|
|
||||||
|
context.MarkLabel(lblFastPath);
|
||||||
|
|
||||||
|
EmitPtPointerLoad(context, lblSlowPath);
|
||||||
|
|
||||||
|
context.EmitLdvec(_tempVecValue);
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 2: context.EmitCall(typeof(Sse), nameof(Sse.StoreScalar)); break;
|
||||||
|
|
||||||
|
case 3:
|
||||||
|
{
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleToDouble));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2), nameof(Sse2.StoreScalar));
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case 4: context.EmitCall(typeof(Sse), nameof(Sse.StoreAligned)); break;
|
||||||
|
|
||||||
|
default: throw new InvalidOperationException($"Invalid vector store size of {1 << size} bytes.");
|
||||||
|
}
|
||||||
|
|
||||||
|
context.MarkLabel(lblEnd);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitAddressCheck(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
long addressCheckMask = ~(context.Memory.AddressSpaceSize - 1);
|
||||||
|
|
||||||
|
addressCheckMask |= (1u << size) - 1;
|
||||||
|
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
context.EmitLdc_I(addressCheckMask);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.And);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitPtPointerLoad(ILEmitterCtx context, ILLabel lblFallbackPath)
|
||||||
|
{
|
||||||
|
context.EmitLdc_I8(context.Memory.PageTable.ToInt64());
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Conv_I);
|
||||||
|
|
||||||
|
int bit = MemoryManager.PageBits;
|
||||||
|
|
||||||
|
do
|
||||||
|
{
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLsr(bit);
|
||||||
|
|
||||||
|
bit += context.Memory.PtLevelBits;
|
||||||
|
|
||||||
|
if (bit < context.Memory.AddressSpaceBits)
|
||||||
|
{
|
||||||
|
context.EmitLdc_I8(context.Memory.PtLevelMask);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.And);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdc_I8(IntPtr.Size);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Mul);
|
||||||
|
context.Emit(OpCodes.Conv_I);
|
||||||
|
context.Emit(OpCodes.Add);
|
||||||
|
context.Emit(OpCodes.Ldind_I);
|
||||||
|
}
|
||||||
|
while (bit < context.Memory.AddressSpaceBits);
|
||||||
|
|
||||||
|
if (!context.Memory.HasWriteWatchSupport)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
|
||||||
|
context.EmitStint(_tempIntPtAddr);
|
||||||
|
context.EmitLdint(_tempIntPtAddr);
|
||||||
|
|
||||||
|
context.EmitLdc_I8(MemoryManager.PteFlagsMask);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.And);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Brtrue, lblFallbackPath);
|
||||||
|
|
||||||
|
context.EmitLdint(_tempIntPtAddr);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Conv_I);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
context.EmitLdc_I(MemoryManager.PageMask);
|
||||||
|
|
||||||
|
context.Emit(OpCodes.And);
|
||||||
|
context.Emit(OpCodes.Conv_I);
|
||||||
|
context.Emit(OpCodes.Add);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitReadIntFallback(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
}
|
||||||
|
|
||||||
|
string fallbackMethodName = null;
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 0: fallbackMethodName = nameof(MemoryManager.ReadByte); break;
|
||||||
|
case 1: fallbackMethodName = nameof(MemoryManager.ReadUInt16); break;
|
||||||
|
case 2: fallbackMethodName = nameof(MemoryManager.ReadUInt32); break;
|
||||||
|
case 3: fallbackMethodName = nameof(MemoryManager.ReadUInt64); break;
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(MemoryManager), fallbackMethodName);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitReadVectorFallback(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
}
|
||||||
|
|
||||||
|
string fallbackMethodName = null;
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 0: fallbackMethodName = nameof(MemoryManager.ReadVector8); break;
|
||||||
|
case 1: fallbackMethodName = nameof(MemoryManager.ReadVector16); break;
|
||||||
|
case 2: fallbackMethodName = nameof(MemoryManager.ReadVector32); break;
|
||||||
|
case 3: fallbackMethodName = nameof(MemoryManager.ReadVector64); break;
|
||||||
|
case 4: fallbackMethodName = nameof(MemoryManager.ReadVector128); break;
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(MemoryManager), fallbackMethodName);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitWriteIntFallback(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdint(_tempIntValue);
|
||||||
|
|
||||||
|
if (size < 3)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U4);
|
||||||
|
}
|
||||||
|
|
||||||
|
string fallbackMethodName = null;
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 0: fallbackMethodName = nameof(MemoryManager.WriteByte); break;
|
||||||
|
case 1: fallbackMethodName = nameof(MemoryManager.WriteUInt16); break;
|
||||||
|
case 2: fallbackMethodName = nameof(MemoryManager.WriteUInt32); break;
|
||||||
|
case 3: fallbackMethodName = nameof(MemoryManager.WriteUInt64); break;
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(MemoryManager), fallbackMethodName);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitWriteVectorFallback(ILEmitterCtx context, int size)
|
||||||
|
{
|
||||||
|
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
||||||
|
context.EmitLdint(_tempIntAddress);
|
||||||
|
|
||||||
|
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
|
||||||
|
{
|
||||||
|
context.Emit(OpCodes.Conv_U8);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdvec(_tempVecValue);
|
||||||
|
|
||||||
|
string fallbackMethodName = null;
|
||||||
|
|
||||||
|
switch (size)
|
||||||
|
{
|
||||||
|
case 0: fallbackMethodName = nameof(MemoryManager.WriteVector8); break;
|
||||||
|
case 1: fallbackMethodName = nameof(MemoryManager.WriteVector16); break;
|
||||||
|
case 2: fallbackMethodName = nameof(MemoryManager.WriteVector32); break;
|
||||||
|
case 3: fallbackMethodName = nameof(MemoryManager.WriteVector64); break;
|
||||||
|
case 4: fallbackMethodName = nameof(MemoryManager.WriteVector128); break;
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(MemoryManager), fallbackMethodName);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -45,7 +45,6 @@ namespace ChocolArm64.Instructions
|
|||||||
|
|
||||||
if (isLoad)
|
if (isLoad)
|
||||||
{
|
{
|
||||||
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
|
||||||
context.EmitLdint(op.Rn);
|
context.EmitLdint(op.Rn);
|
||||||
context.EmitLdc_I8(offset);
|
context.EmitLdc_I8(offset);
|
||||||
|
|
||||||
@ -62,7 +61,6 @@ namespace ChocolArm64.Instructions
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
|
||||||
context.EmitLdint(op.Rn);
|
context.EmitLdint(op.Rn);
|
||||||
context.EmitLdc_I8(offset);
|
context.EmitLdc_I8(offset);
|
||||||
|
|
||||||
@ -90,7 +88,6 @@ namespace ChocolArm64.Instructions
|
|||||||
|
|
||||||
void EmitMemAddress()
|
void EmitMemAddress()
|
||||||
{
|
{
|
||||||
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
|
||||||
context.EmitLdint(op.Rn);
|
context.EmitLdint(op.Rn);
|
||||||
context.EmitLdc_I8(offset);
|
context.EmitLdc_I8(offset);
|
||||||
|
|
||||||
|
@ -102,7 +102,6 @@ namespace ChocolArm64.Instructions
|
|||||||
//DC ZVA
|
//DC ZVA
|
||||||
for (int offs = 0; offs < (4 << CpuThreadState.DczSizeLog2); offs += 8)
|
for (int offs = 0; offs < (4 << CpuThreadState.DczSizeLog2); offs += 8)
|
||||||
{
|
{
|
||||||
context.EmitLdarg(TranslatedSub.MemoryArgIdx);
|
|
||||||
context.EmitLdintzr(op.Rt);
|
context.EmitLdintzr(op.Rt);
|
||||||
context.EmitLdc_I(offs);
|
context.EmitLdc_I(offs);
|
||||||
|
|
||||||
|
@ -95,7 +95,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
int cpuId = getCpuId();
|
int cpuId = getCpuId();
|
||||||
|
|
||||||
MemoryAlloc.Free(funcPtr);
|
MemoryManagement.Free(funcPtr);
|
||||||
|
|
||||||
return (cpuId & (1 << 13)) != 0;
|
return (cpuId & (1 << 13)) != 0;
|
||||||
}
|
}
|
||||||
@ -104,7 +104,7 @@ namespace ChocolArm64.Memory
|
|||||||
{
|
{
|
||||||
ulong codeLength = (ulong)code.Length;
|
ulong codeLength = (ulong)code.Length;
|
||||||
|
|
||||||
IntPtr funcPtr = MemoryAlloc.Allocate(codeLength);
|
IntPtr funcPtr = MemoryManagement.Allocate(codeLength);
|
||||||
|
|
||||||
unsafe
|
unsafe
|
||||||
{
|
{
|
||||||
@ -118,7 +118,7 @@ namespace ChocolArm64.Memory
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MemoryAlloc.Reprotect(funcPtr, codeLength, MemoryProtection.Execute);
|
MemoryManagement.Reprotect(funcPtr, codeLength, MemoryProtection.Execute);
|
||||||
|
|
||||||
return funcPtr;
|
return funcPtr;
|
||||||
}
|
}
|
||||||
|
@ -4,7 +4,7 @@ using System.Runtime.InteropServices;
|
|||||||
|
|
||||||
namespace ChocolArm64.Memory
|
namespace ChocolArm64.Memory
|
||||||
{
|
{
|
||||||
public static class MemoryAlloc
|
public static class MemoryManagement
|
||||||
{
|
{
|
||||||
public static bool HasWriteWatchSupport => RuntimeInformation.IsOSPlatform(OSPlatform.Windows);
|
public static bool HasWriteWatchSupport => RuntimeInformation.IsOSPlatform(OSPlatform.Windows);
|
||||||
|
|
||||||
@ -14,12 +14,12 @@ namespace ChocolArm64.Memory
|
|||||||
{
|
{
|
||||||
IntPtr sizeNint = new IntPtr((long)size);
|
IntPtr sizeNint = new IntPtr((long)size);
|
||||||
|
|
||||||
return MemoryAllocWindows.Allocate(sizeNint);
|
return MemoryManagementWindows.Allocate(sizeNint);
|
||||||
}
|
}
|
||||||
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
||||||
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
||||||
{
|
{
|
||||||
return MemoryAllocUnix.Allocate(size);
|
return MemoryManagementUnix.Allocate(size);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -33,12 +33,12 @@ namespace ChocolArm64.Memory
|
|||||||
{
|
{
|
||||||
IntPtr sizeNint = new IntPtr((long)size);
|
IntPtr sizeNint = new IntPtr((long)size);
|
||||||
|
|
||||||
return MemoryAllocWindows.AllocateWriteTracked(sizeNint);
|
return MemoryManagementWindows.AllocateWriteTracked(sizeNint);
|
||||||
}
|
}
|
||||||
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
||||||
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
||||||
{
|
{
|
||||||
return MemoryAllocUnix.Allocate(size);
|
return MemoryManagementUnix.Allocate(size);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -54,12 +54,12 @@ namespace ChocolArm64.Memory
|
|||||||
{
|
{
|
||||||
IntPtr sizeNint = new IntPtr((long)size);
|
IntPtr sizeNint = new IntPtr((long)size);
|
||||||
|
|
||||||
result = MemoryAllocWindows.Reprotect(address, sizeNint, permission);
|
result = MemoryManagementWindows.Reprotect(address, sizeNint, permission);
|
||||||
}
|
}
|
||||||
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
||||||
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
||||||
{
|
{
|
||||||
result = MemoryAllocUnix.Reprotect(address, size, permission);
|
result = MemoryManagementUnix.Reprotect(address, size, permission);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -76,12 +76,12 @@ namespace ChocolArm64.Memory
|
|||||||
{
|
{
|
||||||
if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
|
if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
|
||||||
{
|
{
|
||||||
return MemoryAllocWindows.Free(address);
|
return MemoryManagementWindows.Free(address);
|
||||||
}
|
}
|
||||||
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
else if (RuntimeInformation.IsOSPlatform(OSPlatform.Linux) ||
|
||||||
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
RuntimeInformation.IsOSPlatform(OSPlatform.OSX))
|
||||||
{
|
{
|
||||||
return MemoryAllocUnix.Free(address);
|
return MemoryManagementUnix.Free(address);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -101,7 +101,7 @@ namespace ChocolArm64.Memory
|
|||||||
//write tracking support on the OS.
|
//write tracking support on the OS.
|
||||||
if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
|
if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
|
||||||
{
|
{
|
||||||
return MemoryAllocWindows.GetModifiedPages(address, size, addresses, out count);
|
return MemoryManagementWindows.GetModifiedPages(address, size, addresses, out count);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
@ -3,7 +3,7 @@ using System;
|
|||||||
|
|
||||||
namespace ChocolArm64.Memory
|
namespace ChocolArm64.Memory
|
||||||
{
|
{
|
||||||
static class MemoryAllocUnix
|
static class MemoryManagementUnix
|
||||||
{
|
{
|
||||||
public static IntPtr Allocate(ulong size)
|
public static IntPtr Allocate(ulong size)
|
||||||
{
|
{
|
@ -4,7 +4,7 @@ using System.Runtime.InteropServices;
|
|||||||
|
|
||||||
namespace ChocolArm64.Memory
|
namespace ChocolArm64.Memory
|
||||||
{
|
{
|
||||||
static class MemoryAllocWindows
|
static class MemoryManagementWindows
|
||||||
{
|
{
|
||||||
[Flags]
|
[Flags]
|
||||||
private enum AllocationType : uint
|
private enum AllocationType : uint
|
||||||
@ -21,7 +21,7 @@ namespace ChocolArm64.Memory
|
|||||||
}
|
}
|
||||||
|
|
||||||
[Flags]
|
[Flags]
|
||||||
private enum MemoryProtection
|
private enum MemoryProtection : uint
|
||||||
{
|
{
|
||||||
NoAccess = 0x01,
|
NoAccess = 0x01,
|
||||||
ReadOnly = 0x02,
|
ReadOnly = 0x02,
|
||||||
@ -59,7 +59,7 @@ namespace ChocolArm64.Memory
|
|||||||
[DllImport("kernel32.dll")]
|
[DllImport("kernel32.dll")]
|
||||||
private static extern bool VirtualFree(
|
private static extern bool VirtualFree(
|
||||||
IntPtr lpAddress,
|
IntPtr lpAddress,
|
||||||
uint dwSize,
|
IntPtr dwSize,
|
||||||
AllocationType dwFreeType);
|
AllocationType dwFreeType);
|
||||||
|
|
||||||
[DllImport("kernel32.dll")]
|
[DllImport("kernel32.dll")]
|
||||||
@ -127,7 +127,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
public static bool Free(IntPtr address)
|
public static bool Free(IntPtr address)
|
||||||
{
|
{
|
||||||
return VirtualFree(address, 0, AllocationType.Release);
|
return VirtualFree(address, IntPtr.Zero, AllocationType.Release);
|
||||||
}
|
}
|
||||||
|
|
||||||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
@ -1,8 +1,5 @@
|
|||||||
using ChocolArm64.Events;
|
|
||||||
using ChocolArm64.Exceptions;
|
|
||||||
using ChocolArm64.Instructions;
|
using ChocolArm64.Instructions;
|
||||||
using System;
|
using System;
|
||||||
using System.Collections.Concurrent;
|
|
||||||
using System.Runtime.CompilerServices;
|
using System.Runtime.CompilerServices;
|
||||||
using System.Runtime.InteropServices;
|
using System.Runtime.InteropServices;
|
||||||
using System.Runtime.Intrinsics;
|
using System.Runtime.Intrinsics;
|
||||||
@ -10,52 +7,399 @@ using System.Runtime.Intrinsics.X86;
|
|||||||
using System.Threading;
|
using System.Threading;
|
||||||
|
|
||||||
using static ChocolArm64.Memory.CompareExchange128;
|
using static ChocolArm64.Memory.CompareExchange128;
|
||||||
|
using static ChocolArm64.Memory.MemoryManagement;
|
||||||
|
|
||||||
namespace ChocolArm64.Memory
|
namespace ChocolArm64.Memory
|
||||||
{
|
{
|
||||||
public unsafe class MemoryManager : IMemory, IDisposable
|
public unsafe class MemoryManager : IMemory, IDisposable
|
||||||
{
|
{
|
||||||
private const int PtLvl0Bits = 13;
|
public const int PageBits = 12;
|
||||||
private const int PtLvl1Bits = 14;
|
public const int PageSize = 1 << PageBits;
|
||||||
public const int PageBits = 12;
|
public const int PageMask = PageSize - 1;
|
||||||
|
|
||||||
private const int PtLvl0Size = 1 << PtLvl0Bits;
|
private const long PteFlagNotModified = 1;
|
||||||
private const int PtLvl1Size = 1 << PtLvl1Bits;
|
|
||||||
public const int PageSize = 1 << PageBits;
|
|
||||||
|
|
||||||
private const int PtLvl0Mask = PtLvl0Size - 1;
|
internal const long PteFlagsMask = 7;
|
||||||
private const int PtLvl1Mask = PtLvl1Size - 1;
|
|
||||||
public const int PageMask = PageSize - 1;
|
|
||||||
|
|
||||||
private const int PtLvl0Bit = PageBits + PtLvl1Bits;
|
|
||||||
private const int PtLvl1Bit = PageBits;
|
|
||||||
|
|
||||||
private ConcurrentDictionary<long, IntPtr> _observedPages;
|
|
||||||
|
|
||||||
public IntPtr Ram { get; private set; }
|
public IntPtr Ram { get; private set; }
|
||||||
|
|
||||||
private byte* _ramPtr;
|
private byte* _ramPtr;
|
||||||
|
|
||||||
private byte*** _pageTable;
|
private IntPtr _pageTable;
|
||||||
|
|
||||||
public event EventHandler<MemoryAccessEventArgs> InvalidAccess;
|
internal IntPtr PageTable => _pageTable;
|
||||||
|
|
||||||
public event EventHandler<MemoryAccessEventArgs> ObservedAccess;
|
internal int PtLevelBits { get; }
|
||||||
|
internal int PtLevelSize { get; }
|
||||||
|
internal int PtLevelMask { get; }
|
||||||
|
|
||||||
public MemoryManager(IntPtr ram)
|
public bool HasWriteWatchSupport => MemoryManagement.HasWriteWatchSupport;
|
||||||
|
|
||||||
|
public int AddressSpaceBits { get; }
|
||||||
|
public long AddressSpaceSize { get; }
|
||||||
|
|
||||||
|
public MemoryManager(
|
||||||
|
IntPtr ram,
|
||||||
|
int addressSpaceBits = 48,
|
||||||
|
bool useFlatPageTable = false)
|
||||||
{
|
{
|
||||||
_observedPages = new ConcurrentDictionary<long, IntPtr>();
|
|
||||||
|
|
||||||
Ram = ram;
|
Ram = ram;
|
||||||
|
|
||||||
_ramPtr = (byte*)ram;
|
_ramPtr = (byte*)ram;
|
||||||
|
|
||||||
_pageTable = (byte***)Marshal.AllocHGlobal(PtLvl0Size * IntPtr.Size);
|
AddressSpaceBits = addressSpaceBits;
|
||||||
|
AddressSpaceSize = 1L << addressSpaceBits;
|
||||||
|
|
||||||
for (int l0 = 0; l0 < PtLvl0Size; l0++)
|
//When flat page table is requested, we use a single
|
||||||
|
//array for the mappings of the entire address space.
|
||||||
|
//This has better performance, but also high memory usage.
|
||||||
|
//The multi level page table uses 9 bits per level, so
|
||||||
|
//the memory usage is lower, but the performance is also
|
||||||
|
//lower, since each address translation requires multiple reads.
|
||||||
|
if (useFlatPageTable)
|
||||||
{
|
{
|
||||||
_pageTable[l0] = null;
|
PtLevelBits = addressSpaceBits - PageBits;
|
||||||
}
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
PtLevelBits = 9;
|
||||||
|
}
|
||||||
|
|
||||||
|
PtLevelSize = 1 << PtLevelBits;
|
||||||
|
PtLevelMask = PtLevelSize - 1;
|
||||||
|
|
||||||
|
_pageTable = Allocate((ulong)(PtLevelSize * IntPtr.Size));
|
||||||
|
}
|
||||||
|
|
||||||
|
public void Map(long va, long pa, long size)
|
||||||
|
{
|
||||||
|
SetPtEntries(va, _ramPtr + pa, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
public void Unmap(long position, long size)
|
||||||
|
{
|
||||||
|
SetPtEntries(position, null, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
public bool IsMapped(long position)
|
||||||
|
{
|
||||||
|
return Translate(position) != IntPtr.Zero;
|
||||||
|
}
|
||||||
|
|
||||||
|
public long GetPhysicalAddress(long virtualAddress)
|
||||||
|
{
|
||||||
|
byte* ptr = (byte*)Translate(virtualAddress);
|
||||||
|
|
||||||
|
return (long)(ptr - _ramPtr);
|
||||||
|
}
|
||||||
|
|
||||||
|
private IntPtr Translate(long position)
|
||||||
|
{
|
||||||
|
if (!IsValidPosition(position))
|
||||||
|
{
|
||||||
|
return IntPtr.Zero;
|
||||||
|
}
|
||||||
|
|
||||||
|
byte* ptr = GetPtEntry(position);
|
||||||
|
|
||||||
|
ulong ptrUlong = (ulong)ptr;
|
||||||
|
|
||||||
|
if ((ptrUlong & PteFlagsMask) != 0)
|
||||||
|
{
|
||||||
|
ptrUlong &= ~(ulong)PteFlagsMask;
|
||||||
|
|
||||||
|
ptr = (byte*)ptrUlong;
|
||||||
|
}
|
||||||
|
|
||||||
|
return new IntPtr(ptr + (position & PageMask));
|
||||||
|
}
|
||||||
|
|
||||||
|
private IntPtr TranslateWrite(long position)
|
||||||
|
{
|
||||||
|
if (!IsValidPosition(position))
|
||||||
|
{
|
||||||
|
return IntPtr.Zero;
|
||||||
|
}
|
||||||
|
|
||||||
|
byte* ptr = GetPtEntry(position);
|
||||||
|
|
||||||
|
ulong ptrUlong = (ulong)ptr;
|
||||||
|
|
||||||
|
if ((ptrUlong & PteFlagsMask) != 0)
|
||||||
|
{
|
||||||
|
if ((ptrUlong & PteFlagNotModified) != 0)
|
||||||
|
{
|
||||||
|
ClearPtEntryFlag(position, PteFlagNotModified);
|
||||||
|
}
|
||||||
|
|
||||||
|
ptrUlong &= ~(ulong)PteFlagsMask;
|
||||||
|
|
||||||
|
ptr = (byte*)ptrUlong;
|
||||||
|
}
|
||||||
|
|
||||||
|
return new IntPtr(ptr + (position & PageMask));
|
||||||
|
}
|
||||||
|
|
||||||
|
private byte* GetPtEntry(long position)
|
||||||
|
{
|
||||||
|
return *(byte**)GetPtPtr(position);
|
||||||
|
}
|
||||||
|
|
||||||
|
private void SetPtEntries(long va, byte* ptr, long size)
|
||||||
|
{
|
||||||
|
long endPosition = (va + size + PageMask) & ~PageMask;
|
||||||
|
|
||||||
|
while ((ulong)va < (ulong)endPosition)
|
||||||
|
{
|
||||||
|
SetPtEntry(va, ptr);
|
||||||
|
|
||||||
|
va += PageSize;
|
||||||
|
|
||||||
|
if (ptr != null)
|
||||||
|
{
|
||||||
|
ptr += PageSize;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private void SetPtEntry(long position, byte* ptr)
|
||||||
|
{
|
||||||
|
*(byte**)GetPtPtr(position) = ptr;
|
||||||
|
}
|
||||||
|
|
||||||
|
private void SetPtEntryFlag(long position, long flag)
|
||||||
|
{
|
||||||
|
ModifyPtEntryFlag(position, flag, setFlag: true);
|
||||||
|
}
|
||||||
|
|
||||||
|
private void ClearPtEntryFlag(long position, long flag)
|
||||||
|
{
|
||||||
|
ModifyPtEntryFlag(position, flag, setFlag: false);
|
||||||
|
}
|
||||||
|
|
||||||
|
private void ModifyPtEntryFlag(long position, long flag, bool setFlag)
|
||||||
|
{
|
||||||
|
IntPtr* pt = (IntPtr*)_pageTable;
|
||||||
|
|
||||||
|
while (true)
|
||||||
|
{
|
||||||
|
IntPtr* ptPtr = GetPtPtr(position);
|
||||||
|
|
||||||
|
IntPtr old = *ptPtr;
|
||||||
|
|
||||||
|
long modified = old.ToInt64();
|
||||||
|
|
||||||
|
if (setFlag)
|
||||||
|
{
|
||||||
|
modified |= flag;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
modified &= ~flag;
|
||||||
|
}
|
||||||
|
|
||||||
|
IntPtr origValue = Interlocked.CompareExchange(ref *ptPtr, new IntPtr(modified), old);
|
||||||
|
|
||||||
|
if (origValue == old)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private IntPtr* GetPtPtr(long position)
|
||||||
|
{
|
||||||
|
if (!IsValidPosition(position))
|
||||||
|
{
|
||||||
|
throw new ArgumentOutOfRangeException(nameof(position));
|
||||||
|
}
|
||||||
|
|
||||||
|
IntPtr nextPtr = _pageTable;
|
||||||
|
|
||||||
|
IntPtr* ptePtr = null;
|
||||||
|
|
||||||
|
int bit = PageBits;
|
||||||
|
|
||||||
|
while (true)
|
||||||
|
{
|
||||||
|
long index = (position >> bit) & PtLevelMask;
|
||||||
|
|
||||||
|
ptePtr = &((IntPtr*)nextPtr)[index];
|
||||||
|
|
||||||
|
bit += PtLevelBits;
|
||||||
|
|
||||||
|
if (bit >= AddressSpaceBits)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
nextPtr = *ptePtr;
|
||||||
|
|
||||||
|
if (nextPtr == IntPtr.Zero)
|
||||||
|
{
|
||||||
|
//Entry does not yet exist, allocate a new one.
|
||||||
|
IntPtr newPtr = Allocate((ulong)(PtLevelSize * IntPtr.Size));
|
||||||
|
|
||||||
|
//Try to swap the current pointer (should be zero), with the allocated one.
|
||||||
|
nextPtr = Interlocked.Exchange(ref *ptePtr, newPtr);
|
||||||
|
|
||||||
|
//If the old pointer is not null, then another thread already has set it.
|
||||||
|
if (nextPtr != IntPtr.Zero)
|
||||||
|
{
|
||||||
|
Free(newPtr);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
nextPtr = newPtr;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return ptePtr;
|
||||||
|
}
|
||||||
|
|
||||||
|
public bool IsRegionModified(long position, long size)
|
||||||
|
{
|
||||||
|
if (!HasWriteWatchSupport)
|
||||||
|
{
|
||||||
|
return IsRegionModifiedFallback(position, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
IntPtr address = Translate(position);
|
||||||
|
|
||||||
|
IntPtr baseAddr = address;
|
||||||
|
IntPtr expectedAddr = address;
|
||||||
|
|
||||||
|
long pendingPages = 0;
|
||||||
|
|
||||||
|
long pages = size / PageSize;
|
||||||
|
|
||||||
|
bool modified = false;
|
||||||
|
|
||||||
|
bool IsAnyPageModified()
|
||||||
|
{
|
||||||
|
IntPtr pendingSize = new IntPtr(pendingPages * PageSize);
|
||||||
|
|
||||||
|
IntPtr[] addresses = new IntPtr[pendingPages];
|
||||||
|
|
||||||
|
bool result = GetModifiedPages(baseAddr, pendingSize, addresses, out ulong count);
|
||||||
|
|
||||||
|
if (result)
|
||||||
|
{
|
||||||
|
return count != 0;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
while (pages-- > 0)
|
||||||
|
{
|
||||||
|
if (address != expectedAddr)
|
||||||
|
{
|
||||||
|
modified |= IsAnyPageModified();
|
||||||
|
|
||||||
|
baseAddr = address;
|
||||||
|
|
||||||
|
pendingPages = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
expectedAddr = address + PageSize;
|
||||||
|
|
||||||
|
pendingPages++;
|
||||||
|
|
||||||
|
if (pages == 0)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
position += PageSize;
|
||||||
|
|
||||||
|
address = Translate(position);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (pendingPages != 0)
|
||||||
|
{
|
||||||
|
modified |= IsAnyPageModified();
|
||||||
|
}
|
||||||
|
|
||||||
|
return modified;
|
||||||
|
}
|
||||||
|
|
||||||
|
private unsafe bool IsRegionModifiedFallback(long position, long size)
|
||||||
|
{
|
||||||
|
long endAddr = (position + size + PageMask) & ~PageMask;
|
||||||
|
|
||||||
|
bool modified = false;
|
||||||
|
|
||||||
|
while ((ulong)position < (ulong)endAddr)
|
||||||
|
{
|
||||||
|
if (IsValidPosition(position))
|
||||||
|
{
|
||||||
|
byte* ptr = ((byte**)_pageTable)[position >> PageBits];
|
||||||
|
|
||||||
|
ulong ptrUlong = (ulong)ptr;
|
||||||
|
|
||||||
|
if ((ptrUlong & PteFlagNotModified) == 0)
|
||||||
|
{
|
||||||
|
modified = true;
|
||||||
|
|
||||||
|
SetPtEntryFlag(position, PteFlagNotModified);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
modified = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
position += PageSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
return modified;
|
||||||
|
}
|
||||||
|
|
||||||
|
public bool TryGetHostAddress(long position, long size, out IntPtr ptr)
|
||||||
|
{
|
||||||
|
if (IsContiguous(position, size))
|
||||||
|
{
|
||||||
|
ptr = (IntPtr)Translate(position);
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
ptr = IntPtr.Zero;
|
||||||
|
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
private bool IsContiguous(long position, long size)
|
||||||
|
{
|
||||||
|
long endPos = position + size;
|
||||||
|
|
||||||
|
position &= ~PageMask;
|
||||||
|
|
||||||
|
long expectedPa = GetPhysicalAddress(position);
|
||||||
|
|
||||||
|
while ((ulong)position < (ulong)endPos)
|
||||||
|
{
|
||||||
|
long pa = GetPhysicalAddress(position);
|
||||||
|
|
||||||
|
if (pa != expectedPa)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
position += PageSize;
|
||||||
|
expectedPa += PageSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
public bool IsValidPosition(long position)
|
||||||
|
{
|
||||||
|
return (ulong)position < (ulong)AddressSpaceSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
internal bool AtomicCompareExchange2xInt32(
|
internal bool AtomicCompareExchange2xInt32(
|
||||||
@ -86,7 +430,7 @@ namespace ChocolArm64.Memory
|
|||||||
AbortWithAlignmentFault(position);
|
AbortWithAlignmentFault(position);
|
||||||
}
|
}
|
||||||
|
|
||||||
IntPtr ptr = new IntPtr(TranslateWrite(position));
|
IntPtr ptr = TranslateWrite(position);
|
||||||
|
|
||||||
return InterlockedCompareExchange128(ptr, expectedLow, expectedHigh, desiredLow, desiredHigh);
|
return InterlockedCompareExchange128(ptr, expectedLow, expectedHigh, desiredLow, desiredHigh);
|
||||||
}
|
}
|
||||||
@ -98,7 +442,7 @@ namespace ChocolArm64.Memory
|
|||||||
AbortWithAlignmentFault(position);
|
AbortWithAlignmentFault(position);
|
||||||
}
|
}
|
||||||
|
|
||||||
IntPtr ptr = new IntPtr(Translate(position));
|
IntPtr ptr = Translate(position);
|
||||||
|
|
||||||
InterlockedRead128(ptr, out ulong low, out ulong high);
|
InterlockedRead128(ptr, out ulong low, out ulong high);
|
||||||
|
|
||||||
@ -371,7 +715,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
int copySize = (int)(pageLimit - position);
|
int copySize = (int)(pageLimit - position);
|
||||||
|
|
||||||
Marshal.Copy((IntPtr)Translate(position), data, offset, copySize);
|
Marshal.Copy(Translate(position), data, offset, copySize);
|
||||||
|
|
||||||
position += copySize;
|
position += copySize;
|
||||||
offset += copySize;
|
offset += copySize;
|
||||||
@ -408,7 +752,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
int copySize = (int)(pageLimit - position);
|
int copySize = (int)(pageLimit - position);
|
||||||
|
|
||||||
Marshal.Copy((IntPtr)Translate(position), data, offset, copySize);
|
Marshal.Copy(Translate(position), data, offset, copySize);
|
||||||
|
|
||||||
position += copySize;
|
position += copySize;
|
||||||
offset += copySize;
|
offset += copySize;
|
||||||
@ -571,7 +915,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
int copySize = (int)(pageLimit - position);
|
int copySize = (int)(pageLimit - position);
|
||||||
|
|
||||||
Marshal.Copy(data, offset, (IntPtr)TranslateWrite(position), copySize);
|
Marshal.Copy(data, offset, TranslateWrite(position), copySize);
|
||||||
|
|
||||||
position += copySize;
|
position += copySize;
|
||||||
offset += copySize;
|
offset += copySize;
|
||||||
@ -601,7 +945,7 @@ namespace ChocolArm64.Memory
|
|||||||
|
|
||||||
int copySize = (int)(pageLimit - position);
|
int copySize = (int)(pageLimit - position);
|
||||||
|
|
||||||
Marshal.Copy(data, offset, (IntPtr)TranslateWrite(position), copySize);
|
Marshal.Copy(data, offset, Translate(position), copySize);
|
||||||
|
|
||||||
position += copySize;
|
position += copySize;
|
||||||
offset += copySize;
|
offset += copySize;
|
||||||
@ -614,8 +958,8 @@ namespace ChocolArm64.Memory
|
|||||||
if (IsContiguous(src, size) &&
|
if (IsContiguous(src, size) &&
|
||||||
IsContiguous(dst, size))
|
IsContiguous(dst, size))
|
||||||
{
|
{
|
||||||
byte* srcPtr = Translate(src);
|
byte* srcPtr = (byte*)Translate(src);
|
||||||
byte* dstPtr = TranslateWrite(dst);
|
byte* dstPtr = (byte*)Translate(dst);
|
||||||
|
|
||||||
Buffer.MemoryCopy(srcPtr, dstPtr, size, size);
|
Buffer.MemoryCopy(srcPtr, dstPtr, size, size);
|
||||||
}
|
}
|
||||||
@ -625,266 +969,6 @@ namespace ChocolArm64.Memory
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
public void Map(long va, long pa, long size)
|
|
||||||
{
|
|
||||||
SetPtEntries(va, _ramPtr + pa, size);
|
|
||||||
}
|
|
||||||
|
|
||||||
public void Unmap(long position, long size)
|
|
||||||
{
|
|
||||||
SetPtEntries(position, null, size);
|
|
||||||
|
|
||||||
StopObservingRegion(position, size);
|
|
||||||
}
|
|
||||||
|
|
||||||
public bool IsMapped(long position)
|
|
||||||
{
|
|
||||||
if (!(IsValidPosition(position)))
|
|
||||||
{
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
long l0 = (position >> PtLvl0Bit) & PtLvl0Mask;
|
|
||||||
long l1 = (position >> PtLvl1Bit) & PtLvl1Mask;
|
|
||||||
|
|
||||||
if (_pageTable[l0] == null)
|
|
||||||
{
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
return _pageTable[l0][l1] != null || _observedPages.ContainsKey(position >> PageBits);
|
|
||||||
}
|
|
||||||
|
|
||||||
public long GetPhysicalAddress(long virtualAddress)
|
|
||||||
{
|
|
||||||
byte* ptr = Translate(virtualAddress);
|
|
||||||
|
|
||||||
return (long)(ptr - _ramPtr);
|
|
||||||
}
|
|
||||||
|
|
||||||
internal byte* Translate(long position)
|
|
||||||
{
|
|
||||||
long l0 = (position >> PtLvl0Bit) & PtLvl0Mask;
|
|
||||||
long l1 = (position >> PtLvl1Bit) & PtLvl1Mask;
|
|
||||||
|
|
||||||
long old = position;
|
|
||||||
|
|
||||||
byte** lvl1 = _pageTable[l0];
|
|
||||||
|
|
||||||
if ((position >> (PtLvl0Bit + PtLvl0Bits)) != 0)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (lvl1 == null)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
position &= PageMask;
|
|
||||||
|
|
||||||
byte* ptr = lvl1[l1];
|
|
||||||
|
|
||||||
if (ptr == null)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
return ptr + position;
|
|
||||||
|
|
||||||
Unmapped:
|
|
||||||
return HandleNullPte(old);
|
|
||||||
}
|
|
||||||
|
|
||||||
private byte* HandleNullPte(long position)
|
|
||||||
{
|
|
||||||
long key = position >> PageBits;
|
|
||||||
|
|
||||||
if (_observedPages.TryGetValue(key, out IntPtr ptr))
|
|
||||||
{
|
|
||||||
return (byte*)ptr + (position & PageMask);
|
|
||||||
}
|
|
||||||
|
|
||||||
InvalidAccess?.Invoke(this, new MemoryAccessEventArgs(position));
|
|
||||||
|
|
||||||
throw new VmmPageFaultException(position);
|
|
||||||
}
|
|
||||||
|
|
||||||
internal byte* TranslateWrite(long position)
|
|
||||||
{
|
|
||||||
long l0 = (position >> PtLvl0Bit) & PtLvl0Mask;
|
|
||||||
long l1 = (position >> PtLvl1Bit) & PtLvl1Mask;
|
|
||||||
|
|
||||||
long old = position;
|
|
||||||
|
|
||||||
byte** lvl1 = _pageTable[l0];
|
|
||||||
|
|
||||||
if ((position >> (PtLvl0Bit + PtLvl0Bits)) != 0)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (lvl1 == null)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
position &= PageMask;
|
|
||||||
|
|
||||||
byte* ptr = lvl1[l1];
|
|
||||||
|
|
||||||
if (ptr == null)
|
|
||||||
{
|
|
||||||
goto Unmapped;
|
|
||||||
}
|
|
||||||
|
|
||||||
return ptr + position;
|
|
||||||
|
|
||||||
Unmapped:
|
|
||||||
return HandleNullPteWrite(old);
|
|
||||||
}
|
|
||||||
|
|
||||||
private byte* HandleNullPteWrite(long position)
|
|
||||||
{
|
|
||||||
long key = position >> PageBits;
|
|
||||||
|
|
||||||
MemoryAccessEventArgs e = new MemoryAccessEventArgs(position);
|
|
||||||
|
|
||||||
if (_observedPages.TryGetValue(key, out IntPtr ptr))
|
|
||||||
{
|
|
||||||
SetPtEntry(position, (byte*)ptr);
|
|
||||||
|
|
||||||
ObservedAccess?.Invoke(this, e);
|
|
||||||
|
|
||||||
return (byte*)ptr + (position & PageMask);
|
|
||||||
}
|
|
||||||
|
|
||||||
InvalidAccess?.Invoke(this, e);
|
|
||||||
|
|
||||||
throw new VmmPageFaultException(position);
|
|
||||||
}
|
|
||||||
|
|
||||||
private void SetPtEntries(long va, byte* ptr, long size)
|
|
||||||
{
|
|
||||||
long endPosition = (va + size + PageMask) & ~PageMask;
|
|
||||||
|
|
||||||
while ((ulong)va < (ulong)endPosition)
|
|
||||||
{
|
|
||||||
SetPtEntry(va, ptr);
|
|
||||||
|
|
||||||
va += PageSize;
|
|
||||||
|
|
||||||
if (ptr != null)
|
|
||||||
{
|
|
||||||
ptr += PageSize;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
private void SetPtEntry(long position, byte* ptr)
|
|
||||||
{
|
|
||||||
if (!IsValidPosition(position))
|
|
||||||
{
|
|
||||||
throw new ArgumentOutOfRangeException(nameof(position));
|
|
||||||
}
|
|
||||||
|
|
||||||
long l0 = (position >> PtLvl0Bit) & PtLvl0Mask;
|
|
||||||
long l1 = (position >> PtLvl1Bit) & PtLvl1Mask;
|
|
||||||
|
|
||||||
if (_pageTable[l0] == null)
|
|
||||||
{
|
|
||||||
byte** lvl1 = (byte**)Marshal.AllocHGlobal(PtLvl1Size * IntPtr.Size);
|
|
||||||
|
|
||||||
for (int zl1 = 0; zl1 < PtLvl1Size; zl1++)
|
|
||||||
{
|
|
||||||
lvl1[zl1] = null;
|
|
||||||
}
|
|
||||||
|
|
||||||
Thread.MemoryBarrier();
|
|
||||||
|
|
||||||
_pageTable[l0] = lvl1;
|
|
||||||
}
|
|
||||||
|
|
||||||
_pageTable[l0][l1] = ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
public void StartObservingRegion(long position, long size)
|
|
||||||
{
|
|
||||||
long endPosition = (position + size + PageMask) & ~PageMask;
|
|
||||||
|
|
||||||
position &= ~PageMask;
|
|
||||||
|
|
||||||
while ((ulong)position < (ulong)endPosition)
|
|
||||||
{
|
|
||||||
_observedPages[position >> PageBits] = (IntPtr)Translate(position);
|
|
||||||
|
|
||||||
SetPtEntry(position, null);
|
|
||||||
|
|
||||||
position += PageSize;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
public void StopObservingRegion(long position, long size)
|
|
||||||
{
|
|
||||||
long endPosition = (position + size + PageMask) & ~PageMask;
|
|
||||||
|
|
||||||
while (position < endPosition)
|
|
||||||
{
|
|
||||||
lock (_observedPages)
|
|
||||||
{
|
|
||||||
if (_observedPages.TryRemove(position >> PageBits, out IntPtr ptr))
|
|
||||||
{
|
|
||||||
SetPtEntry(position, (byte*)ptr);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
position += PageSize;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
public bool TryGetHostAddress(long position, long size, out IntPtr ptr)
|
|
||||||
{
|
|
||||||
if (IsContiguous(position, size))
|
|
||||||
{
|
|
||||||
ptr = (IntPtr)Translate(position);
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
ptr = IntPtr.Zero;
|
|
||||||
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
private bool IsContiguous(long position, long size)
|
|
||||||
{
|
|
||||||
long endPos = position + size;
|
|
||||||
|
|
||||||
position &= ~PageMask;
|
|
||||||
|
|
||||||
long expectedPa = GetPhysicalAddress(position);
|
|
||||||
|
|
||||||
while ((ulong)position < (ulong)endPos)
|
|
||||||
{
|
|
||||||
long pa = GetPhysicalAddress(position);
|
|
||||||
|
|
||||||
if (pa != expectedPa)
|
|
||||||
{
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
position += PageSize;
|
|
||||||
expectedPa += PageSize;
|
|
||||||
}
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
public bool IsValidPosition(long position)
|
|
||||||
{
|
|
||||||
return position >> (PtLvl0Bits + PtLvl1Bits + PageBits) == 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
public void Dispose()
|
public void Dispose()
|
||||||
{
|
{
|
||||||
Dispose(true);
|
Dispose(true);
|
||||||
@ -892,24 +976,36 @@ Unmapped:
|
|||||||
|
|
||||||
protected virtual void Dispose(bool disposing)
|
protected virtual void Dispose(bool disposing)
|
||||||
{
|
{
|
||||||
if (_pageTable == null)
|
IntPtr ptr = Interlocked.Exchange(ref _pageTable, IntPtr.Zero);
|
||||||
|
|
||||||
|
if (ptr != IntPtr.Zero)
|
||||||
{
|
{
|
||||||
|
FreePageTableEntry(ptr, PageBits);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private void FreePageTableEntry(IntPtr ptr, int levelBitEnd)
|
||||||
|
{
|
||||||
|
levelBitEnd += PtLevelBits;
|
||||||
|
|
||||||
|
if (levelBitEnd >= AddressSpaceBits)
|
||||||
|
{
|
||||||
|
Free(ptr);
|
||||||
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
for (int l0 = 0; l0 < PtLvl0Size; l0++)
|
for (int index = 0; index < PtLevelSize; index++)
|
||||||
{
|
{
|
||||||
if (_pageTable[l0] != null)
|
IntPtr ptePtr = ((IntPtr*)ptr)[index];
|
||||||
{
|
|
||||||
Marshal.FreeHGlobal((IntPtr)_pageTable[l0]);
|
|
||||||
}
|
|
||||||
|
|
||||||
_pageTable[l0] = null;
|
if (ptePtr != IntPtr.Zero)
|
||||||
|
{
|
||||||
|
FreePageTableEntry(ptePtr, levelBitEnd);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
Marshal.FreeHGlobal((IntPtr)_pageTable);
|
Free(ptr);
|
||||||
|
|
||||||
_pageTable = null;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -1,5 +1,6 @@
|
|||||||
using ChocolArm64.Decoders;
|
using ChocolArm64.Decoders;
|
||||||
using ChocolArm64.Instructions;
|
using ChocolArm64.Instructions;
|
||||||
|
using ChocolArm64.Memory;
|
||||||
using ChocolArm64.State;
|
using ChocolArm64.State;
|
||||||
using System;
|
using System;
|
||||||
using System.Collections.Generic;
|
using System.Collections.Generic;
|
||||||
@ -10,6 +11,8 @@ namespace ChocolArm64.Translation
|
|||||||
{
|
{
|
||||||
class ILEmitterCtx
|
class ILEmitterCtx
|
||||||
{
|
{
|
||||||
|
public MemoryManager Memory { get; }
|
||||||
|
|
||||||
private TranslatorCache _cache;
|
private TranslatorCache _cache;
|
||||||
private TranslatorQueue _queue;
|
private TranslatorQueue _queue;
|
||||||
|
|
||||||
@ -43,19 +46,34 @@ namespace ChocolArm64.Translation
|
|||||||
//values needed by some functions, since IL doesn't have a swap instruction.
|
//values needed by some functions, since IL doesn't have a swap instruction.
|
||||||
//You can use any value here as long it doesn't conflict with the indices
|
//You can use any value here as long it doesn't conflict with the indices
|
||||||
//for the other registers. Any value >= 64 or < 0 will do.
|
//for the other registers. Any value >= 64 or < 0 will do.
|
||||||
private const int IntTmpIndex = -1;
|
private const int ReservedLocalsCount = 64;
|
||||||
private const int RorTmpIndex = -2;
|
|
||||||
private const int CmpOptTmp1Index = -3;
|
|
||||||
private const int CmpOptTmp2Index = -4;
|
|
||||||
private const int VecTmp1Index = -5;
|
|
||||||
private const int VecTmp2Index = -6;
|
|
||||||
private const int IntTmp2Index = -7;
|
|
||||||
|
|
||||||
public ILEmitterCtx(TranslatorCache cache, TranslatorQueue queue, TranslationTier tier, Block graph)
|
private const int RorTmpIndex = ReservedLocalsCount + 0;
|
||||||
|
private const int CmpOptTmp1Index = ReservedLocalsCount + 1;
|
||||||
|
private const int CmpOptTmp2Index = ReservedLocalsCount + 2;
|
||||||
|
private const int IntGpTmp1Index = ReservedLocalsCount + 3;
|
||||||
|
private const int IntGpTmp2Index = ReservedLocalsCount + 4;
|
||||||
|
private const int UserIntTempStart = ReservedLocalsCount + 5;
|
||||||
|
|
||||||
|
//Vectors are part of another "set" of locals.
|
||||||
|
private const int VecGpTmp1Index = ReservedLocalsCount + 0;
|
||||||
|
private const int VecGpTmp2Index = ReservedLocalsCount + 1;
|
||||||
|
private const int UserVecTempStart = ReservedLocalsCount + 2;
|
||||||
|
|
||||||
|
private static int _userIntTempCount;
|
||||||
|
private static int _userVecTempCount;
|
||||||
|
|
||||||
|
public ILEmitterCtx(
|
||||||
|
MemoryManager memory,
|
||||||
|
TranslatorCache cache,
|
||||||
|
TranslatorQueue queue,
|
||||||
|
TranslationTier tier,
|
||||||
|
Block graph)
|
||||||
{
|
{
|
||||||
_cache = cache ?? throw new ArgumentNullException(nameof(cache));
|
Memory = memory ?? throw new ArgumentNullException(nameof(memory));
|
||||||
_queue = queue ?? throw new ArgumentNullException(nameof(queue));
|
_cache = cache ?? throw new ArgumentNullException(nameof(cache));
|
||||||
_currBlock = graph ?? throw new ArgumentNullException(nameof(graph));
|
_queue = queue ?? throw new ArgumentNullException(nameof(queue));
|
||||||
|
_currBlock = graph ?? throw new ArgumentNullException(nameof(graph));
|
||||||
|
|
||||||
Tier = tier;
|
Tier = tier;
|
||||||
|
|
||||||
@ -76,6 +94,16 @@ namespace ChocolArm64.Translation
|
|||||||
AdvanceOpCode();
|
AdvanceOpCode();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static int GetIntTempIndex()
|
||||||
|
{
|
||||||
|
return UserIntTempStart + _userIntTempCount++;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static int GetVecTempIndex()
|
||||||
|
{
|
||||||
|
return UserVecTempStart + _userVecTempCount++;
|
||||||
|
}
|
||||||
|
|
||||||
public ILBlock[] GetILBlocks()
|
public ILBlock[] GetILBlocks()
|
||||||
{
|
{
|
||||||
EmitAllOpCodes();
|
EmitAllOpCodes();
|
||||||
@ -145,7 +173,7 @@ namespace ChocolArm64.Translation
|
|||||||
_ilBlock.Add(new ILBarrier());
|
_ilBlock.Add(new ILBarrier());
|
||||||
}
|
}
|
||||||
|
|
||||||
private Condition GetInverseCond(Condition cond)
|
private static Condition GetInverseCond(Condition cond)
|
||||||
{
|
{
|
||||||
//Bit 0 of all conditions is basically a negation bit, so
|
//Bit 0 of all conditions is basically a negation bit, so
|
||||||
//inverting this bit has the effect of inverting the condition.
|
//inverting this bit has the effect of inverting the condition.
|
||||||
@ -560,17 +588,17 @@ namespace ChocolArm64.Translation
|
|||||||
_ilBlock.Add(new ILOpCodeStoreState(_ilBlock));
|
_ilBlock.Add(new ILOpCodeStoreState(_ilBlock));
|
||||||
}
|
}
|
||||||
|
|
||||||
public void EmitLdtmp() => EmitLdint(IntTmpIndex);
|
public void EmitLdtmp() => EmitLdint(IntGpTmp1Index);
|
||||||
public void EmitSttmp() => EmitStint(IntTmpIndex);
|
public void EmitSttmp() => EmitStint(IntGpTmp1Index);
|
||||||
|
|
||||||
public void EmitLdtmp2() => EmitLdint(IntTmp2Index);
|
public void EmitLdtmp2() => EmitLdint(IntGpTmp2Index);
|
||||||
public void EmitSttmp2() => EmitStint(IntTmp2Index);
|
public void EmitSttmp2() => EmitStint(IntGpTmp2Index);
|
||||||
|
|
||||||
public void EmitLdvectmp() => EmitLdvec(VecTmp1Index);
|
public void EmitLdvectmp() => EmitLdvec(VecGpTmp1Index);
|
||||||
public void EmitStvectmp() => EmitStvec(VecTmp1Index);
|
public void EmitStvectmp() => EmitStvec(VecGpTmp1Index);
|
||||||
|
|
||||||
public void EmitLdvectmp2() => EmitLdvec(VecTmp2Index);
|
public void EmitLdvectmp2() => EmitLdvec(VecGpTmp2Index);
|
||||||
public void EmitStvectmp2() => EmitStvec(VecTmp2Index);
|
public void EmitStvectmp2() => EmitStvec(VecGpTmp2Index);
|
||||||
|
|
||||||
public void EmitLdint(int index) => Ldloc(index, IoType.Int);
|
public void EmitLdint(int index) => Ldloc(index, IoType.Int);
|
||||||
public void EmitStint(int index) => Stloc(index, IoType.Int);
|
public void EmitStint(int index) => Stloc(index, IoType.Int);
|
||||||
@ -611,62 +639,12 @@ namespace ChocolArm64.Translation
|
|||||||
|
|
||||||
public void EmitCallPropGet(Type objType, string propName)
|
public void EmitCallPropGet(Type objType, string propName)
|
||||||
{
|
{
|
||||||
if (objType == null)
|
EmitCall(objType, $"get_{propName}");
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(objType));
|
|
||||||
}
|
|
||||||
|
|
||||||
if (propName == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(propName));
|
|
||||||
}
|
|
||||||
|
|
||||||
EmitCall(objType.GetMethod($"get_{propName}"));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
public void EmitCallPropSet(Type objType, string propName)
|
public void EmitCallPropSet(Type objType, string propName)
|
||||||
{
|
{
|
||||||
if (objType == null)
|
EmitCall(objType, $"set_{propName}");
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(objType));
|
|
||||||
}
|
|
||||||
|
|
||||||
if (propName == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(propName));
|
|
||||||
}
|
|
||||||
|
|
||||||
EmitCall(objType.GetMethod($"set_{propName}"));
|
|
||||||
}
|
|
||||||
|
|
||||||
public void EmitCallPrivatePropGet(Type objType, string propName)
|
|
||||||
{
|
|
||||||
if (objType == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(objType));
|
|
||||||
}
|
|
||||||
|
|
||||||
if (propName == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(propName));
|
|
||||||
}
|
|
||||||
|
|
||||||
EmitPrivateCall(objType, $"get_{propName}");
|
|
||||||
}
|
|
||||||
|
|
||||||
public void EmitCallPrivatePropSet(Type objType, string propName)
|
|
||||||
{
|
|
||||||
if (objType == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(objType));
|
|
||||||
}
|
|
||||||
|
|
||||||
if (propName == null)
|
|
||||||
{
|
|
||||||
throw new ArgumentNullException(nameof(propName));
|
|
||||||
}
|
|
||||||
|
|
||||||
EmitPrivateCall(objType, $"set_{propName}");
|
|
||||||
}
|
}
|
||||||
|
|
||||||
public void EmitCall(Type objType, string mthdName)
|
public void EmitCall(Type objType, string mthdName)
|
||||||
@ -684,6 +662,16 @@ namespace ChocolArm64.Translation
|
|||||||
EmitCall(objType.GetMethod(mthdName));
|
EmitCall(objType.GetMethod(mthdName));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public void EmitCallPrivatePropGet(Type objType, string propName)
|
||||||
|
{
|
||||||
|
EmitPrivateCall(objType, $"get_{propName}");
|
||||||
|
}
|
||||||
|
|
||||||
|
public void EmitCallPrivatePropSet(Type objType, string propName)
|
||||||
|
{
|
||||||
|
EmitPrivateCall(objType, $"set_{propName}");
|
||||||
|
}
|
||||||
|
|
||||||
public void EmitPrivateCall(Type objType, string mthdName)
|
public void EmitPrivateCall(Type objType, string mthdName)
|
||||||
{
|
{
|
||||||
if (objType == null)
|
if (objType == null)
|
||||||
|
@ -138,7 +138,7 @@ namespace ChocolArm64.Translation
|
|||||||
{
|
{
|
||||||
Block block = Decoder.DecodeBasicBlock(_memory, position, mode);
|
Block block = Decoder.DecodeBasicBlock(_memory, position, mode);
|
||||||
|
|
||||||
ILEmitterCtx context = new ILEmitterCtx(_cache, _queue, TranslationTier.Tier0, block);
|
ILEmitterCtx context = new ILEmitterCtx(_memory, _cache, _queue, TranslationTier.Tier0, block);
|
||||||
|
|
||||||
string subName = GetSubroutineName(position);
|
string subName = GetSubroutineName(position);
|
||||||
|
|
||||||
@ -153,7 +153,7 @@ namespace ChocolArm64.Translation
|
|||||||
{
|
{
|
||||||
Block graph = Decoder.DecodeSubroutine(_memory, position, mode);
|
Block graph = Decoder.DecodeSubroutine(_memory, position, mode);
|
||||||
|
|
||||||
ILEmitterCtx context = new ILEmitterCtx(_cache, _queue, TranslationTier.Tier1, graph);
|
ILEmitterCtx context = new ILEmitterCtx(_memory, _cache, _queue, TranslationTier.Tier1, graph);
|
||||||
|
|
||||||
ILBlock[] ilBlocks = context.GetILBlocks();
|
ILBlock[] ilBlocks = context.GetILBlocks();
|
||||||
|
|
||||||
|
@ -1,4 +1,3 @@
|
|||||||
using ChocolArm64.Events;
|
|
||||||
using ChocolArm64.Memory;
|
using ChocolArm64.Memory;
|
||||||
using System.Collections.Concurrent;
|
using System.Collections.Concurrent;
|
||||||
|
|
||||||
@ -19,35 +18,28 @@ namespace Ryujinx.Graphics.Memory
|
|||||||
{
|
{
|
||||||
_memory = memory;
|
_memory = memory;
|
||||||
|
|
||||||
_memory.ObservedAccess += MemoryAccessHandler;
|
|
||||||
|
|
||||||
CachedPages = new ConcurrentDictionary<long, int>[1 << 20];
|
CachedPages = new ConcurrentDictionary<long, int>[1 << 20];
|
||||||
}
|
}
|
||||||
|
|
||||||
private void MemoryAccessHandler(object sender, MemoryAccessEventArgs e)
|
|
||||||
{
|
|
||||||
long pa = _memory.GetPhysicalAddress(e.Position);
|
|
||||||
|
|
||||||
CachedPages[pa >> PageBits]?.Clear();
|
|
||||||
}
|
|
||||||
|
|
||||||
public bool IsRegionModified(long position, long size, NvGpuBufferType bufferType)
|
public bool IsRegionModified(long position, long size, NvGpuBufferType bufferType)
|
||||||
{
|
{
|
||||||
long pa = _memory.GetPhysicalAddress(position);
|
long va = position;
|
||||||
|
|
||||||
long addr = pa;
|
long pa = _memory.GetPhysicalAddress(va);
|
||||||
|
|
||||||
long endAddr = (addr + size + PageMask) & ~PageMask;
|
long endAddr = (va + size + PageMask) & ~PageMask;
|
||||||
|
|
||||||
|
long addrTruncated = va & ~PageMask;
|
||||||
|
|
||||||
|
bool modified = _memory.IsRegionModified(addrTruncated, endAddr - addrTruncated);
|
||||||
|
|
||||||
int newBuffMask = 1 << (int)bufferType;
|
int newBuffMask = 1 << (int)bufferType;
|
||||||
|
|
||||||
_memory.StartObservingRegion(position, size);
|
|
||||||
|
|
||||||
long cachedPagesCount = 0;
|
long cachedPagesCount = 0;
|
||||||
|
|
||||||
while (addr < endAddr)
|
while (va < endAddr)
|
||||||
{
|
{
|
||||||
long page = addr >> PageBits;
|
long page = _memory.GetPhysicalAddress(va) >> PageBits;
|
||||||
|
|
||||||
ConcurrentDictionary<long, int> dictionary = CachedPages[page];
|
ConcurrentDictionary<long, int> dictionary = CachedPages[page];
|
||||||
|
|
||||||
@ -57,6 +49,10 @@ namespace Ryujinx.Graphics.Memory
|
|||||||
|
|
||||||
CachedPages[page] = dictionary;
|
CachedPages[page] = dictionary;
|
||||||
}
|
}
|
||||||
|
else if (modified)
|
||||||
|
{
|
||||||
|
CachedPages[page].Clear();
|
||||||
|
}
|
||||||
|
|
||||||
if (dictionary.TryGetValue(pa, out int currBuffMask))
|
if (dictionary.TryGetValue(pa, out int currBuffMask))
|
||||||
{
|
{
|
||||||
@ -74,10 +70,10 @@ namespace Ryujinx.Graphics.Memory
|
|||||||
dictionary[pa] = newBuffMask;
|
dictionary[pa] = newBuffMask;
|
||||||
}
|
}
|
||||||
|
|
||||||
addr += PageSize;
|
va += PageSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
return cachedPagesCount != (endAddr - pa + PageMask) >> PageBits;
|
return cachedPagesCount != (endAddr - addrTruncated) >> PageBits;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -1,5 +1,5 @@
|
|||||||
|
using ChocolArm64.Memory;
|
||||||
using System;
|
using System;
|
||||||
using System.Runtime.InteropServices;
|
|
||||||
|
|
||||||
namespace Ryujinx.HLE
|
namespace Ryujinx.HLE
|
||||||
{
|
{
|
||||||
@ -7,13 +7,13 @@ namespace Ryujinx.HLE
|
|||||||
{
|
{
|
||||||
public const long RamSize = 4L * 1024 * 1024 * 1024;
|
public const long RamSize = 4L * 1024 * 1024 * 1024;
|
||||||
|
|
||||||
public IntPtr RamPointer { get; private set; }
|
public IntPtr RamPointer { get; }
|
||||||
|
|
||||||
private unsafe byte* _ramPtr;
|
private unsafe byte* _ramPtr;
|
||||||
|
|
||||||
public unsafe DeviceMemory()
|
public unsafe DeviceMemory()
|
||||||
{
|
{
|
||||||
RamPointer = Marshal.AllocHGlobal(new IntPtr(RamSize));
|
RamPointer = MemoryManagement.AllocateWriteTracked(RamSize);
|
||||||
|
|
||||||
_ramPtr = (byte*)RamPointer;
|
_ramPtr = (byte*)RamPointer;
|
||||||
}
|
}
|
||||||
@ -177,7 +177,7 @@ namespace Ryujinx.HLE
|
|||||||
|
|
||||||
protected virtual void Dispose(bool disposing)
|
protected virtual void Dispose(bool disposing)
|
||||||
{
|
{
|
||||||
Marshal.FreeHGlobal(RamPointer);
|
MemoryManagement.Free(RamPointer);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -80,12 +80,14 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
|
|
||||||
public bool IsPaused { get; private set; }
|
public bool IsPaused { get; private set; }
|
||||||
|
|
||||||
public Translator Translator { get; private set; }
|
|
||||||
|
|
||||||
public MemoryManager CpuMemory { get; private set; }
|
public MemoryManager CpuMemory { get; private set; }
|
||||||
|
|
||||||
|
public Translator Translator { get; private set; }
|
||||||
|
|
||||||
private SvcHandler _svcHandler;
|
private SvcHandler _svcHandler;
|
||||||
|
|
||||||
|
private Horizon _system;
|
||||||
|
|
||||||
public HleProcessDebugger Debugger { get; private set; }
|
public HleProcessDebugger Debugger { get; private set; }
|
||||||
|
|
||||||
public KProcess(Horizon system) : base(system)
|
public KProcess(Horizon system) : base(system)
|
||||||
@ -93,14 +95,10 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
_processLock = new object();
|
_processLock = new object();
|
||||||
_threadingLock = new object();
|
_threadingLock = new object();
|
||||||
|
|
||||||
CpuMemory = new MemoryManager(system.Device.Memory.RamPointer);
|
_system = system;
|
||||||
|
|
||||||
CpuMemory.InvalidAccess += InvalidAccessHandler;
|
|
||||||
|
|
||||||
AddressArbiter = new KAddressArbiter(system);
|
AddressArbiter = new KAddressArbiter(system);
|
||||||
|
|
||||||
MemoryManager = new KMemoryManager(system, CpuMemory);
|
|
||||||
|
|
||||||
_fullTlsPages = new SortedDictionary<ulong, KTlsPageInfo>();
|
_fullTlsPages = new SortedDictionary<ulong, KTlsPageInfo>();
|
||||||
_freeTlsPages = new SortedDictionary<ulong, KTlsPageInfo>();
|
_freeTlsPages = new SortedDictionary<ulong, KTlsPageInfo>();
|
||||||
|
|
||||||
@ -110,10 +108,6 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
|
|
||||||
_threads = new LinkedList<KThread>();
|
_threads = new LinkedList<KThread>();
|
||||||
|
|
||||||
Translator = new Translator(CpuMemory);
|
|
||||||
|
|
||||||
Translator.CpuTrace += CpuTraceHandler;
|
|
||||||
|
|
||||||
_svcHandler = new SvcHandler(system.Device, this);
|
_svcHandler = new SvcHandler(system.Device, this);
|
||||||
|
|
||||||
Debugger = new HleProcessDebugger(this);
|
Debugger = new HleProcessDebugger(this);
|
||||||
@ -131,6 +125,8 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
|
|
||||||
AddressSpaceType addrSpaceType = (AddressSpaceType)((creationInfo.MmuFlags >> 1) & 7);
|
AddressSpaceType addrSpaceType = (AddressSpaceType)((creationInfo.MmuFlags >> 1) & 7);
|
||||||
|
|
||||||
|
InitializeMemoryManager(addrSpaceType, memRegion);
|
||||||
|
|
||||||
bool aslrEnabled = ((creationInfo.MmuFlags >> 5) & 1) != 0;
|
bool aslrEnabled = ((creationInfo.MmuFlags >> 5) & 1) != 0;
|
||||||
|
|
||||||
ulong codeAddress = creationInfo.CodeAddress;
|
ulong codeAddress = creationInfo.CodeAddress;
|
||||||
@ -238,6 +234,8 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
|
|
||||||
AddressSpaceType addrSpaceType = (AddressSpaceType)((creationInfo.MmuFlags >> 1) & 7);
|
AddressSpaceType addrSpaceType = (AddressSpaceType)((creationInfo.MmuFlags >> 1) & 7);
|
||||||
|
|
||||||
|
InitializeMemoryManager(addrSpaceType, memRegion);
|
||||||
|
|
||||||
bool aslrEnabled = ((creationInfo.MmuFlags >> 5) & 1) != 0;
|
bool aslrEnabled = ((creationInfo.MmuFlags >> 5) & 1) != 0;
|
||||||
|
|
||||||
ulong codeAddress = creationInfo.CodeAddress;
|
ulong codeAddress = creationInfo.CodeAddress;
|
||||||
@ -405,7 +403,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
case AddressSpaceType.Addr36Bits:
|
case AddressSpaceType.Addr36Bits:
|
||||||
case AddressSpaceType.Addr39Bits:
|
case AddressSpaceType.Addr39Bits:
|
||||||
_memoryUsageCapacity = MemoryManager.HeapRegionEnd -
|
_memoryUsageCapacity = MemoryManager.HeapRegionEnd -
|
||||||
MemoryManager.HeapRegionStart;
|
MemoryManager.HeapRegionStart;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case AddressSpaceType.Addr32BitsNoMap:
|
case AddressSpaceType.Addr32BitsNoMap:
|
||||||
@ -1010,9 +1008,29 @@ namespace Ryujinx.HLE.HOS.Kernel.Process
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private void InvalidAccessHandler(object sender, MemoryAccessEventArgs e)
|
private void InitializeMemoryManager(AddressSpaceType addrSpaceType, MemoryRegion memRegion)
|
||||||
{
|
{
|
||||||
PrintCurrentThreadStackTrace();
|
int addrSpaceBits;
|
||||||
|
|
||||||
|
switch (addrSpaceType)
|
||||||
|
{
|
||||||
|
case AddressSpaceType.Addr32Bits: addrSpaceBits = 32; break;
|
||||||
|
case AddressSpaceType.Addr36Bits: addrSpaceBits = 36; break;
|
||||||
|
case AddressSpaceType.Addr32BitsNoMap: addrSpaceBits = 32; break;
|
||||||
|
case AddressSpaceType.Addr39Bits: addrSpaceBits = 39; break;
|
||||||
|
|
||||||
|
default: throw new ArgumentException(nameof(addrSpaceType));
|
||||||
|
}
|
||||||
|
|
||||||
|
bool useFlatPageTable = memRegion == MemoryRegion.Application;
|
||||||
|
|
||||||
|
CpuMemory = new MemoryManager(_system.Device.Memory.RamPointer, addrSpaceBits, useFlatPageTable);
|
||||||
|
|
||||||
|
MemoryManager = new KMemoryManager(_system, CpuMemory);
|
||||||
|
|
||||||
|
Translator = new Translator(CpuMemory);
|
||||||
|
|
||||||
|
Translator.CpuTrace += CpuTraceHandler;
|
||||||
}
|
}
|
||||||
|
|
||||||
public void PrintCurrentThreadStackTrace()
|
public void PrintCurrentThreadStackTrace()
|
||||||
|
@ -1,5 +1,4 @@
|
|||||||
using ChocolArm64.Events;
|
using ChocolArm64.Events;
|
||||||
using ChocolArm64.Memory;
|
|
||||||
using ChocolArm64.State;
|
using ChocolArm64.State;
|
||||||
using Ryujinx.HLE.HOS.Kernel.Process;
|
using Ryujinx.HLE.HOS.Kernel.Process;
|
||||||
using System;
|
using System;
|
||||||
@ -11,14 +10,12 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
private Switch _device;
|
private Switch _device;
|
||||||
private KProcess _process;
|
private KProcess _process;
|
||||||
private Horizon _system;
|
private Horizon _system;
|
||||||
private MemoryManager _memory;
|
|
||||||
|
|
||||||
public SvcHandler(Switch device, KProcess process)
|
public SvcHandler(Switch device, KProcess process)
|
||||||
{
|
{
|
||||||
_device = device;
|
_device = device;
|
||||||
_process = process;
|
_process = process;
|
||||||
_system = device.System;
|
_system = device.System;
|
||||||
_memory = process.CpuMemory;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
public void SvcCall(object sender, InstExceptionEventArgs e)
|
public void SvcCall(object sender, InstExceptionEventArgs e)
|
||||||
|
@ -93,7 +93,7 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
|
|
||||||
private KernelResult SendSyncRequest(ulong messagePtr, ulong size, int handle)
|
private KernelResult SendSyncRequest(ulong messagePtr, ulong size, int handle)
|
||||||
{
|
{
|
||||||
byte[] messageData = _memory.ReadBytes((long)messagePtr, (long)size);
|
byte[] messageData = _process.CpuMemory.ReadBytes((long)messagePtr, (long)size);
|
||||||
|
|
||||||
KClientSession clientSession = _process.HandleTable.GetObject<KClientSession>(handle);
|
KClientSession clientSession = _process.HandleTable.GetObject<KClientSession>(handle);
|
||||||
|
|
||||||
@ -142,7 +142,7 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
ipcMessage.Thread.ObjSyncResult = IpcHandler.IpcCall(
|
ipcMessage.Thread.ObjSyncResult = IpcHandler.IpcCall(
|
||||||
_device,
|
_device,
|
||||||
_process,
|
_process,
|
||||||
_memory,
|
_process.CpuMemory,
|
||||||
ipcMessage.Session,
|
ipcMessage.Session,
|
||||||
ipcMessage.Message,
|
ipcMessage.Message,
|
||||||
ipcMessage.MessagePtr);
|
ipcMessage.MessagePtr);
|
||||||
|
@ -62,11 +62,6 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
attributeMask,
|
attributeMask,
|
||||||
attributeValue);
|
attributeValue);
|
||||||
|
|
||||||
if (result == KernelResult.Success)
|
|
||||||
{
|
|
||||||
_memory.StopObservingRegion((long)position, (long)size);
|
|
||||||
}
|
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -157,14 +152,14 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
{
|
{
|
||||||
KMemoryInfo blkInfo = _process.MemoryManager.QueryMemory(position);
|
KMemoryInfo blkInfo = _process.MemoryManager.QueryMemory(position);
|
||||||
|
|
||||||
_memory.WriteUInt64((long)infoPtr + 0x00, blkInfo.Address);
|
_process.CpuMemory.WriteUInt64((long)infoPtr + 0x00, blkInfo.Address);
|
||||||
_memory.WriteUInt64((long)infoPtr + 0x08, blkInfo.Size);
|
_process.CpuMemory.WriteUInt64((long)infoPtr + 0x08, blkInfo.Size);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x10, (int)blkInfo.State & 0xff);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x10, (int)blkInfo.State & 0xff);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x14, (int)blkInfo.Attribute);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x14, (int)blkInfo.Attribute);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x18, (int)blkInfo.Permission);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x18, (int)blkInfo.Permission);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x1c, blkInfo.IpcRefCount);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x1c, blkInfo.IpcRefCount);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x20, blkInfo.DeviceRefCount);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x20, blkInfo.DeviceRefCount);
|
||||||
_memory.WriteInt32 ((long)infoPtr + 0x24, 0);
|
_process.CpuMemory.WriteInt32 ((long)infoPtr + 0x24, 0);
|
||||||
|
|
||||||
return KernelResult.Success;
|
return KernelResult.Success;
|
||||||
}
|
}
|
||||||
|
@ -201,7 +201,7 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
|
|
||||||
private void OutputDebugString(ulong strPtr, ulong size)
|
private void OutputDebugString(ulong strPtr, ulong size)
|
||||||
{
|
{
|
||||||
string str = MemoryHelper.ReadAsciiString(_memory, (long)strPtr, (long)size);
|
string str = MemoryHelper.ReadAsciiString(_process.CpuMemory, (long)strPtr, (long)size);
|
||||||
|
|
||||||
Logger.PrintWarning(LogClass.KernelSvc, str);
|
Logger.PrintWarning(LogClass.KernelSvc, str);
|
||||||
}
|
}
|
||||||
|
@ -1,3 +1,4 @@
|
|||||||
|
using ChocolArm64.Memory;
|
||||||
using Ryujinx.HLE.HOS.Kernel.Common;
|
using Ryujinx.HLE.HOS.Kernel.Common;
|
||||||
using Ryujinx.HLE.HOS.Kernel.Process;
|
using Ryujinx.HLE.HOS.Kernel.Process;
|
||||||
using Ryujinx.HLE.HOS.Kernel.Threading;
|
using Ryujinx.HLE.HOS.Kernel.Threading;
|
||||||
@ -346,79 +347,81 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
return KernelResult.InvalidThread;
|
return KernelResult.InvalidThread;
|
||||||
}
|
}
|
||||||
|
|
||||||
_memory.WriteUInt64((long)address + 0x0, thread.Context.ThreadState.X0);
|
MemoryManager memory = currentProcess.CpuMemory;
|
||||||
_memory.WriteUInt64((long)address + 0x8, thread.Context.ThreadState.X1);
|
|
||||||
_memory.WriteUInt64((long)address + 0x10, thread.Context.ThreadState.X2);
|
|
||||||
_memory.WriteUInt64((long)address + 0x18, thread.Context.ThreadState.X3);
|
|
||||||
_memory.WriteUInt64((long)address + 0x20, thread.Context.ThreadState.X4);
|
|
||||||
_memory.WriteUInt64((long)address + 0x28, thread.Context.ThreadState.X5);
|
|
||||||
_memory.WriteUInt64((long)address + 0x30, thread.Context.ThreadState.X6);
|
|
||||||
_memory.WriteUInt64((long)address + 0x38, thread.Context.ThreadState.X7);
|
|
||||||
_memory.WriteUInt64((long)address + 0x40, thread.Context.ThreadState.X8);
|
|
||||||
_memory.WriteUInt64((long)address + 0x48, thread.Context.ThreadState.X9);
|
|
||||||
_memory.WriteUInt64((long)address + 0x50, thread.Context.ThreadState.X10);
|
|
||||||
_memory.WriteUInt64((long)address + 0x58, thread.Context.ThreadState.X11);
|
|
||||||
_memory.WriteUInt64((long)address + 0x60, thread.Context.ThreadState.X12);
|
|
||||||
_memory.WriteUInt64((long)address + 0x68, thread.Context.ThreadState.X13);
|
|
||||||
_memory.WriteUInt64((long)address + 0x70, thread.Context.ThreadState.X14);
|
|
||||||
_memory.WriteUInt64((long)address + 0x78, thread.Context.ThreadState.X15);
|
|
||||||
_memory.WriteUInt64((long)address + 0x80, thread.Context.ThreadState.X16);
|
|
||||||
_memory.WriteUInt64((long)address + 0x88, thread.Context.ThreadState.X17);
|
|
||||||
_memory.WriteUInt64((long)address + 0x90, thread.Context.ThreadState.X18);
|
|
||||||
_memory.WriteUInt64((long)address + 0x98, thread.Context.ThreadState.X19);
|
|
||||||
_memory.WriteUInt64((long)address + 0xa0, thread.Context.ThreadState.X20);
|
|
||||||
_memory.WriteUInt64((long)address + 0xa8, thread.Context.ThreadState.X21);
|
|
||||||
_memory.WriteUInt64((long)address + 0xb0, thread.Context.ThreadState.X22);
|
|
||||||
_memory.WriteUInt64((long)address + 0xb8, thread.Context.ThreadState.X23);
|
|
||||||
_memory.WriteUInt64((long)address + 0xc0, thread.Context.ThreadState.X24);
|
|
||||||
_memory.WriteUInt64((long)address + 0xc8, thread.Context.ThreadState.X25);
|
|
||||||
_memory.WriteUInt64((long)address + 0xd0, thread.Context.ThreadState.X26);
|
|
||||||
_memory.WriteUInt64((long)address + 0xd8, thread.Context.ThreadState.X27);
|
|
||||||
_memory.WriteUInt64((long)address + 0xe0, thread.Context.ThreadState.X28);
|
|
||||||
_memory.WriteUInt64((long)address + 0xe8, thread.Context.ThreadState.X29);
|
|
||||||
_memory.WriteUInt64((long)address + 0xf0, thread.Context.ThreadState.X30);
|
|
||||||
_memory.WriteUInt64((long)address + 0xf8, thread.Context.ThreadState.X31);
|
|
||||||
|
|
||||||
_memory.WriteInt64((long)address + 0x100, thread.LastPc);
|
memory.WriteUInt64((long)address + 0x0, thread.Context.ThreadState.X0);
|
||||||
|
memory.WriteUInt64((long)address + 0x8, thread.Context.ThreadState.X1);
|
||||||
|
memory.WriteUInt64((long)address + 0x10, thread.Context.ThreadState.X2);
|
||||||
|
memory.WriteUInt64((long)address + 0x18, thread.Context.ThreadState.X3);
|
||||||
|
memory.WriteUInt64((long)address + 0x20, thread.Context.ThreadState.X4);
|
||||||
|
memory.WriteUInt64((long)address + 0x28, thread.Context.ThreadState.X5);
|
||||||
|
memory.WriteUInt64((long)address + 0x30, thread.Context.ThreadState.X6);
|
||||||
|
memory.WriteUInt64((long)address + 0x38, thread.Context.ThreadState.X7);
|
||||||
|
memory.WriteUInt64((long)address + 0x40, thread.Context.ThreadState.X8);
|
||||||
|
memory.WriteUInt64((long)address + 0x48, thread.Context.ThreadState.X9);
|
||||||
|
memory.WriteUInt64((long)address + 0x50, thread.Context.ThreadState.X10);
|
||||||
|
memory.WriteUInt64((long)address + 0x58, thread.Context.ThreadState.X11);
|
||||||
|
memory.WriteUInt64((long)address + 0x60, thread.Context.ThreadState.X12);
|
||||||
|
memory.WriteUInt64((long)address + 0x68, thread.Context.ThreadState.X13);
|
||||||
|
memory.WriteUInt64((long)address + 0x70, thread.Context.ThreadState.X14);
|
||||||
|
memory.WriteUInt64((long)address + 0x78, thread.Context.ThreadState.X15);
|
||||||
|
memory.WriteUInt64((long)address + 0x80, thread.Context.ThreadState.X16);
|
||||||
|
memory.WriteUInt64((long)address + 0x88, thread.Context.ThreadState.X17);
|
||||||
|
memory.WriteUInt64((long)address + 0x90, thread.Context.ThreadState.X18);
|
||||||
|
memory.WriteUInt64((long)address + 0x98, thread.Context.ThreadState.X19);
|
||||||
|
memory.WriteUInt64((long)address + 0xa0, thread.Context.ThreadState.X20);
|
||||||
|
memory.WriteUInt64((long)address + 0xa8, thread.Context.ThreadState.X21);
|
||||||
|
memory.WriteUInt64((long)address + 0xb0, thread.Context.ThreadState.X22);
|
||||||
|
memory.WriteUInt64((long)address + 0xb8, thread.Context.ThreadState.X23);
|
||||||
|
memory.WriteUInt64((long)address + 0xc0, thread.Context.ThreadState.X24);
|
||||||
|
memory.WriteUInt64((long)address + 0xc8, thread.Context.ThreadState.X25);
|
||||||
|
memory.WriteUInt64((long)address + 0xd0, thread.Context.ThreadState.X26);
|
||||||
|
memory.WriteUInt64((long)address + 0xd8, thread.Context.ThreadState.X27);
|
||||||
|
memory.WriteUInt64((long)address + 0xe0, thread.Context.ThreadState.X28);
|
||||||
|
memory.WriteUInt64((long)address + 0xe8, thread.Context.ThreadState.X29);
|
||||||
|
memory.WriteUInt64((long)address + 0xf0, thread.Context.ThreadState.X30);
|
||||||
|
memory.WriteUInt64((long)address + 0xf8, thread.Context.ThreadState.X31);
|
||||||
|
|
||||||
_memory.WriteUInt64((long)address + 0x108, (ulong)thread.Context.ThreadState.Psr);
|
memory.WriteInt64((long)address + 0x100, thread.LastPc);
|
||||||
|
|
||||||
_memory.WriteVector128((long)address + 0x110, thread.Context.ThreadState.V0);
|
memory.WriteUInt64((long)address + 0x108, (ulong)thread.Context.ThreadState.Psr);
|
||||||
_memory.WriteVector128((long)address + 0x120, thread.Context.ThreadState.V1);
|
|
||||||
_memory.WriteVector128((long)address + 0x130, thread.Context.ThreadState.V2);
|
|
||||||
_memory.WriteVector128((long)address + 0x140, thread.Context.ThreadState.V3);
|
|
||||||
_memory.WriteVector128((long)address + 0x150, thread.Context.ThreadState.V4);
|
|
||||||
_memory.WriteVector128((long)address + 0x160, thread.Context.ThreadState.V5);
|
|
||||||
_memory.WriteVector128((long)address + 0x170, thread.Context.ThreadState.V6);
|
|
||||||
_memory.WriteVector128((long)address + 0x180, thread.Context.ThreadState.V7);
|
|
||||||
_memory.WriteVector128((long)address + 0x190, thread.Context.ThreadState.V8);
|
|
||||||
_memory.WriteVector128((long)address + 0x1a0, thread.Context.ThreadState.V9);
|
|
||||||
_memory.WriteVector128((long)address + 0x1b0, thread.Context.ThreadState.V10);
|
|
||||||
_memory.WriteVector128((long)address + 0x1c0, thread.Context.ThreadState.V11);
|
|
||||||
_memory.WriteVector128((long)address + 0x1d0, thread.Context.ThreadState.V12);
|
|
||||||
_memory.WriteVector128((long)address + 0x1e0, thread.Context.ThreadState.V13);
|
|
||||||
_memory.WriteVector128((long)address + 0x1f0, thread.Context.ThreadState.V14);
|
|
||||||
_memory.WriteVector128((long)address + 0x200, thread.Context.ThreadState.V15);
|
|
||||||
_memory.WriteVector128((long)address + 0x210, thread.Context.ThreadState.V16);
|
|
||||||
_memory.WriteVector128((long)address + 0x220, thread.Context.ThreadState.V17);
|
|
||||||
_memory.WriteVector128((long)address + 0x230, thread.Context.ThreadState.V18);
|
|
||||||
_memory.WriteVector128((long)address + 0x240, thread.Context.ThreadState.V19);
|
|
||||||
_memory.WriteVector128((long)address + 0x250, thread.Context.ThreadState.V20);
|
|
||||||
_memory.WriteVector128((long)address + 0x260, thread.Context.ThreadState.V21);
|
|
||||||
_memory.WriteVector128((long)address + 0x270, thread.Context.ThreadState.V22);
|
|
||||||
_memory.WriteVector128((long)address + 0x280, thread.Context.ThreadState.V23);
|
|
||||||
_memory.WriteVector128((long)address + 0x290, thread.Context.ThreadState.V24);
|
|
||||||
_memory.WriteVector128((long)address + 0x2a0, thread.Context.ThreadState.V25);
|
|
||||||
_memory.WriteVector128((long)address + 0x2b0, thread.Context.ThreadState.V26);
|
|
||||||
_memory.WriteVector128((long)address + 0x2c0, thread.Context.ThreadState.V27);
|
|
||||||
_memory.WriteVector128((long)address + 0x2d0, thread.Context.ThreadState.V28);
|
|
||||||
_memory.WriteVector128((long)address + 0x2e0, thread.Context.ThreadState.V29);
|
|
||||||
_memory.WriteVector128((long)address + 0x2f0, thread.Context.ThreadState.V30);
|
|
||||||
_memory.WriteVector128((long)address + 0x300, thread.Context.ThreadState.V31);
|
|
||||||
|
|
||||||
_memory.WriteInt32((long)address + 0x310, thread.Context.ThreadState.Fpcr);
|
memory.WriteVector128((long)address + 0x110, thread.Context.ThreadState.V0);
|
||||||
_memory.WriteInt32((long)address + 0x314, thread.Context.ThreadState.Fpsr);
|
memory.WriteVector128((long)address + 0x120, thread.Context.ThreadState.V1);
|
||||||
_memory.WriteInt64((long)address + 0x318, thread.Context.ThreadState.Tpidr);
|
memory.WriteVector128((long)address + 0x130, thread.Context.ThreadState.V2);
|
||||||
|
memory.WriteVector128((long)address + 0x140, thread.Context.ThreadState.V3);
|
||||||
|
memory.WriteVector128((long)address + 0x150, thread.Context.ThreadState.V4);
|
||||||
|
memory.WriteVector128((long)address + 0x160, thread.Context.ThreadState.V5);
|
||||||
|
memory.WriteVector128((long)address + 0x170, thread.Context.ThreadState.V6);
|
||||||
|
memory.WriteVector128((long)address + 0x180, thread.Context.ThreadState.V7);
|
||||||
|
memory.WriteVector128((long)address + 0x190, thread.Context.ThreadState.V8);
|
||||||
|
memory.WriteVector128((long)address + 0x1a0, thread.Context.ThreadState.V9);
|
||||||
|
memory.WriteVector128((long)address + 0x1b0, thread.Context.ThreadState.V10);
|
||||||
|
memory.WriteVector128((long)address + 0x1c0, thread.Context.ThreadState.V11);
|
||||||
|
memory.WriteVector128((long)address + 0x1d0, thread.Context.ThreadState.V12);
|
||||||
|
memory.WriteVector128((long)address + 0x1e0, thread.Context.ThreadState.V13);
|
||||||
|
memory.WriteVector128((long)address + 0x1f0, thread.Context.ThreadState.V14);
|
||||||
|
memory.WriteVector128((long)address + 0x200, thread.Context.ThreadState.V15);
|
||||||
|
memory.WriteVector128((long)address + 0x210, thread.Context.ThreadState.V16);
|
||||||
|
memory.WriteVector128((long)address + 0x220, thread.Context.ThreadState.V17);
|
||||||
|
memory.WriteVector128((long)address + 0x230, thread.Context.ThreadState.V18);
|
||||||
|
memory.WriteVector128((long)address + 0x240, thread.Context.ThreadState.V19);
|
||||||
|
memory.WriteVector128((long)address + 0x250, thread.Context.ThreadState.V20);
|
||||||
|
memory.WriteVector128((long)address + 0x260, thread.Context.ThreadState.V21);
|
||||||
|
memory.WriteVector128((long)address + 0x270, thread.Context.ThreadState.V22);
|
||||||
|
memory.WriteVector128((long)address + 0x280, thread.Context.ThreadState.V23);
|
||||||
|
memory.WriteVector128((long)address + 0x290, thread.Context.ThreadState.V24);
|
||||||
|
memory.WriteVector128((long)address + 0x2a0, thread.Context.ThreadState.V25);
|
||||||
|
memory.WriteVector128((long)address + 0x2b0, thread.Context.ThreadState.V26);
|
||||||
|
memory.WriteVector128((long)address + 0x2c0, thread.Context.ThreadState.V27);
|
||||||
|
memory.WriteVector128((long)address + 0x2d0, thread.Context.ThreadState.V28);
|
||||||
|
memory.WriteVector128((long)address + 0x2e0, thread.Context.ThreadState.V29);
|
||||||
|
memory.WriteVector128((long)address + 0x2f0, thread.Context.ThreadState.V30);
|
||||||
|
memory.WriteVector128((long)address + 0x300, thread.Context.ThreadState.V31);
|
||||||
|
|
||||||
|
memory.WriteInt32((long)address + 0x310, thread.Context.ThreadState.Fpcr);
|
||||||
|
memory.WriteInt32((long)address + 0x314, thread.Context.ThreadState.Fpsr);
|
||||||
|
memory.WriteInt64((long)address + 0x318, thread.Context.ThreadState.Tpidr);
|
||||||
|
|
||||||
return KernelResult.Success;
|
return KernelResult.Success;
|
||||||
}
|
}
|
||||||
|
@ -25,7 +25,7 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
|
|||||||
|
|
||||||
for (int index = 0; index < handlesCount; index++)
|
for (int index = 0; index < handlesCount; index++)
|
||||||
{
|
{
|
||||||
int handle = _memory.ReadInt32((long)handlesPtr + index * 4);
|
int handle = _process.CpuMemory.ReadInt32((long)handlesPtr + index * 4);
|
||||||
|
|
||||||
KSynchronizationObject syncObj = _process.HandleTable.GetObject<KSynchronizationObject>(handle);
|
KSynchronizationObject syncObj = _process.HandleTable.GetObject<KSynchronizationObject>(handle);
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user