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https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-10 13:43:17 +02:00
Implement fixed-point variant of the UCVTF and SCVTF instructions (#578)
* Add fixed-point variant of the UCVTF instruction * Change encoding of some fixed-point instructions to not allow invalid encodings * Fix Fcvtzu_Gp_Fixed encoding * Add SCVTF (fixed-point GP to Scalar) instruction * Simplify *Fixed encodings
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7ed2b4cc39
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9679896b94
@ -8,18 +8,9 @@ namespace ChocolArm64.Decoders
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public OpCodeSimdCvt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
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public OpCodeSimdCvt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
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{
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{
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//TODO:
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//Und of Fixed Point variants.
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int scale = (opCode >> 10) & 0x3f;
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int scale = (opCode >> 10) & 0x3f;
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int sf = (opCode >> 31) & 0x1;
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int sf = (opCode >> 31) & 0x1;
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/*if (Type != SF && !(Type == 2 && SF == 1))
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{
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Emitter = AInstEmit.Und;
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return;
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}*/
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FBits = 64 - scale;
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FBits = 64 - scale;
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RegisterSize = sf != 0
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RegisterSize = sf != 0
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@ -244,7 +244,7 @@ namespace ChocolArm64.Instructions
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public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
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public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
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{
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{
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EmitFcvtzs_Gp_Fix(context);
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EmitFcvtzs_Gp_Fixed(context);
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}
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}
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public static void Fcvtzs_S(ILEmitterCtx context)
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public static void Fcvtzs_S(ILEmitterCtx context)
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@ -264,7 +264,7 @@ namespace ChocolArm64.Instructions
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public static void Fcvtzu_Gp_Fixed(ILEmitterCtx context)
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public static void Fcvtzu_Gp_Fixed(ILEmitterCtx context)
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{
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{
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EmitFcvtzu_Gp_Fix(context);
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EmitFcvtzu_Gp_Fixed(context);
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}
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}
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public static void Fcvtzu_S(ILEmitterCtx context)
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public static void Fcvtzu_S(ILEmitterCtx context)
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@ -293,6 +293,24 @@ namespace ChocolArm64.Instructions
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EmitScalarSetF(context, op.Rd, op.Size);
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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}
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public static void Scvtf_Gp_Fixed(ILEmitterCtx context)
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{
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OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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if (context.CurrOp.RegisterSize == RegisterSize.Int32)
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{
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context.Emit(OpCodes.Conv_I4);
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}
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EmitFloatCast(context, op.Size);
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EmitI2fFBitsMul(context, op.Size, op.FBits);
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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public static void Scvtf_S(ILEmitterCtx context)
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public static void Scvtf_S(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -349,6 +367,26 @@ namespace ChocolArm64.Instructions
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EmitScalarSetF(context, op.Rd, op.Size);
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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}
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public static void Ucvtf_Gp_Fixed(ILEmitterCtx context)
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{
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OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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if (context.CurrOp.RegisterSize == RegisterSize.Int32)
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{
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context.Emit(OpCodes.Conv_U4);
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}
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context.Emit(OpCodes.Conv_R_Un);
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EmitFloatCast(context, op.Size);
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EmitI2fFBitsMul(context, op.Size, op.FBits);
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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public static void Ucvtf_S(ILEmitterCtx context)
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public static void Ucvtf_S(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -367,32 +405,6 @@ namespace ChocolArm64.Instructions
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EmitVectorCvtf(context, signed: false);
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EmitVectorCvtf(context, signed: false);
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}
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}
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private static int GetFBits(ILEmitterCtx context)
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{
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if (context.CurrOp is OpCodeSimdShImm64 op)
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{
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return GetImmShr(op);
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}
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return 0;
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}
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private static void EmitFloatCast(ILEmitterCtx context, int size)
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{
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if (size == 0)
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{
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context.Emit(OpCodes.Conv_R4);
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}
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else if (size == 1)
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{
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context.Emit(OpCodes.Conv_R8);
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}
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else
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{
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throw new ArgumentOutOfRangeException(nameof(size));
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}
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}
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private static void EmitFcvtn(ILEmitterCtx context, bool signed, bool scalar)
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private static void EmitFcvtn(ILEmitterCtx context, bool signed, bool scalar)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -476,17 +488,17 @@ namespace ChocolArm64.Instructions
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context.EmitStintzr(op.Rd);
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context.EmitStintzr(op.Rd);
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}
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}
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private static void EmitFcvtzs_Gp_Fix(ILEmitterCtx context)
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private static void EmitFcvtzs_Gp_Fixed(ILEmitterCtx context)
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{
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{
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EmitFcvtz__Gp_Fix(context, true);
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EmitFcvtz__Gp_Fixed(context, true);
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}
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}
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private static void EmitFcvtzu_Gp_Fix(ILEmitterCtx context)
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private static void EmitFcvtzu_Gp_Fixed(ILEmitterCtx context)
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{
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{
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EmitFcvtz__Gp_Fix(context, false);
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EmitFcvtz__Gp_Fixed(context, false);
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}
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}
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private static void EmitFcvtz__Gp_Fix(ILEmitterCtx context, bool signed)
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private static void EmitFcvtz__Gp_Fixed(ILEmitterCtx context, bool signed)
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{
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{
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OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
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OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
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@ -530,9 +542,7 @@ namespace ChocolArm64.Instructions
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context.Emit(OpCodes.Conv_R_Un);
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context.Emit(OpCodes.Conv_R_Un);
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}
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}
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context.Emit(sizeF == 0
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EmitFloatCast(context, sizeF);
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? OpCodes.Conv_R4
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: OpCodes.Conv_R8);
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EmitI2fFBitsMul(context, sizeF, fBits);
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EmitI2fFBitsMul(context, sizeF, fBits);
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@ -644,6 +654,32 @@ namespace ChocolArm64.Instructions
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}
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}
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}
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}
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private static int GetFBits(ILEmitterCtx context)
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{
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if (context.CurrOp is OpCodeSimdShImm64 op)
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{
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return GetImmShr(op);
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}
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return 0;
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}
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private static void EmitFloatCast(ILEmitterCtx context, int size)
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{
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if (size == 0)
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{
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context.Emit(OpCodes.Conv_R4);
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}
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else if (size == 1)
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{
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context.Emit(OpCodes.Conv_R8);
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}
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else
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{
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throw new ArgumentOutOfRangeException(nameof(size));
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}
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}
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private static void EmitScalarFcvts(ILEmitterCtx context, int size, int fBits)
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private static void EmitScalarFcvts(ILEmitterCtx context, int size, int fBits)
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{
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{
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if (size < 0 || size > 1)
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if (size < 0 || size > 1)
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@ -310,12 +310,12 @@ namespace ChocolArm64
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SetA64("x00111100x101000000000xxxxxxxxxx", InstEmit.Fcvtps_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x101000000000xxxxxxxxxx", InstEmit.Fcvtps_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x101001000000xxxxxxxxxx", InstEmit.Fcvtpu_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x101001000000xxxxxxxxxx", InstEmit.Fcvtpu_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x111000000000xxxxxxxxxx", InstEmit.Fcvtzs_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x111000000000xxxxxxxxxx", InstEmit.Fcvtzs_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x011000xxxxxxxxxxxxxxxx", InstEmit.Fcvtzs_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x011000>xxxxxxxxxxxxxxx", InstEmit.Fcvtzs_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64("010111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzs_S, typeof(OpCodeSimd64));
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SetA64("010111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzs_S, typeof(OpCodeSimd64));
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SetA64("0>0011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimd64));
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SetA64("0>0011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimd64));
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SetA64("0x0011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimdShImm64));
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SetA64("0x0011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V, typeof(OpCodeSimdShImm64));
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SetA64("x00111100x111001000000xxxxxxxxxx", InstEmit.Fcvtzu_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x111001000000xxxxxxxxxx", InstEmit.Fcvtzu_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x011001xxxxxxxxxxxxxxxx", InstEmit.Fcvtzu_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x011001>xxxxxxxxxxxxxxx", InstEmit.Fcvtzu_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64("011111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzu_S, typeof(OpCodeSimd64));
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SetA64("011111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzu_S, typeof(OpCodeSimd64));
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SetA64("0>1011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimd64));
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SetA64("0>1011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimd64));
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SetA64("0x1011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimdShImm64));
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SetA64("0x1011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V, typeof(OpCodeSimdShImm64));
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@ -434,6 +434,7 @@ namespace ChocolArm64
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SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
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SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
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SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S, typeof(OpCodeSimd64));
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SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S, typeof(OpCodeSimd64));
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SetA64("0>0011100<100001110110xxxxxxxxxx", InstEmit.Scvtf_V, typeof(OpCodeSimd64));
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SetA64("0>0011100<100001110110xxxxxxxxxx", InstEmit.Scvtf_V, typeof(OpCodeSimd64));
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SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V, typeof(OpCodeSimdReg64));
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SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V, typeof(OpCodeSimdReg64));
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@ -542,6 +543,7 @@ namespace ChocolArm64
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SetA64("01101110<<110000001110xxxxxxxxxx", InstEmit.Uaddlv_V, typeof(OpCodeSimd64));
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SetA64("01101110<<110000001110xxxxxxxxxx", InstEmit.Uaddlv_V, typeof(OpCodeSimd64));
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SetA64("0x101110<<1xxxxx000100xxxxxxxxxx", InstEmit.Uaddw_V, typeof(OpCodeSimdReg64));
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SetA64("0x101110<<1xxxxx000100xxxxxxxxxx", InstEmit.Uaddw_V, typeof(OpCodeSimdReg64));
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SetA64("x00111100x100011000000xxxxxxxxxx", InstEmit.Ucvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x100011000000xxxxxxxxxx", InstEmit.Ucvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x000011>xxxxxxxxxxxxxxx", InstEmit.Ucvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64("011111100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_S, typeof(OpCodeSimd64));
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SetA64("011111100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_S, typeof(OpCodeSimd64));
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SetA64("0>1011100<100001110110xxxxxxxxxx", InstEmit.Ucvtf_V, typeof(OpCodeSimd64));
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SetA64("0>1011100<100001110110xxxxxxxxxx", InstEmit.Ucvtf_V, typeof(OpCodeSimd64));
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SetA64("0x101110<<1xxxxx000001xxxxxxxxxx", InstEmit.Uhadd_V, typeof(OpCodeSimdReg64));
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SetA64("0x101110<<1xxxxx000001xxxxxxxxxx", InstEmit.Uhadd_V, typeof(OpCodeSimdReg64));
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