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Update ADC test, add WZR/WSP, ADCS, SBCS test (#37)
* add 'ADC 32bit and Overflow' test * Add WZR/WSP tests * fix ADC and ADDS * add ADCS test * add SBCS test * indent my code and delete comment * '/' <- i hate you x) * remove spacebar char * remove false tab
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@ -57,13 +57,14 @@ namespace Ryujinx.Tests.Cpu
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Position += 4;
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}
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protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0,
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protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X31 = 0,
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AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false)
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{
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Thread.ThreadState.X0 = X0;
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Thread.ThreadState.X1 = X1;
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Thread.ThreadState.X2 = X2;
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Thread.ThreadState.X31 = X31;
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Thread.ThreadState.V0 = V0;
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Thread.ThreadState.V1 = V1;
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Thread.ThreadState.V2 = V2;
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@ -91,14 +92,14 @@ namespace Ryujinx.Tests.Cpu
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}
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protected AThreadState SingleOpcode(uint Opcode,
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ulong X0 = 0, ulong X1 = 0, ulong X2 = 0,
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ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X31 = 0,
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AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false)
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{
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this.Opcode(Opcode);
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this.Opcode(0xD4200000); // BRK #0
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this.Opcode(0xD65F03C0); // RET
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SetThreadState(X0, X1, X2, V0, V1, V2, Overflow, Carry, Zero, Negative);
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SetThreadState(X0, X1, X2, X31, V0, V1, V2, Overflow, Carry, Zero, Negative);
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ExecuteOpcodes();
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return GetThreadState();
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@ -5,12 +5,31 @@ namespace Ryujinx.Tests.Cpu
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{
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public class CpuTestAlu : CpuTest
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{
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[TestCase(2u, 3u, 6ul, true)]
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[TestCase(2u, 3u, 5ul, false)]
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public void Adc(uint A, uint B, ulong Result, bool CarryTest)
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[TestCase(0x9A020020u, 2u, 3u, true, 6u)]
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[TestCase(0x9A020020u, 2u, 3u, false, 5u)]
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[TestCase(0x1A020020u, 2u, 3u, true, 6u)]
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[TestCase(0x1A020020u, 2u, 3u, false, 5u)]
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[TestCase(0x1A020020u, 0xFFFFFFFFu, 0x2u, false, 0x1u)]
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public void Adc(uint Opcode, uint A, uint B, bool CarryState, uint Result)
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{
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// ADC X0, X1, X2
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AThreadState ThreadState = SingleOpcode(0x9A020020, X1: A, X2: B, Carry: CarryTest);
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// ADC (X0/W0), (X1/W1), (X2/W2)
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AThreadState ThreadState = SingleOpcode(Opcode, X1: A, X2: B, Carry: CarryState);
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Assert.AreEqual(Result, ThreadState.X0);
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}
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[TestCase(0x3A020020u, 2u, 3u, false, false, false, 5u)]
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[TestCase(0x3A020020u, 2u, 3u, true, false, false, 6u)]
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[TestCase(0xBA020020u, 2u, 3u, false, false, false, 5u)]
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[TestCase(0xBA020020u, 2u, 3u, true, false, false, 6u)]
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[TestCase(0x3A020020u, 0xFFFFFFFEu, 0x1u, true, true, true, 0x0u)]
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public void Adcs(uint Opcode, uint A, uint B, bool CarryState, bool Zero, bool Carry, uint Result)
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{
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//ADCS (X0/W0), (X1, W1), (X2/W2)
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AThreadState ThreadState = SingleOpcode(Opcode, X1: A, X2: B, Carry: CarryState);
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Assert.IsFalse(ThreadState.Negative);
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Assert.IsFalse(ThreadState.Overflow);
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Assert.AreEqual(Zero, ThreadState.Zero);
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Assert.AreEqual(Carry, ThreadState.Carry);
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Assert.AreEqual(Result, ThreadState.X0);
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}
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@ -22,7 +41,23 @@ namespace Ryujinx.Tests.Cpu
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Assert.AreEqual(3, ThreadState.X0);
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}
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[TestCase(0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFul, true, false)]
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[TestCase(2u, false, false)]
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[TestCase(5u, false, false)]
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[TestCase(7u, false, false)]
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[TestCase(0xFFFFFFFFu, false, true )]
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[TestCase(0xFFFFFFFBu, true, true )]
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public void Adds(uint A, bool Zero, bool Carry)
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{
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//ADDS WZR, WSP, #5
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AThreadState ThreadState = SingleOpcode(0x310017FF, X31: A);
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Assert.IsFalse(ThreadState.Negative);
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Assert.AreEqual(Zero, ThreadState.Zero);
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Assert.AreEqual(Carry, ThreadState.Carry);
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Assert.IsFalse(ThreadState.Overflow);
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Assert.AreEqual(A, ThreadState.X31);
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}
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[TestCase(0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFul, true, false)]
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[TestCase(0xFFFFFFFFu, 0x00000000u, 0x00000000ul, false, true)]
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[TestCase(0x12345678u, 0x7324A993u, 0x12240010ul, false, false)]
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public void Ands(uint A, uint B, ulong Result, bool Negative, bool Zero)
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@ -67,5 +102,22 @@ namespace Ryujinx.Tests.Cpu
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AThreadState ThreadState = SingleOpcode(0x5AC00821, X1: 0x12345678);
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Assert.AreEqual(0x78563412, ThreadState.X1);
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}
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[TestCase(0x7A020020u, 4u, 2u, false, false, false, true, 1u)]
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[TestCase(0x7A020020u, 4u, 2u, true, false, false, true, 2u)]
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[TestCase(0xFA020020u, 4u, 2u, false, false, false, true, 1u)]
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[TestCase(0xFA020020u, 4u, 2u, true, false, false, true, 2u)]
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[TestCase(0x7A020020u, 4u, 4u, false, true, false, false, 0xFFFFFFFFu)]
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[TestCase(0x7A020020u, 4u, 4u, true, false, true, true, 0x0u)]
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public void Sbcs(uint Opcode, uint A, uint B, bool CarryState, bool Negative, bool Zero, bool Carry, uint Result)
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{
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//SBCS (X0/W0), (X1, W1), (X2/W2)
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AThreadState ThreadState = SingleOpcode(Opcode, X1: A, X2: B, Carry: CarryState);
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Assert.AreEqual(Negative, ThreadState.Negative);
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Assert.IsFalse(ThreadState.Overflow);
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Assert.AreEqual(Zero, ThreadState.Zero);
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Assert.AreEqual(Carry, ThreadState.Carry);
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Assert.AreEqual(Result, ThreadState.X0);
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}
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}
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}
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