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Add SMLAL (vector), fix EXT instruction
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@ -243,6 +243,7 @@ namespace ChocolArm64
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Set("0x00111100>>>xxx100001xxxxxxxxxx", AInstEmit.Shrn_V, typeof(AOpCodeSimdShImm));
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Set("0x001110<<1xxxxx011001xxxxxxxxxx", AInstEmit.Smax_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx011011xxxxxxxxxx", AInstEmit.Smin_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx100000xxxxxxxxxx", AInstEmit.Smlal_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx110000xxxxxxxxxx", AInstEmit.Smull_V, typeof(AOpCodeSimdReg));
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Set("0>001110<<1xxxxx010001xxxxxxxxxx", AInstEmit.Sshl_V, typeof(AOpCodeSimdReg));
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Set("0x00111100>>>xxx101001xxxxxxxxxx", AInstEmit.Sshll_V, typeof(AOpCodeSimdShImm));
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@ -8,7 +8,7 @@ namespace ChocolArm64.Decoder
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public AOpCodeSimdExt(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
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{
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int Imm4 = (OpCode >> 11) & 0xf;
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Imm4 = (OpCode >> 11) & 0xf;
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}
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}
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}
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@ -374,6 +374,15 @@ namespace ChocolArm64.Instruction
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EmitVectorBinaryOpSx(Context, () => Context.EmitCall(MthdInfo));
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}
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public static void Smlal_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRnRmTernaryOpSx(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Smull_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRnRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Mul));
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@ -459,15 +459,25 @@ namespace ChocolArm64.Instruction
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public static void EmitVectorWidenRnRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
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{
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EmitVectorWidenRnRmBinaryOp(Context, Emit, true);
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EmitVectorWidenRnRmOp(Context, Emit, false, true);
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}
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public static void EmitVectorWidenRnRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
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{
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EmitVectorWidenRnRmBinaryOp(Context, Emit, false);
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EmitVectorWidenRnRmOp(Context, Emit, false, false);
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}
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public static void EmitVectorWidenRnRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
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public static void EmitVectorWidenRnRmTernaryOpSx(AILEmitterCtx Context, Action Emit)
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{
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EmitVectorWidenRnRmOp(Context, Emit, true, true);
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}
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public static void EmitVectorWidenRnRmTernaryOpZx(AILEmitterCtx Context, Action Emit)
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{
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EmitVectorWidenRnRmOp(Context, Emit, true, false);
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}
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public static void EmitVectorWidenRnRmOp(AILEmitterCtx Context, Action Emit, bool Ternary, bool Signed)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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@ -477,6 +487,11 @@ namespace ChocolArm64.Instruction
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for (int Index = 0; Index < Elems; Index++)
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{
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if (Ternary)
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{
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EmitVectorExtract(Context, Op.Rd, Index, Op.Size + 1, Signed);
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}
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EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
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EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
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@ -63,15 +63,18 @@ namespace ChocolArm64.Instruction
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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int Position = Op.Imm4;
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for (int Index = 0; Index < Bytes; Index++)
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{
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int Position = Op.Imm4 + Index;
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int Reg = Op.Imm4 + Index < Bytes ? Op.Rn : Op.Rm;
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int Reg = Position < Bytes ? Op.Rn : Op.Rm;
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if (Position == Bytes)
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{
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Position = 0;
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}
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Position &= Bytes - 1;
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EmitVectorExtractZx(Context, Reg, Position, 0);
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EmitVectorExtractZx(Context, Reg, Position++, 0);
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EmitVectorInsert(Context, Op.Rd, Index, 0);
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}
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