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Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V Tests. (#720)
* Update PackageReferences. * Improve Cnt_V Test. Tuneup Cls_V & Clz_V Tests. Nit. * Nit. * Improve Dup_Gp & Ins_Gp Tests. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst.
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@ -2206,6 +2206,11 @@ namespace ChocolArm64.Instructions
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EmitAddLongPairwise(context, signed: true, accumulate: false);
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EmitAddLongPairwise(context, signed: true, accumulate: false);
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}
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}
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public static void Saddlv_V(ILEmitterCtx context)
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{
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EmitVectorLongAcrossVectorOpSx(context, () => context.Emit(OpCodes.Add));
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}
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public static void Saddw_V(ILEmitterCtx context)
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public static void Saddw_V(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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@ -3041,21 +3046,7 @@ namespace ChocolArm64.Instructions
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public static void Uaddlv_V(ILEmitterCtx context)
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public static void Uaddlv_V(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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EmitVectorLongAcrossVectorOpZx(context, () => context.Emit(OpCodes.Add));
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int bytes = op.GetBitsCount() >> 3;
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int elems = bytes >> op.Size;
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EmitVectorExtractZx(context, op.Rn, 0, op.Size);
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for (int index = 1; index < elems; index++)
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{
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EmitVectorExtractZx(context, op.Rn, index, op.Size);
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context.Emit(OpCodes.Add);
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}
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EmitScalarSet(context, op.Rd, op.Size + 1);
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}
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}
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public static void Uaddw_V(ILEmitterCtx context)
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public static void Uaddw_V(ILEmitterCtx context)
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@ -823,15 +823,29 @@ namespace ChocolArm64.Instructions
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public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
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public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
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{
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{
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EmitVectorAcrossVectorOp(context, emit, true);
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EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: false);
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}
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}
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public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
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public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
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{
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{
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EmitVectorAcrossVectorOp(context, emit, false);
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EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: false);
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}
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}
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public static void EmitVectorAcrossVectorOp(ILEmitterCtx context, Action emit, bool signed)
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public static void EmitVectorLongAcrossVectorOpSx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: true);
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}
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public static void EmitVectorLongAcrossVectorOpZx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: true);
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}
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public static void EmitVectorAcrossVectorOp(
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ILEmitterCtx context,
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Action emit,
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bool signed,
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bool isLong)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -847,7 +861,7 @@ namespace ChocolArm64.Instructions
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emit();
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emit();
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}
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}
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EmitScalarSet(context, op.Rd, op.Size);
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EmitScalarSet(context, op.Rd, isLong ? op.Size + 1 : op.Size);
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}
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}
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public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
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public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
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@ -439,6 +439,8 @@ namespace ChocolArm64
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SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V, typeof(OpCodeSimdReg64));
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SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V, typeof(OpCodeSimdReg64));
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SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
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SetA64("000011100x110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
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SetA64("01001110<<110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
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SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
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SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
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@ -117,6 +117,12 @@ namespace Ryujinx.Tests.Cpu
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0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
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0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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}
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private static ulong[] _4H_()
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{
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return new ulong[] { 0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
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0x8000800080008000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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private static ulong[] _4H2S1D_()
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private static ulong[] _4H2S1D_()
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{
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{
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return new ulong[] { 0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
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return new ulong[] { 0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
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@ -155,73 +161,16 @@ namespace Ryujinx.Tests.Cpu
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns8B_()
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private static uint[] _W_()
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{
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{
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for (int cnt = 0; cnt <= 7; cnt++)
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return new uint[] { 0x00000000u, 0x7FFFFFFFu,
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{
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0x80000000u, 0xFFFFFFFFu };
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ulong rnd1 = GenLeadingSignsMinus8(cnt);
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ulong rnd2 = GenLeadingSignsPlus8(cnt);
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yield return (rnd1 << 56) | (rnd1 << 48) | (rnd1 << 40) | (rnd1 << 32) |
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(rnd1 << 24) | (rnd1 << 16) | (rnd1 << 08) | rnd1;
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yield return (rnd2 << 56) | (rnd2 << 48) | (rnd2 << 40) | (rnd2 << 32) |
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(rnd2 << 24) | (rnd2 << 16) | (rnd2 << 08) | rnd2;
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}
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns4H_()
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private static ulong[] _X_()
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{
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{
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for (int cnt = 0; cnt <= 15; cnt++)
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return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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{
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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ulong rnd1 = GenLeadingSignsMinus16(cnt);
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ulong rnd2 = GenLeadingSignsPlus16(cnt);
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yield return (rnd1 << 48) | (rnd1 << 32) | (rnd1 << 16) | rnd1;
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yield return (rnd2 << 48) | (rnd2 << 32) | (rnd2 << 16) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns2S_()
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{
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for (int cnt = 0; cnt <= 31; cnt++)
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{
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ulong rnd1 = GenLeadingSignsMinus32(cnt);
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ulong rnd2 = GenLeadingSignsPlus32(cnt);
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yield return (rnd1 << 32) | rnd1;
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yield return (rnd2 << 32) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros8B_()
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{
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for (int cnt = 0; cnt <= 8; cnt++)
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{
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ulong rnd = GenLeadingZeros8(cnt);
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yield return (rnd << 56) | (rnd << 48) | (rnd << 40) | (rnd << 32) |
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(rnd << 24) | (rnd << 16) | (rnd << 08) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros4H_()
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{
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for (int cnt = 0; cnt <= 16; cnt++)
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{
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ulong rnd = GenLeadingZeros16(cnt);
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yield return (rnd << 48) | (rnd << 32) | (rnd << 16) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros2S_()
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{
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for (int cnt = 0; cnt <= 32; cnt++)
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{
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ulong rnd = GenLeadingZeros32(cnt);
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yield return (rnd << 32) | rnd;
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}
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}
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}
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private static IEnumerable<ulong> _1H_F_()
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private static IEnumerable<ulong> _1H_F_()
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@ -619,16 +568,82 @@ namespace Ryujinx.Tests.Cpu
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}
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}
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}
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}
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private static uint[] _W_()
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private static IEnumerable<ulong> _GenLeadingSigns8B_()
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{
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{
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return new uint[] { 0x00000000u, 0x7FFFFFFFu,
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for (int cnt = 0; cnt <= 7; cnt++)
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0x80000000u, 0xFFFFFFFFu };
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{
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ulong rnd1 = GenLeadingSignsMinus8(cnt);
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ulong rnd2 = GenLeadingSignsPlus8(cnt);
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yield return (rnd1 << 56) | (rnd1 << 48) | (rnd1 << 40) | (rnd1 << 32) |
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(rnd1 << 24) | (rnd1 << 16) | (rnd1 << 08) | rnd1;
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yield return (rnd2 << 56) | (rnd2 << 48) | (rnd2 << 40) | (rnd2 << 32) |
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(rnd2 << 24) | (rnd2 << 16) | (rnd2 << 08) | rnd2;
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}
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}
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}
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private static ulong[] _X_()
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private static IEnumerable<ulong> _GenLeadingSigns4H_()
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{
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{
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return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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for (int cnt = 0; cnt <= 15; cnt++)
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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{
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ulong rnd1 = GenLeadingSignsMinus16(cnt);
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ulong rnd2 = GenLeadingSignsPlus16(cnt);
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yield return (rnd1 << 48) | (rnd1 << 32) | (rnd1 << 16) | rnd1;
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yield return (rnd2 << 48) | (rnd2 << 32) | (rnd2 << 16) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns2S_()
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{
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for (int cnt = 0; cnt <= 31; cnt++)
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{
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ulong rnd1 = GenLeadingSignsMinus32(cnt);
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ulong rnd2 = GenLeadingSignsPlus32(cnt);
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yield return (rnd1 << 32) | rnd1;
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yield return (rnd2 << 32) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros8B_()
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{
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for (int cnt = 0; cnt <= 8; cnt++)
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{
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ulong rnd = GenLeadingZeros8(cnt);
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yield return (rnd << 56) | (rnd << 48) | (rnd << 40) | (rnd << 32) |
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(rnd << 24) | (rnd << 16) | (rnd << 08) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros4H_()
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{
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for (int cnt = 0; cnt <= 16; cnt++)
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{
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ulong rnd = GenLeadingZeros16(cnt);
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yield return (rnd << 48) | (rnd << 32) | (rnd << 16) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros2S_()
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{
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for (int cnt = 0; cnt <= 32; cnt++)
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{
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ulong rnd = GenLeadingZeros32(cnt);
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yield return (rnd << 32) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenPopCnt8B_()
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{
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for (ulong cnt = 0ul; cnt <= 255ul; cnt++)
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{
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yield return (cnt << 56) | (cnt << 48) | (cnt << 40) | (cnt << 32) |
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(cnt << 24) | (cnt << 16) | (cnt << 08) | cnt;
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}
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}
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}
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#endregion
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#endregion
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@ -1264,7 +1279,7 @@ namespace Ryujinx.Tests.Cpu
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_8B_16B([Values(0u)] uint rd,
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public void Cls_V_8B_16B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns8B_")] [Random(RndCnt)] ulong a,
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[ValueSource("_GenLeadingSigns8B_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
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[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
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{
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{
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@ -1283,7 +1298,7 @@ namespace Ryujinx.Tests.Cpu
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_4H_8H([Values(0u)] uint rd,
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public void Cls_V_4H_8H([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns4H_")] [Random(RndCnt)] ulong z,
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[ValueSource("_4H_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns4H_")] [Random(RndCnt)] ulong a,
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[ValueSource("_GenLeadingSigns4H_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
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[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
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{
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{
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@ -1302,7 +1317,7 @@ namespace Ryujinx.Tests.Cpu
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_2S_4S([Values(0u)] uint rd,
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public void Cls_V_2S_4S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns2S_")] [Random(RndCnt)] ulong a,
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[ValueSource("_GenLeadingSigns2S_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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{
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{
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@ -1321,7 +1336,7 @@ namespace Ryujinx.Tests.Cpu
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[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
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[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
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public void Clz_V_8B_16B([Values(0u)] uint rd,
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public void Clz_V_8B_16B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingZeros8B_")] [Random(RndCnt)] ulong z,
|
[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
|
||||||
[ValueSource("_GenLeadingZeros8B_")] [Random(RndCnt)] ulong a,
|
[ValueSource("_GenLeadingZeros8B_")] [Random(RndCnt)] ulong a,
|
||||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||||
{
|
{
|
||||||
@ -1340,7 +1355,7 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
|
[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
|
||||||
public void Clz_V_4H_8H([Values(0u)] uint rd,
|
public void Clz_V_4H_8H([Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_GenLeadingZeros4H_")] [Random(RndCnt)] ulong z,
|
[ValueSource("_4H_")] [Random(RndCnt)] ulong z,
|
||||||
[ValueSource("_GenLeadingZeros4H_")] [Random(RndCnt)] ulong a,
|
[ValueSource("_GenLeadingZeros4H_")] [Random(RndCnt)] ulong a,
|
||||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||||
{
|
{
|
||||||
@ -1359,7 +1374,7 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
|
[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
|
||||||
public void Clz_V_2S_4S([Values(0u)] uint rd,
|
public void Clz_V_2S_4S([Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_GenLeadingZeros2S_")] [Random(RndCnt)] ulong z,
|
[ValueSource("_2S_")] [Random(RndCnt)] ulong z,
|
||||||
[ValueSource("_GenLeadingZeros2S_")] [Random(RndCnt)] ulong a,
|
[ValueSource("_GenLeadingZeros2S_")] [Random(RndCnt)] ulong a,
|
||||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||||
{
|
{
|
||||||
@ -1654,7 +1669,7 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
public void Cnt_V_8B([Values(0u)] uint rd,
|
public void Cnt_V_8B([Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
|
[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
|
||||||
[ValueSource("_8B_")] [Random(RndCnt)] ulong a)
|
[ValueSource("_GenPopCnt8B_")] [Random(RndCnt)] ulong a)
|
||||||
{
|
{
|
||||||
uint opcode = 0x0E205800; // CNT V0.8B, V0.8B
|
uint opcode = 0x0E205800; // CNT V0.8B, V0.8B
|
||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
@ -1671,7 +1686,7 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
public void Cnt_V_16B([Values(0u)] uint rd,
|
public void Cnt_V_16B([Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
|
[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
|
||||||
[ValueSource("_8B_")] [Random(RndCnt)] ulong a)
|
[ValueSource("_GenPopCnt8B_")] [Random(RndCnt)] ulong a)
|
||||||
{
|
{
|
||||||
uint opcode = 0x4E205800; // CNT V0.16B, V0.16B
|
uint opcode = 0x4E205800; // CNT V0.16B, V0.16B
|
||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
@ -14,6 +14,18 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
#if SimdCvt
|
#if SimdCvt
|
||||||
|
|
||||||
#region "ValueSource (Types)"
|
#region "ValueSource (Types)"
|
||||||
|
private static uint[] _W_()
|
||||||
|
{
|
||||||
|
return new uint[] { 0x00000000u, 0x7FFFFFFFu,
|
||||||
|
0x80000000u, 0xFFFFFFFFu };
|
||||||
|
}
|
||||||
|
|
||||||
|
private static ulong[] _X_()
|
||||||
|
{
|
||||||
|
return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||||
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
|
||||||
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _1S_F_WX_()
|
private static IEnumerable<ulong> _1S_F_WX_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
@ -177,18 +189,6 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
yield return rnd6;
|
yield return rnd6;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static uint[] _W_()
|
|
||||||
{
|
|
||||||
return new uint[] { 0x00000000u, 0x7FFFFFFFu,
|
|
||||||
0x80000000u, 0xFFFFFFFFu };
|
|
||||||
}
|
|
||||||
|
|
||||||
private static ulong[] _X_()
|
|
||||||
{
|
|
||||||
return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
||||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
|
|
||||||
}
|
|
||||||
#endregion
|
#endregion
|
||||||
|
|
||||||
#region "ValueSource (Opcodes)"
|
#region "ValueSource (Opcodes)"
|
||||||
|
@ -84,10 +84,11 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
opcode |= (imm5 << 16);
|
opcode |= (imm5 << 16);
|
||||||
opcode |= ((q & 1) << 30);
|
opcode |= ((q & 1) << 30);
|
||||||
|
|
||||||
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: wn, v0: v0);
|
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
@ -100,10 +101,11 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
uint opcode = 0x4E080C00; // DUP V0.2D, X0
|
uint opcode = 0x4E080C00; // DUP V0.2D, X0
|
||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: xn, v0: v0);
|
SingleOpcode(opcode, x1: xn, x31: x31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
@ -303,9 +305,10 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
opcode |= (imm5 << 16);
|
opcode |= (imm5 << 16);
|
||||||
|
|
||||||
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: wn, v0: v0);
|
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
@ -325,9 +328,10 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
opcode |= (imm5 << 16);
|
opcode |= (imm5 << 16);
|
||||||
|
|
||||||
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: wn, v0: v0);
|
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
@ -347,9 +351,10 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
opcode |= (imm5 << 16);
|
opcode |= (imm5 << 16);
|
||||||
|
|
||||||
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: wn, v0: v0);
|
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
@ -369,9 +374,10 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
opcode |= (imm5 << 16);
|
opcode |= (imm5 << 16);
|
||||||
|
|
||||||
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
|
||||||
SingleOpcode(opcode, x1: xn, v0: v0);
|
SingleOpcode(opcode, x1: xn, x31: x31, v0: v0);
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
CompareAgainstUnicorn();
|
||||||
}
|
}
|
||||||
|
@ -27,8 +27,8 @@
|
|||||||
</PropertyGroup>
|
</PropertyGroup>
|
||||||
|
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<PackageReference Include="Microsoft.NET.Test.Sdk" Version="16.0.1" />
|
<PackageReference Include="Microsoft.NET.Test.Sdk" Version="16.2.0" />
|
||||||
<PackageReference Include="NUnit" Version="3.11.0" />
|
<PackageReference Include="NUnit" Version="3.12.0" />
|
||||||
<PackageReference Include="NUnit3TestAdapter" Version="3.13.0" />
|
<PackageReference Include="NUnit3TestAdapter" Version="3.13.0" />
|
||||||
<PackageReference Include="System.Runtime.Intrinsics.Experimental" Version="4.5.0-rc1" />
|
<PackageReference Include="System.Runtime.Intrinsics.Experimental" Version="4.5.0-rc1" />
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
|
Loading…
Reference in New Issue
Block a user