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Remove old, unused CPU optimization (#1586)
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parent
26319d5ab3
commit
f2b12c9749
@ -4,8 +4,6 @@ namespace ARMeilleure
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{
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public static class Optimizations
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{
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public static bool AssumeStrictAbiCompliance { get; set; } = true;
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public static bool FastFP { get; set; } = true;
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public static bool UseSseIfAvailable { get; set; } = true;
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@ -9,12 +9,6 @@ namespace ARMeilleure.Translation
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{
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static class RegisterUsage
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{
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private const long CallerSavedIntRegistersMask = 0x7fL << 9;
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private const long PStateNzcvFlagsMask = 0xfL << 60;
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private const long FpStateNzcvFlagsMask = 0xfL << 60;
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private const long CallerSavedVecRegistersMask = 0xffffL << 16;
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private const int RegsCount = 32;
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private const int RegsMask = RegsCount - 1;
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@ -70,7 +64,7 @@ namespace ARMeilleure.Translation
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}
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}
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public static void RunPass(ControlFlowGraph cfg, ExecutionMode mode, bool isCompleteFunction)
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public static void RunPass(ControlFlowGraph cfg, ExecutionMode mode)
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{
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// Compute local register inputs and outputs used inside blocks.
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RegisterMask[] localInputs = new RegisterMask[cfg.Blocks.Count];
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@ -215,8 +209,8 @@ namespace ARMeilleure.Translation
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if (EndsWithReturn(block) || hasContextStore)
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{
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StoreLocals(block, globalOutputs[block.Index].IntMask, RegisterType.Integer, mode, isCompleteFunction);
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StoreLocals(block, globalOutputs[block.Index].VecMask, RegisterType.Vector, mode, isCompleteFunction);
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StoreLocals(block, globalOutputs[block.Index].IntMask, RegisterType.Integer, mode);
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StoreLocals(block, globalOutputs[block.Index].VecMask, RegisterType.Vector, mode);
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}
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}
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}
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@ -309,20 +303,8 @@ namespace ARMeilleure.Translation
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block.Operations.AddFirst(loadArg0);
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}
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private static void StoreLocals(BasicBlock block, long outputs, RegisterType baseType, ExecutionMode mode, bool isCompleteFunction)
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private static void StoreLocals(BasicBlock block, long outputs, RegisterType baseType, ExecutionMode mode)
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{
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if (Optimizations.AssumeStrictAbiCompliance && isCompleteFunction)
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{
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if (baseType == RegisterType.Integer || baseType == RegisterType.Flag)
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{
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outputs = ClearCallerSavedIntRegs(outputs);
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}
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else /* if (baseType == RegisterType.Vector || baseType == RegisterType.FpFlag) */
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{
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outputs = ClearCallerSavedVecRegs(outputs);
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}
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}
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Operand arg0 = Local(OperandType.I64);
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Operation loadArg0 = Operation(Instruction.LoadArgument, arg0, Const(0));
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@ -396,21 +378,5 @@ namespace ARMeilleure.Translation
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return operation.Instruction == Instruction.Return;
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}
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private static long ClearCallerSavedIntRegs(long mask)
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{
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// TODO: ARM32 support.
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mask &= ~(CallerSavedIntRegistersMask | PStateNzcvFlagsMask);
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return mask;
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}
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private static long ClearCallerSavedVecRegs(long mask)
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{
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// TODO: ARM32 support.
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mask &= ~(CallerSavedVecRegistersMask | FpStateNzcvFlagsMask);
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return mask;
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}
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}
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}
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@ -202,7 +202,7 @@ namespace ARMeilleure.Translation
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Logger.StartPass(PassName.RegisterUsage);
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RegisterUsage.RunPass(cfg, mode, isCompleteFunction: false);
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RegisterUsage.RunPass(cfg, mode);
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Logger.EndPass(PassName.RegisterUsage);
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