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Faster crc32 implementation (#1294)
* Add Pclmulqdq intrinsic * Implement crc32 in terms of pclmulqdq * Address PR comments
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@ -165,6 +165,7 @@ namespace ARMeilleure.CodeGen.X86
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Add(X86Instruction.Pavgb, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x00000fe0, InstructionFlags.Vex | InstructionFlags.Prefix66));
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Add(X86Instruction.Pavgw, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x00000fe3, InstructionFlags.Vex | InstructionFlags.Prefix66));
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Add(X86Instruction.Pblendvb, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x000f3810, InstructionFlags.Prefix66));
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Add(X86Instruction.Pclmulqdq, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x000f3a44, InstructionFlags.Vex | InstructionFlags.Prefix66));
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Add(X86Instruction.Pcmpeqb, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x00000f74, InstructionFlags.Vex | InstructionFlags.Prefix66));
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Add(X86Instruction.Pcmpeqd, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x00000f76, InstructionFlags.Vex | InstructionFlags.Prefix66));
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Add(X86Instruction.Pcmpeqq, new InstructionInfo(BadOp, BadOp, BadOp, BadOp, 0x000f3829, InstructionFlags.Vex | InstructionFlags.Prefix66));
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@ -633,6 +634,13 @@ namespace ARMeilleure.CodeGen.X86
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WriteInstruction(dest, source, type, X86Instruction.Or);
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}
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public void Pclmulqdq(Operand dest, Operand source, byte imm)
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{
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WriteInstruction(dest, null, source, X86Instruction.Pclmulqdq);
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WriteByte(imm);
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}
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public void Pcmpeqw(Operand dest, Operand src1, Operand src2)
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{
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WriteInstruction(dest, src1, src2, X86Instruction.Pcmpeqw);
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@ -82,6 +82,7 @@ namespace ARMeilleure.CodeGen.X86
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Add(Intrinsic.X86Pavgb, new IntrinsicInfo(X86Instruction.Pavgb, IntrinsicType.Binary));
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Add(Intrinsic.X86Pavgw, new IntrinsicInfo(X86Instruction.Pavgw, IntrinsicType.Binary));
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Add(Intrinsic.X86Pblendvb, new IntrinsicInfo(X86Instruction.Pblendvb, IntrinsicType.Ternary));
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Add(Intrinsic.X86Pclmulqdq, new IntrinsicInfo(X86Instruction.Pclmulqdq, IntrinsicType.TernaryImm));
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Add(Intrinsic.X86Pcmpeqb, new IntrinsicInfo(X86Instruction.Pcmpeqb, IntrinsicType.Binary));
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Add(Intrinsic.X86Pcmpeqd, new IntrinsicInfo(X86Instruction.Pcmpeqd, IntrinsicType.Binary));
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Add(Intrinsic.X86Pcmpeqq, new IntrinsicInfo(X86Instruction.Pcmpeqq, IntrinsicType.Binary));
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@ -98,6 +98,7 @@ namespace ARMeilleure.CodeGen.X86
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Pavgb,
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Pavgw,
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Pblendvb,
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Pclmulqdq,
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Pcmpeqb,
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Pcmpeqd,
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Pcmpeqq,
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@ -1,9 +1,13 @@
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// https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
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using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using System;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.Instructions.InstEmitSimdHelper;
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using static ARMeilleure.IntermediateRepresentation.OperandHelper;
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namespace ARMeilleure.Instructions
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{
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@ -11,42 +15,159 @@ namespace ARMeilleure.Instructions
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{
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public static void Crc32b(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U8(SoftFallback.Crc32b));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, false, 8);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U8(SoftFallback.Crc32b));
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}
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}
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public static void Crc32h(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U16(SoftFallback.Crc32h));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, false, 16);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U16(SoftFallback.Crc32h));
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}
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}
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public static void Crc32w(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U32(SoftFallback.Crc32w));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, false, 32);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U32(SoftFallback.Crc32w));
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}
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}
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public static void Crc32x(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U64(SoftFallback.Crc32x));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized64(context, false);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U64(SoftFallback.Crc32x));
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}
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}
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public static void Crc32cb(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U8(SoftFallback.Crc32cb));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, true, 8);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U8(SoftFallback.Crc32cb));
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}
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}
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public static void Crc32ch(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U16(SoftFallback.Crc32ch));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, true, 16);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U16(SoftFallback.Crc32ch));
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}
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}
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public static void Crc32cw(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U32(SoftFallback.Crc32cw));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized(context, true, 32);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U32(SoftFallback.Crc32cw));
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}
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}
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public static void Crc32cx(ArmEmitterContext context)
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{
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EmitCrc32Call(context, new _U32_U32_U64(SoftFallback.Crc32cx));
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if (Optimizations.UsePclmulqdq)
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{
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EmitCrc32Optimized64(context, true);
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}
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else
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{
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EmitCrc32Call(context, new _U32_U32_U64(SoftFallback.Crc32cx));
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}
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}
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private static void EmitCrc32Optimized(ArmEmitterContext context, bool castagnoli, int bitsize)
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{
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OpCodeAluBinary op = (OpCodeAluBinary)context.CurrOp;
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long mu = castagnoli ? 0x0DEA713F1 : 0x1F7011641; // mu' = floor(x^64/P(x))'
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long polynomial = castagnoli ? 0x105EC76F0 : 0x1DB710641; // P'(x) << 1
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Operand crc = GetIntOrZR(context, op.Rn);
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Operand data = GetIntOrZR(context, op.Rm);
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crc = context.VectorInsert(context.VectorZero(), crc, 0);
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switch (bitsize)
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{
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case 8: data = context.VectorInsert8(context.VectorZero(), data, 0); break;
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case 16: data = context.VectorInsert16(context.VectorZero(), data, 0); break;
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case 32: data = context.VectorInsert(context.VectorZero(), data, 0); break;
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}
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Operand tmp = context.AddIntrinsic(Intrinsic.X86Pxor, crc, data);
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tmp = context.AddIntrinsic(Intrinsic.X86Psllq, tmp, Const(64 - bitsize));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, mu), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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if (bitsize < 32)
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{
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crc = context.AddIntrinsic(Intrinsic.X86Pslldq, crc, Const((64 - bitsize) / 8));
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tmp = context.AddIntrinsic(Intrinsic.X86Pxor, tmp, crc);
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}
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SetIntOrZR(context, op.Rd, context.VectorExtract(OperandType.I32, tmp, 2));
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}
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private static void EmitCrc32Optimized64(ArmEmitterContext context, bool castagnoli)
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{
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OpCodeAluBinary op = (OpCodeAluBinary)context.CurrOp;
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long mu = castagnoli ? 0x0DEA713F1 : 0x1F7011641; // mu' = floor(x^64/P(x))'
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long polynomial = castagnoli ? 0x105EC76F0 : 0x1DB710641; // P'(x) << 1
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Operand crc = GetIntOrZR(context, op.Rn);
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Operand data = GetIntOrZR(context, op.Rm);
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crc = context.VectorInsert(context.VectorZero(), crc, 0);
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data = context.VectorInsert(context.VectorZero(), data, 0);
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Operand tmp = context.AddIntrinsic(Intrinsic.X86Pxor, crc, data);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pslldq, tmp, Const(4));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, res, X86GetScalar(context, mu), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pxor, tmp, res);
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tmp = context.AddIntrinsic(Intrinsic.X86Psllq, tmp, Const(32));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, mu), Const(1));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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SetIntOrZR(context, op.Rd, context.VectorExtract(OperandType.I32, tmp, 2));
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}
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private static void EmitCrc32Call(ArmEmitterContext context, Delegate dlg)
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@ -71,6 +71,7 @@ namespace ARMeilleure.IntermediateRepresentation
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X86Pavgb,
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X86Pavgw,
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X86Pblendvb,
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X86Pclmulqdq,
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X86Pcmpeqb,
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X86Pcmpeqd,
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X86Pcmpeqq,
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@ -8,15 +8,16 @@ namespace ARMeilleure
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public static bool FastFP { get; set; } = true;
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public static bool UseSseIfAvailable { get; set; } = true;
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public static bool UseSse2IfAvailable { get; set; } = true;
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public static bool UseSse3IfAvailable { get; set; } = true;
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public static bool UseSsse3IfAvailable { get; set; } = true;
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public static bool UseSse41IfAvailable { get; set; } = true;
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public static bool UseSse42IfAvailable { get; set; } = true;
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public static bool UsePopCntIfAvailable { get; set; } = true;
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public static bool UseAvxIfAvailable { get; set; } = true;
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public static bool UseAesniIfAvailable { get; set; } = true;
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public static bool UseSseIfAvailable { get; set; } = true;
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public static bool UseSse2IfAvailable { get; set; } = true;
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public static bool UseSse3IfAvailable { get; set; } = true;
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public static bool UseSsse3IfAvailable { get; set; } = true;
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public static bool UseSse41IfAvailable { get; set; } = true;
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public static bool UseSse42IfAvailable { get; set; } = true;
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public static bool UsePopCntIfAvailable { get; set; } = true;
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public static bool UseAvxIfAvailable { get; set; } = true;
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public static bool UseAesniIfAvailable { get; set; } = true;
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public static bool UsePclmulqdqIfAvailable { get; set; } = true;
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public static bool ForceLegacySse
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{
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@ -24,14 +25,15 @@ namespace ARMeilleure
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set => HardwareCapabilities.ForceLegacySse = value;
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}
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internal static bool UseSse => UseSseIfAvailable && HardwareCapabilities.SupportsSse;
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internal static bool UseSse2 => UseSse2IfAvailable && HardwareCapabilities.SupportsSse2;
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internal static bool UseSse3 => UseSse3IfAvailable && HardwareCapabilities.SupportsSse3;
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internal static bool UseSsse3 => UseSsse3IfAvailable && HardwareCapabilities.SupportsSsse3;
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internal static bool UseSse41 => UseSse41IfAvailable && HardwareCapabilities.SupportsSse41;
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internal static bool UseSse42 => UseSse42IfAvailable && HardwareCapabilities.SupportsSse42;
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internal static bool UsePopCnt => UsePopCntIfAvailable && HardwareCapabilities.SupportsPopcnt;
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internal static bool UseAvx => UseAvxIfAvailable && HardwareCapabilities.SupportsAvx && !ForceLegacySse;
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internal static bool UseAesni => UseAesniIfAvailable && HardwareCapabilities.SupportsAesni;
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internal static bool UseSse => UseSseIfAvailable && HardwareCapabilities.SupportsSse;
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internal static bool UseSse2 => UseSse2IfAvailable && HardwareCapabilities.SupportsSse2;
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internal static bool UseSse3 => UseSse3IfAvailable && HardwareCapabilities.SupportsSse3;
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internal static bool UseSsse3 => UseSsse3IfAvailable && HardwareCapabilities.SupportsSsse3;
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internal static bool UseSse41 => UseSse41IfAvailable && HardwareCapabilities.SupportsSse41;
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internal static bool UseSse42 => UseSse42IfAvailable && HardwareCapabilities.SupportsSse42;
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internal static bool UsePopCnt => UsePopCntIfAvailable && HardwareCapabilities.SupportsPopcnt;
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internal static bool UseAvx => UseAvxIfAvailable && HardwareCapabilities.SupportsAvx && !ForceLegacySse;
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internal static bool UseAesni => UseAesniIfAvailable && HardwareCapabilities.SupportsAesni;
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internal static bool UsePclmulqdq => UsePclmulqdqIfAvailable && HardwareCapabilities.SupportsPclmulqdq;
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}
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}
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