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Add an early TailMerge
pass (#2721)
* Add an early `TailMerge` pass Some translations can have a lot of guest calls and since for each guest call there is a call guard which may return. This can produce a lot of epilogue code for returns. This pass merges the epilogue into a single block. ``` Using filter 'hcq'. Using metric 'code size'. Total diff: -1648111 (-7.19 %) (bytes): Base: 22913847 Diff: 21265736 Improved: 4567, regressed: 14, unchanged: 144 ``` * Set PTC version * Address feedback * Handle `void` returning functions * Actually handle `void` returning functions * Fix `RegisterToLocal` logging
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@ -17,7 +17,7 @@ namespace ARMeilleure.CodeGen.Optimizations
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BasicBlock lastBlock = cfg.Blocks.Last;
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// Move cold blocks at the end of the list, so that they are emitted away from hot code.
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for (block = cfg.Blocks.First; block != lastBlock; block = nextBlock)
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for (block = cfg.Blocks.First; block != null; block = nextBlock)
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{
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nextBlock = block.ListNext;
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@ -26,6 +26,11 @@ namespace ARMeilleure.CodeGen.Optimizations
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cfg.Blocks.Remove(block);
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cfg.Blocks.AddLast(block);
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}
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if (block == lastBlock)
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{
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break;
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}
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}
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for (block = cfg.Blocks.First; block != null; block = nextBlock)
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83
ARMeilleure/CodeGen/Optimizations/TailMerge.cs
Normal file
83
ARMeilleure/CodeGen/Optimizations/TailMerge.cs
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@ -0,0 +1,83 @@
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using static ARMeilleure.IntermediateRepresentation.Operation.Factory;
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namespace ARMeilleure.CodeGen.Optimizations
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{
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static class TailMerge
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{
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public static void RunPass(in CompilerContext cctx)
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{
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ControlFlowGraph cfg = cctx.Cfg;
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BasicBlock mergedReturn = new(cfg.Blocks.Count);
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Operand returnValue;
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Operation returnOp;
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if (cctx.FuncReturnType == OperandType.None)
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{
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returnValue = default;
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returnOp = Operation(Instruction.Return, default);
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}
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else
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{
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returnValue = cfg.AllocateLocal(cctx.FuncReturnType);
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returnOp = Operation(Instruction.Return, default, returnValue);
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}
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mergedReturn.Frequency = BasicBlockFrequency.Cold;
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mergedReturn.Operations.AddLast(returnOp);
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for (BasicBlock block = cfg.Blocks.First; block != null; block = block.ListNext)
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{
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Operation op = block.Operations.Last;
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if (op != default && op.Instruction == Instruction.Return)
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{
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block.Operations.Remove(op);
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if (cctx.FuncReturnType == OperandType.None)
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{
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PrepareMerge(block, mergedReturn);
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}
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else
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{
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Operation copyOp = Operation(Instruction.Copy, returnValue, op.GetSource(0));
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PrepareMerge(block, mergedReturn).Append(copyOp);
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}
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}
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}
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cfg.Blocks.AddLast(mergedReturn);
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cfg.Update();
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}
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private static BasicBlock PrepareMerge(BasicBlock from, BasicBlock to)
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{
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BasicBlock fromPred = from.Predecessors.Count == 1 ? from.Predecessors[0] : null;
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// If the block is empty, we can try to append to the predecessor and avoid unnecessary jumps.
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if (from.Operations.Count == 0 && fromPred != null)
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{
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for (int i = 0; i < fromPred.SuccessorsCount; i++)
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{
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if (fromPred.GetSuccessor(i) == from)
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{
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fromPred.SetSuccessor(i, to);
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}
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}
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// NOTE: `from` becomes unreachable and the call to `cfg.Update()` will remove it.
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return fromPred;
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}
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else
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{
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from.AddSuccessor(to);
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return from;
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}
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}
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}
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}
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@ -5,8 +5,10 @@ namespace ARMeilleure.Diagnostics
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Decoding,
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Translation,
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RegisterUsage,
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TailMerge,
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Dominance,
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SsaConstruction,
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RegisterToLocal,
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Optimization,
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PreAllocation,
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RegisterAllocation,
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@ -1,4 +1,5 @@
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using ARMeilleure.CodeGen;
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using ARMeilleure.CodeGen.Optimizations;
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using ARMeilleure.CodeGen.X86;
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using ARMeilleure.Diagnostics;
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using ARMeilleure.IntermediateRepresentation;
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@ -13,31 +14,41 @@ namespace ARMeilleure.Translation
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OperandType retType,
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CompilerOptions options)
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{
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Logger.StartPass(PassName.Dominance);
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CompilerContext cctx = new(cfg, argTypes, retType, options);
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if ((options & CompilerOptions.SsaForm) != 0)
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if (options.HasFlag(CompilerOptions.Optimize))
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{
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Dominance.FindDominators(cfg);
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Dominance.FindDominanceFrontiers(cfg);
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Logger.StartPass(PassName.TailMerge);
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TailMerge.RunPass(cctx);
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Logger.EndPass(PassName.TailMerge, cfg);
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}
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Logger.EndPass(PassName.Dominance);
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Logger.StartPass(PassName.SsaConstruction);
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if ((options & CompilerOptions.SsaForm) != 0)
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if (options.HasFlag(CompilerOptions.SsaForm))
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{
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Logger.StartPass(PassName.Dominance);
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Dominance.FindDominators(cfg);
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Dominance.FindDominanceFrontiers(cfg);
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Logger.EndPass(PassName.Dominance);
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Logger.StartPass(PassName.SsaConstruction);
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Ssa.Construct(cfg);
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Logger.EndPass(PassName.SsaConstruction, cfg);
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}
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else
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{
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Logger.StartPass(PassName.RegisterToLocal);
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RegisterToLocal.Rename(cfg);
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Logger.EndPass(PassName.RegisterToLocal, cfg);
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}
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Logger.EndPass(PassName.SsaConstruction, cfg);
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CompilerContext cctx = new(cfg, argTypes, retType, options);
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return CodeGenerator.Generate(cctx);
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}
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}
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@ -10,7 +10,7 @@ namespace ARMeilleure.Translation
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private BasicBlock[] _postOrderBlocks;
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private int[] _postOrderMap;
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public int LocalsCount { get; }
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public int LocalsCount { get; private set; }
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public BasicBlock Entry { get; }
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public IntrusiveList<BasicBlock> Blocks { get; }
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public BasicBlock[] PostOrderBlocks => _postOrderBlocks;
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@ -25,6 +25,15 @@ namespace ARMeilleure.Translation
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Update();
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}
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public Operand AllocateLocal(OperandType type)
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{
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Operand result = Operand.Factory.Local(type);
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result.NumberLocal(++LocalsCount);
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return result;
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}
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public void Update()
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{
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RemoveUnreachableBlocks(Blocks);
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@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 2680; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 2721; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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@ -203,12 +203,18 @@ namespace ARMeilleure.Translation
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// It always needs a context load as it is the first block to run.
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if (block.Predecessors.Count == 0 || hasContextLoad)
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{
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arg = Local(OperandType.I64);
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long vecMask = globalInputs[block.Index].VecMask;
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long intMask = globalInputs[block.Index].IntMask;
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Operation loadArg = block.Operations.AddFirst(Operation(Instruction.LoadArgument, arg, Const(0)));
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if (vecMask != 0 || intMask != 0)
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{
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arg = Local(OperandType.I64);
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LoadLocals(block, globalInputs[block.Index].VecMask, RegisterType.Vector, mode, loadArg, arg);
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LoadLocals(block, globalInputs[block.Index].IntMask, RegisterType.Integer, mode, loadArg, arg);
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Operation loadArg = block.Operations.AddFirst(Operation(Instruction.LoadArgument, arg, Const(0)));
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LoadLocals(block, vecMask, RegisterType.Vector, mode, loadArg, arg);
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LoadLocals(block, intMask, RegisterType.Integer, mode, loadArg, arg);
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}
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}
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bool hasContextStore = HasContextStore(block);
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@ -220,15 +226,21 @@ namespace ARMeilleure.Translation
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if (EndsWithReturn(block) || hasContextStore)
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{
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if (arg == default)
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long vecMask = globalOutputs[block.Index].VecMask;
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long intMask = globalOutputs[block.Index].IntMask;
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if (vecMask != 0 || intMask != 0)
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{
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arg = Local(OperandType.I64);
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if (arg == default)
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{
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arg = Local(OperandType.I64);
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block.Append(Operation(Instruction.LoadArgument, arg, Const(0)));
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block.Append(Operation(Instruction.LoadArgument, arg, Const(0)));
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}
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StoreLocals(block, intMask, RegisterType.Integer, mode, arg);
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StoreLocals(block, vecMask, RegisterType.Vector, mode, arg);
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}
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StoreLocals(block, globalOutputs[block.Index].IntMask, RegisterType.Integer, mode, arg);
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StoreLocals(block, globalOutputs[block.Index].VecMask, RegisterType.Vector, mode, arg);
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}
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}
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}
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