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10c74182ba
Ryujinx/Ryujinx.Tests/Cpu
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LDj3SNuD 10c74182ba Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 
* Update CpuTestSimdShImm.cs

* Update OpCodeTable.cs

* Update CpuTestSimdReg.cs

* Add Ins_Gp & Ins_V Tests.

Improve Smov_S & Umov_S Tests.

* Add Bic_Vi & Orr_Vi Tests.

* OpTable Fixes for Bic_Vi & Orr_Vi Insts.

* Add Saddlv_V & Uaddlv_V Tests.

* Nit.

* Add Smull_V & Umull_V Tests.

Improve Simd Permute Tests.

* Nit.

* Add Fcsel_S Test.

* Add Fnmadd_S, Fnmsub_S & Fnmul_S Tests.

* Fmov_V -> Fmov_Vi

* OpTable Fixes for Fmov_Si & Fmov_Vi Insts.

* Add Fmov_Vi Test.

* Add Fmov_S Test.

* Add Fmov_Si Test.

Add new test category SimdFmov.

* Nit.

* OpTable Fixes for Fmov_Ftoi/1 & Fmov_Itof/1 Insts.

* Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts.

Small simpl. for Smov_S Inst.
Remove unnecessary method EmitIntZeroUpperIfNeeded.

* Add Fmov_Ftoi/1 & Fmov_Itof/1 Tests.
2019-06-29 20:02:48 -03:00
..
CpuTest.cs Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00
CpuTestAlu.cs Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 2019-06-12 09:03:31 -03:00
CpuTestAluImm.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestAluRs.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestAluRx.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestBfm.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestCcmpImm.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestCcmpReg.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestCsel.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestMisc.cs Add Tests for instructions Fcvtzs_Gp_Fixed & Fcvtzu_Gp_Fixed, Scvtf_Gp_Fixed & Ucvtf_Gp_Fixed. (#603) 2019-02-23 20:53:27 -03:00
CpuTestMov.cs Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 2019-06-12 09:03:31 -03:00
CpuTestMul.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestSimd.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdCrypto.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestSimdCvt.cs Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 2019-04-20 23:07:35 -03:00
CpuTestSimdExt.cs Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 2019-03-13 19:23:52 +11:00
CpuTestSimdFcond.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdFmov.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdImm.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdIns.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdReg.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdRegElem.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdRegElemF.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestSimdShImm.cs Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) 2019-06-29 20:02:48 -03:00
CpuTestSimdTbl.cs Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00