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14 lines
197 B
Tcl
14 lines
197 B
Tcl
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read_verilog ../../picorv32.v
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read_xdc synth_speed.xdc
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synth_design -part xc7k70t-fbg676 -top picorv32_axi
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opt_design
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place_design
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phys_opt_design
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route_design
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report_utilization
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report_timing
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