mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
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69 lines
2.2 KiB
ArmAsm
69 lines
2.2 KiB
ArmAsm
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# See LICENSE for license details.
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#*****************************************************************************
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# srai.S
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#-----------------------------------------------------------------------------
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#
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# Test srai instruction.
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#
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#include "riscv_test.h"
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#include "test_macros.h"
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RVTEST_RV32U
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RVTEST_CODE_BEGIN
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#-------------------------------------------------------------
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# Arithmetic tests
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#-------------------------------------------------------------
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TEST_IMM_OP( 2, srai, 0x00000000, 0x00000000, 0 );
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TEST_IMM_OP( 3, srai, 0xc0000000, 0x80000000, 1 );
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TEST_IMM_OP( 4, srai, 0xff000000, 0x80000000, 7 );
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TEST_IMM_OP( 5, srai, 0xfffe0000, 0x80000000, 14 );
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TEST_IMM_OP( 6, srai, 0xffffffff, 0x80000001, 31 );
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TEST_IMM_OP( 7, srai, 0x7fffffff, 0x7fffffff, 0 );
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TEST_IMM_OP( 8, srai, 0x3fffffff, 0x7fffffff, 1 );
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TEST_IMM_OP( 9, srai, 0x00ffffff, 0x7fffffff, 7 );
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TEST_IMM_OP( 10, srai, 0x0001ffff, 0x7fffffff, 14 );
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TEST_IMM_OP( 11, srai, 0x00000000, 0x7fffffff, 31 );
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TEST_IMM_OP( 12, srai, 0x81818181, 0x81818181, 0 );
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TEST_IMM_OP( 13, srai, 0xc0c0c0c0, 0x81818181, 1 );
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TEST_IMM_OP( 14, srai, 0xff030303, 0x81818181, 7 );
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TEST_IMM_OP( 15, srai, 0xfffe0606, 0x81818181, 14 );
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TEST_IMM_OP( 16, srai, 0xffffffff, 0x81818181, 31 );
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#-------------------------------------------------------------
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# Source/Destination tests
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#-------------------------------------------------------------
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TEST_IMM_SRC1_EQ_DEST( 17, srai, 0xff000000, 0x80000000, 7 );
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#-------------------------------------------------------------
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# Bypassing tests
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#-------------------------------------------------------------
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TEST_IMM_DEST_BYPASS( 18, 0, srai, 0xff000000, 0x80000000, 7 );
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TEST_IMM_DEST_BYPASS( 19, 1, srai, 0xfffe0000, 0x80000000, 14 );
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TEST_IMM_DEST_BYPASS( 20, 2, srai, 0xffffffff, 0x80000001, 31 );
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TEST_IMM_SRC1_BYPASS( 21, 0, srai, 0xff000000, 0x80000000, 7 );
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TEST_IMM_SRC1_BYPASS( 22, 1, srai, 0xfffe0000, 0x80000000, 14 );
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TEST_IMM_SRC1_BYPASS( 23, 2, srai, 0xffffffff, 0x80000001, 31 );
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TEST_IMM_ZEROSRC1( 24, srai, 0, 31 );
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TEST_IMM_ZERODEST( 25, srai, 33, 20 );
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#
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TEST_PASSFAIL
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RVTEST_CODE_END
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.data
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RVTEST_DATA_BEGIN
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TEST_DATA
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RVTEST_DATA_END
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