mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-12-02 18:14:15 +01:00
79 lines
1.6 KiB
Plaintext
79 lines
1.6 KiB
Plaintext
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CAPI=2:
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name : ::picorv32:0-r1
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filesets:
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rtl:
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files: [picorv32.v]
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file_type : verilogSource
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tb:
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files: [testbench.v]
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file_type : verilogSource
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depend:
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tb_ez:
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files: [testbench_ez.v]
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file_type : verilogSource
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tb_wb:
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files: [testbench_wb.v]
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file_type : verilogSource
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tb_verilator:
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files:
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- testbench.cc : {file_type : cppSource}
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targets:
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default:
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filesets: [rtl]
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lint:
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filesets: [rtl]
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default_tool : verilator
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tools:
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verilator:
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mode : lint-only
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toplevel : [picorv32_axi]
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test:
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default_tool: icarus
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filesets: [rtl, tb, "tool_verilator? (tb_verilator)"]
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parameters: [COMPRESSED_ISA, axi_test, firmware, noerror, trace, vcd, verbose]
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toplevel:
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- "tool_verilator? (picorv32_wrapper)"
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- "!tool_verilator? (testbench)"
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tools:
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verilator :
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cli_parser : fusesoc
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mode : cc
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verilator_options : [-Wno-fatal, --trace]
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test_ez:
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default_tool: icarus
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filesets: [rtl, tb_ez]
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parameters: [vcd]
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toplevel: [testbench]
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test_wb:
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default_tool: icarus
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filesets: [rtl, tb_wb]
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parameters: [COMPRESSED_ISA, firmware, noerror, trace, vcd]
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toplevel: [testbench]
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parameters:
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COMPRESSED_ISA:
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datatype : str
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default : 1
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paramtype : vlogdefine
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axi_test:
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datatype : bool
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paramtype : plusarg
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firmware:
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datatype : file
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paramtype : plusarg
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noerror:
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datatype : bool
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paramtype : plusarg
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trace:
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datatype : bool
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paramtype : plusarg
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vcd:
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datatype : bool
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paramtype : plusarg
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verbose:
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datatype : bool
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paramtype : plusarg
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