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32 lines
609 B
Systemverilog
32 lines
609 B
Systemverilog
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interface dma_scb ();
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logic start;
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logic stop;
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logic busy;
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logic direction;
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logic byte_swap;
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logic [26:0] starting_address;
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logic [26:0] transfer_length;
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modport controller (
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output start,
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output stop,
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input busy,
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output direction,
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output byte_swap,
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output starting_address,
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output transfer_length
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);
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modport dma (
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input start,
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input stop,
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output busy,
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input direction,
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input byte_swap,
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input starting_address,
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input transfer_length
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);
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endinterface
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