mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-12-05 19:34:14 +01:00
232 lines
9.8 KiB
Systemverilog
232 lines
9.8 KiB
Systemverilog
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module memory_arbiter (
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input clk,
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input reset,
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n64_scb.arbiter n64_scb,
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mem_bus.memory n64_bus,
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mem_bus.memory cfg_bus,
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mem_bus.memory usb_dma_bus,
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mem_bus.memory sd_dma_bus,
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mem_bus.controller sdram_mem_bus,
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mem_bus.controller flash_mem_bus,
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mem_bus.controller bram_mem_bus
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);
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typedef enum bit [1:0] {
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SOURCE_N64,
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SOURCE_CFG,
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SOURCE_USB_DMA,
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SOURCE_SD_DMA
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} e_source_request;
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logic n64_sdram_request;
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logic cfg_sdram_request;
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logic usb_dma_sdram_request;
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logic sd_dma_sdram_request;
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logic n64_flash_request;
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logic cfg_flash_request;
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logic usb_dma_flash_request;
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logic sd_dma_flash_request;
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logic n64_bram_request;
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logic cfg_bram_request;
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logic usb_dma_bram_request;
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logic sd_dma_bram_request;
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assign n64_sdram_request = n64_bus.request && !n64_bus.address[26];
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assign cfg_sdram_request = !n64_scb.pi_sdram_active && cfg_bus.request && !cfg_bus.address[26];
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assign usb_dma_sdram_request = !n64_scb.pi_sdram_active && usb_dma_bus.request && !usb_dma_bus.address[26];
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assign sd_dma_sdram_request = !n64_scb.pi_sdram_active && sd_dma_bus.request && !sd_dma_bus.address[26];
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assign n64_flash_request = n64_bus.request && (n64_bus.address[26:24] == 3'b100);
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assign cfg_flash_request = !n64_scb.pi_flash_active && cfg_bus.request && (cfg_bus.address[26:24] == 3'b100);
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assign usb_dma_flash_request = !n64_scb.pi_flash_active && usb_dma_bus.request && (usb_dma_bus.address[26:24] == 3'b100);
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assign sd_dma_flash_request = !n64_scb.pi_flash_active && sd_dma_bus.request && (sd_dma_bus.address[26:24] == 3'b100);
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assign n64_bram_request = n64_bus.request && (n64_bus.address[26:24] >= 3'b101);
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assign cfg_bram_request = cfg_bus.request && (cfg_bus.address[26:24] >= 3'b101);
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assign usb_dma_bram_request = usb_dma_bus.request && (usb_dma_bus.address[26:24] >= 3'b101);
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assign sd_dma_bram_request = sd_dma_bus.request && (sd_dma_bus.address[26:24] >= 3'b101);
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e_source_request sdram_source_request;
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always_ff @(posedge clk) begin
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if (reset) begin
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sdram_mem_bus.request <= 1'b0;
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end else begin
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if (!sdram_mem_bus.request) begin
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sdram_mem_bus.request <= (
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n64_sdram_request ||
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cfg_sdram_request ||
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usb_dma_sdram_request ||
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sd_dma_sdram_request
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);
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if (n64_sdram_request) begin
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sdram_mem_bus.write <= n64_bus.write;
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sdram_mem_bus.wmask <= n64_bus.wmask;
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sdram_mem_bus.address <= n64_bus.address;
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sdram_mem_bus.wdata <= n64_bus.wdata;
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sdram_source_request <= SOURCE_N64;
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end else if (cfg_sdram_request) begin
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sdram_mem_bus.write <= cfg_bus.write;
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sdram_mem_bus.wmask <= cfg_bus.wmask;
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sdram_mem_bus.address <= cfg_bus.address;
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sdram_mem_bus.wdata <= cfg_bus.wdata;
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sdram_source_request <= SOURCE_CFG;
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end else if (usb_dma_sdram_request) begin
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sdram_mem_bus.write <= usb_dma_bus.write;
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sdram_mem_bus.wmask <= usb_dma_bus.wmask;
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sdram_mem_bus.address <= usb_dma_bus.address;
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sdram_mem_bus.wdata <= usb_dma_bus.wdata;
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sdram_source_request <= SOURCE_USB_DMA;
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end else if (sd_dma_sdram_request) begin
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sdram_mem_bus.write <= sd_dma_bus.write;
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sdram_mem_bus.wmask <= sd_dma_bus.wmask;
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sdram_mem_bus.address <= sd_dma_bus.address;
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sdram_mem_bus.wdata <= sd_dma_bus.wdata;
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sdram_source_request <= SOURCE_SD_DMA;
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end
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end
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if (sdram_mem_bus.ack) begin
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sdram_mem_bus.request <= 1'b0;
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end
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end
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end
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e_source_request flash_source_request;
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always_ff @(posedge clk) begin
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if (reset) begin
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flash_mem_bus.request <= 1'b0;
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end else begin
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if (!flash_mem_bus.request) begin
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flash_mem_bus.request <= (
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n64_flash_request ||
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cfg_flash_request ||
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usb_dma_flash_request ||
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sd_dma_flash_request
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);
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if (n64_flash_request) begin
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flash_mem_bus.write <= n64_bus.write;
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flash_mem_bus.wmask <= n64_bus.wmask;
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flash_mem_bus.address <= n64_bus.address;
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flash_mem_bus.wdata <= n64_bus.wdata;
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flash_source_request <= SOURCE_N64;
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end else if (cfg_flash_request) begin
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flash_mem_bus.write <= cfg_bus.write;
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flash_mem_bus.wmask <= cfg_bus.wmask;
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flash_mem_bus.address <= cfg_bus.address;
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flash_mem_bus.wdata <= cfg_bus.wdata;
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flash_source_request <= SOURCE_CFG;
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end else if (usb_dma_flash_request) begin
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flash_mem_bus.write <= usb_dma_bus.write;
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flash_mem_bus.wmask <= usb_dma_bus.wmask;
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flash_mem_bus.address <= usb_dma_bus.address;
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flash_mem_bus.wdata <= usb_dma_bus.wdata;
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flash_source_request <= SOURCE_USB_DMA;
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end else if (sd_dma_flash_request) begin
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flash_mem_bus.write <= sd_dma_bus.write;
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flash_mem_bus.wmask <= sd_dma_bus.wmask;
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flash_mem_bus.address <= sd_dma_bus.address;
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flash_mem_bus.wdata <= sd_dma_bus.wdata;
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flash_source_request <= SOURCE_SD_DMA;
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end
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end
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if (flash_mem_bus.ack) begin
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flash_mem_bus.request <= 1'b0;
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end
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end
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end
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e_source_request bram_source_request;
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always_ff @(posedge clk) begin
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if (reset) begin
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bram_mem_bus.request <= 1'b0;
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end else begin
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if (!bram_mem_bus.request) begin
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bram_mem_bus.request <= (
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n64_bram_request ||
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cfg_bram_request ||
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usb_dma_bram_request ||
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sd_dma_bram_request
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);
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if (n64_bram_request) begin
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bram_mem_bus.write <= n64_bus.write;
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bram_mem_bus.wmask <= n64_bus.wmask;
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bram_mem_bus.address <= n64_bus.address;
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bram_mem_bus.wdata <= n64_bus.wdata;
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bram_source_request <= SOURCE_N64;
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end else if (cfg_bram_request) begin
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bram_mem_bus.write <= cfg_bus.write;
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bram_mem_bus.wmask <= cfg_bus.wmask;
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bram_mem_bus.address <= cfg_bus.address;
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bram_mem_bus.wdata <= cfg_bus.wdata;
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bram_source_request <= SOURCE_CFG;
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end else if (usb_dma_bram_request) begin
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bram_mem_bus.write <= usb_dma_bus.write;
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bram_mem_bus.wmask <= usb_dma_bus.wmask;
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bram_mem_bus.address <= usb_dma_bus.address;
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bram_mem_bus.wdata <= usb_dma_bus.wdata;
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bram_source_request <= SOURCE_USB_DMA;
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end else if (sd_dma_bram_request) begin
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bram_mem_bus.write <= sd_dma_bus.write;
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bram_mem_bus.wmask <= sd_dma_bus.wmask;
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bram_mem_bus.address <= sd_dma_bus.address;
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bram_mem_bus.wdata <= sd_dma_bus.wdata;
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bram_source_request <= SOURCE_SD_DMA;
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end
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end
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if (bram_mem_bus.ack) begin
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bram_mem_bus.request <= 1'b0;
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end
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end
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end
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always_comb begin
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n64_bus.ack = (
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((sdram_source_request == SOURCE_N64) && sdram_mem_bus.ack) ||
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((flash_source_request == SOURCE_N64) && flash_mem_bus.ack) ||
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((bram_source_request == SOURCE_N64) && bram_mem_bus.ack)
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);
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cfg_bus.ack = (
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((sdram_source_request == SOURCE_CFG) && sdram_mem_bus.ack) ||
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((flash_source_request == SOURCE_CFG) && flash_mem_bus.ack) ||
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((bram_source_request == SOURCE_CFG) && bram_mem_bus.ack)
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);
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usb_dma_bus.ack = (
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((sdram_source_request == SOURCE_USB_DMA) && sdram_mem_bus.ack) ||
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((flash_source_request == SOURCE_USB_DMA) && flash_mem_bus.ack) ||
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((bram_source_request == SOURCE_USB_DMA) && bram_mem_bus.ack)
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);
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sd_dma_bus.ack = (
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((sdram_source_request == SOURCE_SD_DMA) && sdram_mem_bus.ack) ||
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((flash_source_request == SOURCE_SD_DMA) && flash_mem_bus.ack) ||
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((bram_source_request == SOURCE_SD_DMA) && bram_mem_bus.ack)
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);
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n64_bus.rdata = n64_bram_request ? bram_mem_bus.rdata :
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n64_flash_request ? flash_mem_bus.rdata :
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sdram_mem_bus.rdata;
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cfg_bus.rdata = cfg_bram_request ? bram_mem_bus.rdata :
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cfg_flash_request ? flash_mem_bus.rdata :
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sdram_mem_bus.rdata;
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usb_dma_bus.rdata = usb_dma_bram_request ? bram_mem_bus.rdata :
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usb_dma_flash_request ? flash_mem_bus.rdata :
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sdram_mem_bus.rdata;
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sd_dma_bus.rdata = sd_dma_bram_request ? bram_mem_bus.rdata :
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sd_dma_flash_request ? flash_mem_bus.rdata :
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sdram_mem_bus.rdata;
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end
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endmodule
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