SummerCart64/sw/controller/src/flashram.h

#ifndef FLASHRAM_H__
#define FLASHRAM_H__


void flashram_init (void);

void flashram_process (void);


#endif
[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00			`#ifndef FLASHRAM_H__`
			`#define FLASHRAM_H__`


			`void flashram_init (void);`
[SC64][FW][SW] Controller rewrite to remove task subsystem + minor bug fixes (#64) This PR completely removes `task.c / task.h` from `sw/controller` STM32 code. Additionally, these changes were implemented: - Updated IPL3 - Added new diagnostic data (voltage and temperature) readout commands for USB and N64 - Fixed some issues with FlashRAM save type - Joybus timings were relaxed to accommodate communication with unsynchronized master controller (like _Datel Game Killer_, thanks @RWeick) - N64 embedded test program now waits for release of button press to proceed - Fixed issue where, in rare circumstances, I2C peripheral in STM32 would get locked-up on power-up - LED blinking behavior on SD card access was changed - LED blink duration on save writeback has been extended - Minor fixes through the entire of hardware abstraction layer for STM32 code - Primer now correctly detects issues with I2C bus during first time programming - `primer.py` script gives more meaningful error messages - Fixed bug where RTC time was always written on N64FlashcartMenu boot - sc64deployer now displays "Diagnostic data" instead of "MCU stack usage" 2024-01-29 14:23:18 +01:00
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19) * isv support + usb/dd improvements * make room for saves * update offset * fixed debug address * idk * exception * ironed out all broken stuff * cleanup * return epc fix * better * more cleanup * even more cleanup * mooore cleanup * fixed printf * no assert * improved docker build, pyft232 instead of pyserial * fixed displaying long message strings description test * just straight cleanup * smallest cleanup * PAL * cpu buffer * n64 bootloader done * super slow usb storage reading implemented * reduced buffer size * usb gets fast * little cleanup * double buffered reads * removed separate event id * ISV in hardware finally * small exception changes * mac testing * py spacing * fsd write, rtc, isv and reset fixes * fixxx * good stopping point * usb fixed? * pretend we have 128 MB sdram * backup * chmod * test * test done * more tests * user rm * help * final fix * updated component values * nice asset names * cic 64dd support * ddipl enable separation * pre DMA rewrite, created dedicated buffer memory space, simplified code * dma rewrite, needs testing * moved xml * dd basics * timing * 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite * added usb read functionality, general cleanup * changed mem addressing * added fpga flash update access * added mcu update * chmod * little cleanup * update format and stuff * fixes * uninitialized fix * small fixes * update fixes * update stuff done * fpga update tested * build time fix * boot fix * test timing * readme test * test 2 * reports * testseet * final * build test * forgot * button and naming * General cleanup And multiline commit message test * Exception screen UI touch ups * display separation and tests beginning * pc software update * pc software done * timing test * delete launch.json * sw fixes * fixed button hole diameter in shell * small cleanup, rpi testing * shell fillet fix, pc rtc printing * added cfg lock mechanism * moved lock to cfg address space * extended ROM and ISV fixes * preliminary sd card support * little sd card cleanup * sd menu fixes * 5 second limit * reduced shell thickness * basic led act blinking * faster sd menu loading * inst cache invalidate * sd card writing is working * SD card CSD and CID registers * wait for previous command * led error codes * fixed cfg_translate_address use * 64dd from sd card working * 64dd speedup and button handling * delayed address latching cycle - might break other builds, needs testing * bootloader improvements * small fixes * return previous cfg when setting new * cache stuff * unfloader debug protocol support * UNFLoader style debug command line support * requirements.txt * shell groove fillet * reset state inside controller * fixed fast PI read, added PI R/W fifo debug info * PI access prioritize * SD clock stop when RX FIFO is more than half full * flash erase method change * CFG error handling, TLOZ MM debug ISV support * CIC5167 support * general fixes * USB unplugged cable handling * turn off led when changing between error/act modes * rtc 2 bit clock stop support * line endings * Revert "line endings" This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb. * PI address debug * readme test * diagram update * diagram background * diagram background * diagram background * updated readme 2022-11-10 11:46:54 +01:00			`void flashram_process (void);`
[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00

			`#endif`