mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-12-01 17:44:14 +01:00
226 lines
6.0 KiB
C
226 lines
6.0 KiB
C
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#include "rtc.h"
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#include "i2c.h"
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enum rtc_regs {
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RTCSEC,
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RTCMIN,
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RTCHOUR,
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RTCWKDAY,
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RTCDATE,
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RTCMTH,
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RTCYEAR,
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};
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#define RTC_I2C_ADDR (0xDE)
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#define RTCSEC_ST (1 << 7)
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#define RTCWKDAY_OSCRUN (1 << 5)
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#define RTCWKDAY_VBAT (1 << 3)
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enum rtc_phase {
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RTC_PHASE_READ_START,
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RTC_PHASE_READ_READY,
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RTC_PHASE_STOP,
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RTC_PHASE_WAIT_STOP,
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RTC_PHASE_UPDATE,
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RTC_PHASE_START,
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RTC_PHASE_WAIT_START,
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};
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enum i2c_phase {
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I2C_PHASE_IDLE,
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I2C_PHASE_ADDR,
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I2C_PHASE_DATA,
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I2C_PHASE_READY,
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};
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struct process {
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enum rtc_phase rtc_phase;
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uint8_t data[7];
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bool running;
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rtc_time_t time;
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bool time_valid;
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bool new_time_valid;
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enum i2c_phase i2c_phase;
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bool i2c_pending;
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bool i2c_write;
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uint8_t i2c_address;
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uint8_t i2c_length;
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bool i2c_first_read_done;
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};
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static struct process p;
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static const uint8_t rtc_regs_bit_mask[7] = {
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0b01111111,
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0b01111111,
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0b00111111,
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0b00000111,
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0b00111111,
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0b00011111,
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0b11111111
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};
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static void sanitize_time (uint8_t *data) {
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for (int i = 0; i < 7; i++) {
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data[i] &= rtc_regs_bit_mask[i];
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}
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}
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rtc_time_t *rtc_get_time (void) {
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return &p.time;
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}
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bool rtc_is_time_valid (void) {
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return p.time_valid;
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}
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bool rtc_is_time_running (void) {
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return p.running;
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}
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void rtc_set_time (rtc_time_t *time) {
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p.time = *time;
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p.new_time_valid = true;
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}
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void rtc_init (void) {
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p.rtc_phase = RTC_PHASE_READ_START;
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p.running = false;
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p.time_valid = false;
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p.new_time_valid = false;
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p.i2c_phase = I2C_PHASE_IDLE;
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p.i2c_pending = false;
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}
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void process_rtc (void) {
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if (p.i2c_phase == I2C_PHASE_IDLE) {
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switch (p.rtc_phase) {
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case RTC_PHASE_READ_START:
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p.i2c_pending = true;
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p.i2c_write = false;
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p.i2c_address = RTCSEC;
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p.i2c_length = sizeof(p.data);
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p.rtc_phase = RTC_PHASE_READ_READY;
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break;
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case RTC_PHASE_READ_READY:
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p.time_valid = (!i2c_failed());
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if (p.new_time_valid) {
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p.rtc_phase = RTC_PHASE_STOP;
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break;
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} else if (p.time_valid) {
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p.running = p.data[RTCSEC] & RTCSEC_ST;
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sanitize_time(p.data);
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p.time.second = p.data[RTCSEC];
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p.time.minute = p.data[RTCMIN];
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p.time.hour = p.data[RTCHOUR];
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p.time.weekday = p.data[RTCWKDAY];
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p.time.day = p.data[RTCDATE];
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p.time.month = p.data[RTCMTH];
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p.time.year = p.data[RTCYEAR];
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}
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p.rtc_phase = RTC_PHASE_READ_START;
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break;
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case RTC_PHASE_STOP:
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p.i2c_pending = true;
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p.i2c_write = true;
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p.i2c_length = 2;
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p.i2c_first_read_done = false;
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p.data[0] = RTCSEC;
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p.data[1] = 0x00;
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p.rtc_phase = RTC_PHASE_WAIT_STOP;
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break;
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case RTC_PHASE_WAIT_STOP:
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if (p.i2c_first_read_done) {
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if (!(p.data[0] & RTCWKDAY_OSCRUN)) {
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p.rtc_phase = RTC_PHASE_UPDATE;
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break;
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}
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}
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p.i2c_pending = true;
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p.i2c_write = false;
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p.i2c_address = RTCWKDAY;
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p.i2c_length = 1;
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p.i2c_first_read_done = true;
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break;
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case RTC_PHASE_UPDATE:
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sanitize_time((uint8_t *)(&p.time));
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p.i2c_pending = true;
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p.i2c_write = true;
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p.i2c_length = 7;
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p.data[0] = RTCMIN;
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p.data[1] = p.time.minute;
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p.data[2] = p.time.hour;
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p.data[3] = p.time.weekday | RTCWKDAY_VBAT;
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p.data[4] = p.time.day;
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p.data[5] = p.time.month;
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p.data[6] = p.time.year;
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p.rtc_phase = RTC_PHASE_START;
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break;
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case RTC_PHASE_START:
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p.i2c_pending = true;
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p.i2c_write = true;
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p.i2c_length = 2;
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p.i2c_first_read_done = false;
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p.data[0] = RTCSEC;
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p.data[1] = p.time.second | RTCSEC_ST;
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p.rtc_phase = RTC_PHASE_WAIT_START;
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break;
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case RTC_PHASE_WAIT_START:
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if (p.i2c_first_read_done) {
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if (p.data[0] & RTCWKDAY_OSCRUN) {
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p.new_time_valid = false;
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p.rtc_phase = RTC_PHASE_READ_START;
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break;
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}
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}
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p.i2c_pending = true;
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p.i2c_write = false;
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p.i2c_address = RTCWKDAY;
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p.i2c_length = 1;
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p.i2c_first_read_done = true;
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break;
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}
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}
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if (!i2c_busy()) {
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switch (p.i2c_phase) {
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case I2C_PHASE_IDLE:
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if (p.i2c_pending) {
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p.i2c_pending = false;
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p.i2c_phase = p.i2c_write ? I2C_PHASE_DATA : I2C_PHASE_ADDR;
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}
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break;
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case I2C_PHASE_ADDR:
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i2c_trx(RTC_I2C_ADDR, &p.i2c_address, 1, true, false);
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p.i2c_phase = I2C_PHASE_DATA;
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break;
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case I2C_PHASE_DATA:
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i2c_trx(RTC_I2C_ADDR, p.data, p.i2c_length, p.i2c_write, true);
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p.i2c_phase = I2C_PHASE_READY;
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break;
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case I2C_PHASE_READY:
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p.i2c_phase = I2C_PHASE_IDLE;
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break;
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}
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}
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}
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