2023-01-06 23:47:00 +01:00
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// Original code sourced from https://github.com/jago85/UltraCIC_C
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// MIT License
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// Copyright (c) 2019 Jan Goldacker
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// Copyright (c) 2022 Mateusz Faderewski
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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// The above copyright notice and this permission notice shall be included in all
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// copies or substantial portions of the Software.
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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// SOFTWARE.
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[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements
* make room for saves
* update offset
* fixed debug address
* idk
* exception
* ironed out all broken stuff
* cleanup
* return epc fix
* better
* more cleanup
* even more cleanup
* mooore cleanup
* fixed printf
* no assert
* improved docker build, pyft232 instead of pyserial
* fixed displaying long message strings
description test
* just straight cleanup
* smallest cleanup
* PAL
* cpu buffer
* n64 bootloader done
* super slow usb storage reading implemented
* reduced buffer size
* usb gets fast
* little cleanup
* double buffered reads
* removed separate event id
* ISV in hardware finally
* small exception changes
* mac testing
* py spacing
* fsd write, rtc, isv and reset fixes
* fixxx
* good stopping point
* usb fixed?
* pretend we have 128 MB sdram
* backup
* chmod
* test
* test done
* more tests
* user rm
* help
* final fix
* updated component values
* nice asset names
* cic 64dd support
* ddipl enable separation
* pre DMA rewrite, created dedicated buffer memory space, simplified code
* dma rewrite, needs testing
* moved xml
* dd basics
* timing
* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite
* added usb read functionality, general cleanup
* changed mem addressing
* added fpga flash update access
* added mcu update
* chmod
* little cleanup
* update format and stuff
* fixes
* uninitialized fix
* small fixes
* update fixes
* update stuff done
* fpga update tested
* build time fix
* boot fix
* test timing
* readme test
* test 2
* reports
* testseet
* final
* build test
* forgot
* button and naming
* General cleanup
And multiline commit message test
* Exception screen UI touch ups
* display separation and tests beginning
* pc software update
* pc software done
* timing test
* delete launch.json
* sw fixes
* fixed button hole diameter in shell
* small cleanup, rpi testing
* shell fillet fix, pc rtc printing
* added cfg lock mechanism
* moved lock to cfg address space
* extended ROM and ISV fixes
* preliminary sd card support
* little sd card cleanup
* sd menu fixes
* 5 second limit
* reduced shell thickness
* basic led act blinking
* faster sd menu loading
* inst cache invalidate
* sd card writing is working
* SD card CSD and CID registers
* wait for previous command
* led error codes
* fixed cfg_translate_address use
* 64dd from sd card working
* 64dd speedup and button handling
* delayed address latching cycle - might break other builds, needs testing
* bootloader improvements
* small fixes
* return previous cfg when setting new
* cache stuff
* unfloader debug protocol support
* UNFLoader style debug command line support
* requirements.txt
* shell groove fillet
* reset state inside controller
* fixed fast PI read, added PI R/W fifo debug info
* PI access prioritize
* SD clock stop when RX FIFO is more than half full
* flash erase method change
* CFG error handling, TLOZ MM debug ISV support
* CIC5167 support
* general fixes
* USB unplugged cable handling
* turn off led when changing between error/act modes
* rtc 2 bit clock stop support
* line endings
* Revert "line endings"
This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb.
* PI address debug
* readme test
* diagram update
* diagram background
* diagram background
* diagram background
* updated readme
2022-11-10 11:46:54 +01:00
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#include <stdbool.h>
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#include "cic.h"
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#include "hw.h"
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#include "led.h"
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#include "rtc.h"
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#include "task.h"
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typedef enum {
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REGION_NTSC,
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REGION_PAL,
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__REGION_MAX
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} cic_region_t;
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static volatile bool cic_enabled = false;
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static volatile bool cic_detect_enabled;
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static volatile uint8_t cic_next_rd;
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static volatile uint8_t cic_next_wr;
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static volatile bool cic_disabled = false;
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static volatile bool cic_dd_mode = false;
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static volatile uint8_t cic_seed = 0x3F;
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static volatile uint8_t cic_checksum[6] = { 0xA5, 0x36, 0xC0, 0xF1, 0xD8, 0x59 };
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static uint8_t cic_ram[32];
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static uint8_t cic_x105_ram[30];
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static const uint8_t cic_ram_init[2][32] = {{
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0x0E, 0x00, 0x09, 0x0A, 0x01, 0x08, 0x05, 0x0A, 0x01, 0x03, 0x0E, 0x01, 0x00, 0x0D, 0x0E, 0x0C,
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0x00, 0x0B, 0x01, 0x04, 0x0F, 0x08, 0x0B, 0x05, 0x07, 0x0C, 0x0D, 0x06, 0x01, 0x0E, 0x09, 0x08
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}, {
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0x0E, 0x00, 0x04, 0x0F, 0x05, 0x01, 0x02, 0x01, 0x07, 0x01, 0x09, 0x08, 0x05, 0x07, 0x05, 0x0A,
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0x00, 0x0B, 0x01, 0x02, 0x03, 0x0F, 0x08, 0x02, 0x07, 0x01, 0x09, 0x08, 0x01, 0x01, 0x05, 0x0C
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}};
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static void cic_irq_reset_falling (void) {
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cic_enabled = false;
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hw_gpio_set(GPIO_ID_N64_CIC_DQ);
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led_clear_error(LED_ERROR_CIC);
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}
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static void cic_irq_reset_rising (void) {
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if (!cic_disabled) {
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cic_enabled = true;
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task_set_ready_and_reset(TASK_ID_CIC);
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}
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}
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static void cic_irq_clk_falling (void) {
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if (cic_enabled) {
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if (!cic_next_wr) {
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hw_gpio_reset(GPIO_ID_N64_CIC_DQ);
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}
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cic_next_rd = hw_gpio_get(GPIO_ID_N64_CIC_DQ) ? 1 : 0;
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task_set_ready(TASK_ID_CIC);
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}
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}
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static void cic_irq_clk_rising (void) {
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hw_gpio_set(GPIO_ID_N64_CIC_DQ);
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if (cic_detect_enabled) {
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cic_detect_enabled = false;
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if (!hw_gpio_get(GPIO_ID_N64_CIC_DQ)) {
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cic_enabled = false;
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}
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}
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}
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static uint8_t cic_read (void) {
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cic_next_wr = 1;
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task_yield();
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return cic_next_rd;
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}
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static void cic_write (uint8_t bit) {
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cic_next_wr = bit;
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task_yield();
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}
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static void cic_start_detect (void) {
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cic_detect_enabled = cic_dd_mode;
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}
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static uint8_t cic_read_nibble (void) {
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uint8_t data = 0;
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for (int i = 0; i < 4; i++) {
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data = ((data << 1) | cic_read());
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}
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return data;
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}
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static void cic_write_nibble (uint8_t data) {
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cic_write(data & 0x08);
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cic_write(data & 0x04);
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cic_write(data & 0x02);
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cic_write(data & 0x01);
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}
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static void cic_write_ram_nibbles (uint8_t index) {
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do {
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cic_write_nibble(cic_ram[index++]);
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} while ((index & 0x0F) != 0);
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}
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static void cic_encode_round (uint8_t index) {
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uint8_t data = cic_ram[index++];
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do {
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data = ((((data + 1) & 0x0F) + cic_ram[index]) & 0x0F);
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cic_ram[index++] = data;
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} while ((index & 0x0F) != 0);
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}
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static void cic_write_id (cic_region_t region) {
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cic_start_detect();
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cic_write(cic_dd_mode ? 1 : 0);
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cic_write(region == REGION_PAL ? 1 : 0);
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cic_write(0);
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cic_write(1);
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}
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static void cic_write_id_failed (void) {
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uint8_t current_region = rtc_get_region();
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uint8_t next_region = (current_region == REGION_NTSC) ? REGION_PAL : REGION_NTSC;
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rtc_set_region(next_region);
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led_blink_error(LED_ERROR_CIC);
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}
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static void cic_write_seed (void) {
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cic_ram[0x0A] = 0x0B;
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cic_ram[0x0B] = 0x05;
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cic_ram[0x0C] = (cic_seed >> 4);
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cic_ram[0x0D] = cic_seed;
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cic_ram[0x0E] = (cic_seed >> 4);
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cic_ram[0x0F] = cic_seed;
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cic_encode_round(0x0A);
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cic_encode_round(0x0A);
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cic_write_ram_nibbles(0x0A);
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}
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static void cic_write_checksum (void) {
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for (int i = 0; i < 4; i++) {
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cic_ram[i] = 0x00;
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}
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for (int i = 0; i < 6; i++) {
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cic_ram[(i * 2) + 4] = ((cic_checksum[i] >> 4) & 0x0F);
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cic_ram[(i * 2) + 5] = (cic_checksum[i] & 0x0F);
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}
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cic_encode_round(0x00);
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cic_encode_round(0x00);
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cic_encode_round(0x00);
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cic_encode_round(0x00);
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cic_write(0);
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cic_write_ram_nibbles(0x00);
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}
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static void cic_init_ram (cic_region_t region) {
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if (region < __REGION_MAX) {
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for (int i = 0; i < 32; i++) {
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cic_ram[i] = cic_ram_init[region][i];
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}
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}
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cic_ram[0x01] = cic_read_nibble();
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cic_ram[0x11] = cic_read_nibble();
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}
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static void cic_exchange_bytes (uint8_t *a, uint8_t *b) {
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uint8_t tmp = *a;
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*a = *b;
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*b = tmp;
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}
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static void cic_round (uint8_t *m) {
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uint8_t a, b, x;
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x = m[15];
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a = x;
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do {
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b = 1;
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a += (m[b] + 1);
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m[b] = a;
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b++;
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a += (m[b] + 1);
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cic_exchange_bytes(&a, &m[b]);
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m[b] = ~(m[b]);
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b++;
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a &= 0x0F;
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a += ((m[b] & 0x0F) + 1);
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if (a < 16) {
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cic_exchange_bytes(&a, &m[b]);
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b++;
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}
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a += m[b];
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m[b] = a;
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b++;
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a += m[b];
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cic_exchange_bytes(&a, &m[b]);
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b++;
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a &= 0x0F;
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a += 8;
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if (a < 16) {
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a += m[b];
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}
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cic_exchange_bytes(&a, &m[b]);
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b++;
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do {
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a += (m[b] + 1);
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m[b] = a;
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b++;
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b &= 0x0F;
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} while (b != 0);
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a = (x + 0x0F);
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x = (a & 0x0F);
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} while (x != 0x0F);
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}
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static void cic_compare_mode (cic_region_t region) {
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cic_round(&cic_ram[0x10]);
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cic_round(&cic_ram[0x10]);
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cic_round(&cic_ram[0x10]);
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uint8_t index = (cic_ram[0x17] & 0x0F);
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if (index == 0) {
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index = 1;
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}
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index |= 0x10;
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do {
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cic_read();
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cic_write(cic_ram[index] & 0x01);
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if (region == REGION_PAL) {
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index--;
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} else {
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index++;
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}
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} while (index & 0x0F);
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}
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static void cic_x105_algorithm (void) {
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uint8_t a = 5;
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uint8_t carry = 1;
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for (int i = 0; i < 30; ++i) {
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if (!(cic_x105_ram[i] & 0x01)) {
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a += 8;
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}
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if (!(a & 0x02)) {
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a += 4;
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}
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a = ((a + cic_x105_ram[i]) & 0x0F);
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cic_x105_ram[i] = a;
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if (!carry) {
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a += 7;
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}
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a = ((a + cic_x105_ram[i]) & 0x0F);
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a = (a + cic_x105_ram[i] + carry);
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if (a >= 0x10) {
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carry = 1;
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a -= 0x10;
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} else {
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carry = 0;
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}
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a = (~(a) & 0x0F);
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cic_x105_ram[i] = a;
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}
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}
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static void cic_x105_mode (void) {
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cic_write_nibble(0x0A);
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cic_write_nibble(0x0A);
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for (int i = 0; i < 30; i++) {
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cic_x105_ram[i] = cic_read_nibble();
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}
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cic_x105_algorithm();
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cic_write(0);
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for (int i = 0; i < 30; i++) {
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cic_write_nibble(cic_x105_ram[i]);
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}
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|
|
}
|
|
|
|
|
|
|
|
static void cic_soft_reset_timeout (void) {
|
|
|
|
hw_gpio_reset(GPIO_ID_N64_CIC_DQ);
|
|
|
|
task_set_ready(TASK_ID_CIC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cic_soft_reset (void) {
|
|
|
|
cic_read();
|
2023-02-10 21:38:49 +01:00
|
|
|
hw_tim_setup(TIM_ID_CIC, 500, cic_soft_reset_timeout);
|
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements
* make room for saves
* update offset
* fixed debug address
* idk
* exception
* ironed out all broken stuff
* cleanup
* return epc fix
* better
* more cleanup
* even more cleanup
* mooore cleanup
* fixed printf
* no assert
* improved docker build, pyft232 instead of pyserial
* fixed displaying long message strings
description test
* just straight cleanup
* smallest cleanup
* PAL
* cpu buffer
* n64 bootloader done
* super slow usb storage reading implemented
* reduced buffer size
* usb gets fast
* little cleanup
* double buffered reads
* removed separate event id
* ISV in hardware finally
* small exception changes
* mac testing
* py spacing
* fsd write, rtc, isv and reset fixes
* fixxx
* good stopping point
* usb fixed?
* pretend we have 128 MB sdram
* backup
* chmod
* test
* test done
* more tests
* user rm
* help
* final fix
* updated component values
* nice asset names
* cic 64dd support
* ddipl enable separation
* pre DMA rewrite, created dedicated buffer memory space, simplified code
* dma rewrite, needs testing
* moved xml
* dd basics
* timing
* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite
* added usb read functionality, general cleanup
* changed mem addressing
* added fpga flash update access
* added mcu update
* chmod
* little cleanup
* update format and stuff
* fixes
* uninitialized fix
* small fixes
* update fixes
* update stuff done
* fpga update tested
* build time fix
* boot fix
* test timing
* readme test
* test 2
* reports
* testseet
* final
* build test
* forgot
* button and naming
* General cleanup
And multiline commit message test
* Exception screen UI touch ups
* display separation and tests beginning
* pc software update
* pc software done
* timing test
* delete launch.json
* sw fixes
* fixed button hole diameter in shell
* small cleanup, rpi testing
* shell fillet fix, pc rtc printing
* added cfg lock mechanism
* moved lock to cfg address space
* extended ROM and ISV fixes
* preliminary sd card support
* little sd card cleanup
* sd menu fixes
* 5 second limit
* reduced shell thickness
* basic led act blinking
* faster sd menu loading
* inst cache invalidate
* sd card writing is working
* SD card CSD and CID registers
* wait for previous command
* led error codes
* fixed cfg_translate_address use
* 64dd from sd card working
* 64dd speedup and button handling
* delayed address latching cycle - might break other builds, needs testing
* bootloader improvements
* small fixes
* return previous cfg when setting new
* cache stuff
* unfloader debug protocol support
* UNFLoader style debug command line support
* requirements.txt
* shell groove fillet
* reset state inside controller
* fixed fast PI read, added PI R/W fifo debug info
* PI access prioritize
* SD clock stop when RX FIFO is more than half full
* flash erase method change
* CFG error handling, TLOZ MM debug ISV support
* CIC5167 support
* general fixes
* USB unplugged cable handling
* turn off led when changing between error/act modes
* rtc 2 bit clock stop support
* line endings
* Revert "line endings"
This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb.
* PI address debug
* readme test
* diagram update
* diagram background
* diagram background
* diagram background
* updated readme
2022-11-10 11:46:54 +01:00
|
|
|
task_yield();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void cic_reset_parameters (void) {
|
|
|
|
cic_disabled = false;
|
|
|
|
cic_dd_mode = false;
|
|
|
|
cic_seed = 0x3F;
|
|
|
|
cic_checksum[0] = 0xA5;
|
|
|
|
cic_checksum[1] = 0x36;
|
|
|
|
cic_checksum[2] = 0xC0;
|
|
|
|
cic_checksum[3] = 0xF1;
|
|
|
|
cic_checksum[4] = 0xD8;
|
|
|
|
cic_checksum[5] = 0x59;
|
|
|
|
}
|
|
|
|
|
|
|
|
void cic_set_parameters (uint32_t *args) {
|
|
|
|
cic_disabled = (args[0] >> 24) & (1 << 1);
|
|
|
|
cic_dd_mode = (args[0] >> 24) & (1 << 0);
|
|
|
|
cic_seed = (args[0] >> 16) & 0xFF;
|
|
|
|
cic_checksum[0] = (args[0] >> 8) & 0xFF;
|
|
|
|
cic_checksum[1] = args[0] & 0xFF;
|
|
|
|
cic_checksum[2] = (args[1] >> 24) & 0xFF;
|
|
|
|
cic_checksum[3] = (args[1] >> 16) & 0xFF;
|
|
|
|
cic_checksum[4] = (args[1] >> 8) & 0xFF;
|
|
|
|
cic_checksum[5] = args[1] & 0xFF;
|
|
|
|
}
|
|
|
|
|
|
|
|
void cic_hw_init (void) {
|
|
|
|
hw_gpio_irq_setup(GPIO_ID_N64_RESET, GPIO_IRQ_FALLING, cic_irq_reset_falling);
|
|
|
|
hw_gpio_irq_setup(GPIO_ID_N64_RESET, GPIO_IRQ_RISING, cic_irq_reset_rising);
|
|
|
|
hw_gpio_irq_setup(GPIO_ID_N64_CIC_CLK, GPIO_IRQ_FALLING, cic_irq_clk_falling);
|
|
|
|
hw_gpio_irq_setup(GPIO_ID_N64_CIC_CLK, GPIO_IRQ_RISING, cic_irq_clk_rising);
|
|
|
|
}
|
|
|
|
|
|
|
|
void cic_task (void) {
|
|
|
|
while (!hw_gpio_get(GPIO_ID_N64_RESET)) {
|
|
|
|
task_yield();
|
|
|
|
}
|
|
|
|
|
|
|
|
cic_region_t region = rtc_get_region();
|
|
|
|
if (region >= __REGION_MAX) {
|
|
|
|
region = REGION_NTSC;
|
|
|
|
rtc_set_region(region);
|
|
|
|
}
|
|
|
|
|
|
|
|
cic_write_id(region);
|
|
|
|
|
2023-02-15 12:23:58 +01:00
|
|
|
hw_tim_setup(TIM_ID_CIC, 500, cic_write_id_failed);
|
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements
* make room for saves
* update offset
* fixed debug address
* idk
* exception
* ironed out all broken stuff
* cleanup
* return epc fix
* better
* more cleanup
* even more cleanup
* mooore cleanup
* fixed printf
* no assert
* improved docker build, pyft232 instead of pyserial
* fixed displaying long message strings
description test
* just straight cleanup
* smallest cleanup
* PAL
* cpu buffer
* n64 bootloader done
* super slow usb storage reading implemented
* reduced buffer size
* usb gets fast
* little cleanup
* double buffered reads
* removed separate event id
* ISV in hardware finally
* small exception changes
* mac testing
* py spacing
* fsd write, rtc, isv and reset fixes
* fixxx
* good stopping point
* usb fixed?
* pretend we have 128 MB sdram
* backup
* chmod
* test
* test done
* more tests
* user rm
* help
* final fix
* updated component values
* nice asset names
* cic 64dd support
* ddipl enable separation
* pre DMA rewrite, created dedicated buffer memory space, simplified code
* dma rewrite, needs testing
* moved xml
* dd basics
* timing
* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite
* added usb read functionality, general cleanup
* changed mem addressing
* added fpga flash update access
* added mcu update
* chmod
* little cleanup
* update format and stuff
* fixes
* uninitialized fix
* small fixes
* update fixes
* update stuff done
* fpga update tested
* build time fix
* boot fix
* test timing
* readme test
* test 2
* reports
* testseet
* final
* build test
* forgot
* button and naming
* General cleanup
And multiline commit message test
* Exception screen UI touch ups
* display separation and tests beginning
* pc software update
* pc software done
* timing test
* delete launch.json
* sw fixes
* fixed button hole diameter in shell
* small cleanup, rpi testing
* shell fillet fix, pc rtc printing
* added cfg lock mechanism
* moved lock to cfg address space
* extended ROM and ISV fixes
* preliminary sd card support
* little sd card cleanup
* sd menu fixes
* 5 second limit
* reduced shell thickness
* basic led act blinking
* faster sd menu loading
* inst cache invalidate
* sd card writing is working
* SD card CSD and CID registers
* wait for previous command
* led error codes
* fixed cfg_translate_address use
* 64dd from sd card working
* 64dd speedup and button handling
* delayed address latching cycle - might break other builds, needs testing
* bootloader improvements
* small fixes
* return previous cfg when setting new
* cache stuff
* unfloader debug protocol support
* UNFLoader style debug command line support
* requirements.txt
* shell groove fillet
* reset state inside controller
* fixed fast PI read, added PI R/W fifo debug info
* PI access prioritize
* SD clock stop when RX FIFO is more than half full
* flash erase method change
* CFG error handling, TLOZ MM debug ISV support
* CIC5167 support
* general fixes
* USB unplugged cable handling
* turn off led when changing between error/act modes
* rtc 2 bit clock stop support
* line endings
* Revert "line endings"
This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb.
* PI address debug
* readme test
* diagram update
* diagram background
* diagram background
* diagram background
* updated readme
2022-11-10 11:46:54 +01:00
|
|
|
cic_write_seed();
|
|
|
|
hw_tim_stop(TIM_ID_CIC);
|
|
|
|
|
|
|
|
cic_write_checksum();
|
|
|
|
cic_init_ram(region);
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
uint8_t cmd = 0;
|
|
|
|
cmd |= (cic_read() << 1);
|
|
|
|
cmd |= cic_read();
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case 0: {
|
|
|
|
cic_compare_mode(region);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 2: {
|
|
|
|
cic_x105_mode();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 3: {
|
|
|
|
cic_soft_reset();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 1:
|
|
|
|
default: {
|
|
|
|
while (1) {
|
|
|
|
task_yield();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|