2022-07-27 00:28:34 +02:00
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#include "fpga.h"
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#include "isv.h"
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#include "usb.h"
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#define ISV_READ_POINTER_ADDRESS (0x03FF0014)
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#define ISV_BUFFER_ADDRESS (0x03FF0020)
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#define ISV_BUFFER_SIZE ((64 * 1024) - 0x20)
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struct process {
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bool enabled;
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uint32_t current_read_pointer;
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};
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2022-07-29 19:44:05 +02:00
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2022-07-27 00:28:34 +02:00
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static struct process p;
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static uint32_t isv_get_read_pointer (void) {
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uint32_t read_pointer;
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fpga_mem_read(ISV_READ_POINTER_ADDRESS, 4, (uint8_t *) (&read_pointer));
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return (
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(read_pointer & 0x000000FF) << 24 |
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(read_pointer & 0x0000FF00) << 8 |
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(read_pointer & 0x00FF0000) >> 8 |
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(read_pointer & 0xFF000000) >> 24
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);
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}
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void isv_set_enabled (bool enabled) {
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2022-07-29 19:44:05 +02:00
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uint32_t read_pointer = 0;
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2022-07-27 00:28:34 +02:00
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if (enabled) {
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p.enabled = true;
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p.current_read_pointer = 0;
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2022-07-29 19:44:05 +02:00
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fpga_mem_write(ISV_READ_POINTER_ADDRESS, 4, (uint8_t *) (&read_pointer));
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2022-07-27 00:28:34 +02:00
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} else {
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p.enabled = false;
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}
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}
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bool isv_get_enabled (void) {
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return p.enabled;
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}
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void isv_init (void) {
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p.enabled = false;
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}
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void isv_process (void) {
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if (p.enabled) {
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uint32_t read_pointer = isv_get_read_pointer();
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if (read_pointer < ISV_BUFFER_SIZE && read_pointer != p.current_read_pointer) {
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bool wrap = read_pointer < p.current_read_pointer;
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uint32_t length = ((wrap ? ISV_BUFFER_SIZE : read_pointer) - p.current_read_pointer);
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uint32_t offset = ISV_BUFFER_ADDRESS + p.current_read_pointer;
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usb_tx_info_t packet_info;
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2022-07-29 19:44:05 +02:00
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usb_create_packet(&packet_info, PACKET_CMD_ISV_OUTPUT);
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2022-07-27 00:28:34 +02:00
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packet_info.dma_length = length;
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packet_info.dma_address = offset;
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if (usb_enqueue_packet(&packet_info)) {
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p.current_read_pointer = wrap ? 0 : read_pointer;
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}
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}
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}
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}
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