SummerCart64/fw/picorv32/scripts/vivado/synth_area.tcl

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Tcl
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2021-08-05 19:50:29 +02:00
read_verilog ../../picorv32.v
read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top picorv32_axi
opt_design -resynth_seq_area
report_utilization
report_timing